Priority Scheduling Patents (Class 718/103)
  • Patent number: 11106495
    Abstract: Various embodiments are generally directed to techniques for partitioning parallelizable tasks into subtasks for processing. Some embodiments are particularly directed to dynamically determining chunk sizes to use in partitioning tasks, such as parallel loops or divide and conquer algorithm tasks, into subtasks based on the probability of a priority task source introducing a high-priority task. For example, a measurement signal received from a probe indicating an operational characteristic associated with a priority task source may be used to generate an estimate of the probability of a priority task source introducing a high-priority task. In such examples, the estimate may be used to determine a chunk size for a parallelizable task and the parallelizable task may be partitioned into a plurality of subtasks based on the chunk size and the subtasks may be assigned, for execution, to at least one task queue in a task pool.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: August 31, 2021
    Assignee: INTEL CORPORATION
    Inventors: Michael Voss, Pablo Reble, Aleksei Fedotov
  • Patent number: 11102283
    Abstract: A method comprising discovering workload attributes and identify dependencies, receiving utilization performance measurements including memory utilization measurements of at least a subset of workloads, grouping workloads based on the workload attributes, the dependencies, and the utilization performance measurements into affinity groups, determining at least one representative synthetic workload for each affinity group, each representative synthetic workload including a time slice of a predetermined period of time when there are maximum performance values for any number of utilization performance measurements among virtual machines of that particular affinity group, determining at least one cloud service provider (CSP)'s cloud services based on performance of the representative synthetic workloads, and generating a report for at least one of the representative synthetic workloads, the report identifying the at least one of the representative synthetic workloads and the at least one CSP's cloud services inclu
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: August 24, 2021
    Assignee: Virtual Instruments Worldwide, Inc.
    Inventors: Rick Haggart, Rangaswamy Jagannathan, Michael Bello, Ricardo A. Negrete, Elizaveta Tavastcherna, Vitoo Suwannakinthorn
  • Patent number: 11095570
    Abstract: The described technology is generally directed towards automatically scaling segments of a stream of data. According to an embodiment, a system can comprise a memory that can store computer executable components, and a processor that can execute the computer executable components stored in the memory. The computer executable components can comprise a predictor that can predict a future communication load of a stream of data provided by a stream provider device, the stream comprising segments of a size. The computer executable components can further comprise a size changer that can receive an indication that a present communication load of the stream of data has transitioned a threshold, and change the size of a segment of the segments based on the indication and the future communication load of the stream of data.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: August 17, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Jeff Wu, Ben Wang
  • Patent number: 11086666
    Abstract: A method is described for activating tasks in an operating system, characterized by the following features: the tasks are respectively assigned to one of multiple activation schemata; triggering events are assigned to the activation schemata; and if a triggering event occurs, which is assigned to one activation schema among the activation schemata, then the tasks assigned to the activation schema are activated in accordance with the activation schema.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: August 10, 2021
    Assignee: Robert Bosch GmbH
    Inventor: Rainer Baumgaertner
  • Patent number: 11061743
    Abstract: A computer system for event loop optimization through event ordering within an event loop of a node to improve externally visible attributes of the runtime. The optimization is carried out by labeling a set of events by assigning one or more attributes to each event of the set of events; processing a plurality of events of the set of events for an interval based on at least the attributes of each event of the plurality of events; ordering the events of the plurality of events within the interval based on assigned priorities to the one or more assigned attributes of each event of the plurality of events; and executing the plurality of events in the order determined based on the assigned priorities.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Michael H. Dawson, Gireesh Punathil
  • Patent number: 11061693
    Abstract: Examples of techniques for reprogramming a field programmable device on demand are disclosed. According to aspects of the present disclosure, a computer-implemented method may include: identifying a first field programmable device as being over utilized; responsive to identifying the first field programmable device that is over utilized, identifying a second field programmable device that is underutilized; determining whether to reprogram the second field programmable device; responsive to determining to reconfigure the second field programmable device, stopping the second field programmable device from performing a workload; moving the workload to another field programmable device configured to perform the workload; and reprogramming the second field programmable device.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: July 13, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yuk L Chan, Andrew P. Wack, Peter B. Yocom
  • Patent number: 11055169
    Abstract: Reliability testing can include determining a transaction time for each of a plurality of transactions to a system under test during the reliability test, wherein the plurality of transactions are of a same type. Forecasts of transaction times can be calculated for the transaction type. The forecasts can be compared with a threshold time using a processor. A remedial action can be implemented responsive to at least one of the forecasts exceeding the threshold time.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: July 6, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan Dunne, Jeffrey B. Sloyer
  • Patent number: 11055129
    Abstract: Various example embodiments herein provide a computerized method for scheduling a plurality of tasks for an operating system on a multicore processor. The method includes identifying the plurality of tasks to be executed on the multicore processor and determining a task schedule for scheduling of the plurality of tasks by providing a higher preference to the CPU-bound task than the non CPU-bound task. Further, the method includes scheduling the plurality of tasks on the multicore processor based on the task schedule.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: July 6, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tushar Vrind, Chandan Kumar, Raju Udava Siddappa, Balaji Somu Kandaswamy, Venkata Raju Indukuri
  • Patent number: 11055163
    Abstract: For error handling of data communications, in a transmission interval, between first and second tasks for which first and second time intervals are respectively predefined, (1) execution of the first task is omitted in a pending instance of the second time interval responsive to where the transmission interval immediately prior to the pending instance of the second time interval began in, and continued past an end point of, a most recent instance of the first time interval, which was during an immediately preceding instance of the second time interval; or (2) execution of the second task is omitted in the pending instance of the second time interval responsive to where a most recent prior execution of the second task began in, and continued past an end point in time of, a most recent instance of the second time interval immediately prior to the pending instance of the second time interval.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: July 6, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Lou Guillot, Peter Haefele, Simon Kramer, Uwe Hartmann, Venugopalan Ranjith Kumar
  • Patent number: 11055217
    Abstract: Techniques are disclosed for identifying multiple sections from one or more tracks of a media file and reading them together in a consumption-driven pipeline process. A render pipeline may comprise a sample generator, a sample buffer, and a destination buffer. Multiple render pipelines may be used for parsing multiple tracks of the media file. An I/O manager may determine that a destination buffer requires new data. The I/O manager may schedule a memory read for a data element from the sample buffer corresponding to the destination buffer and may determine if any of the sample buffers have data elements with memory locations close to the scheduled read. If so, the I/O manager may also schedule those memory locations to be read. After reading, the filled data elements corresponding to the read memory may then be sent to their corresponding destination buffers to be consumed and added to their corresponding tracks.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: July 6, 2021
    Assignee: Apple Inc.
    Inventors: John Samuel Bushell, Mortiz Wittenhagen
  • Patent number: 11055141
    Abstract: A reconfigurable data processor comprises an array of configurable units configurable to allocate a plurality of sets of configurable units in the array to implement respective execution fragments of the data processing operation. Quiesce logic is coupled to configurable units in the array, configurable to respond to a quiesce control signal to quiesce the sets of configurable units in the array on quiesce boundaries of the respective execution fragments, and to forward quiesce ready signals for the respective execution fragments when the corresponding sets of processing units are ready. An array quiesce controller distributes the quiesce control signal to configurable units in the array, and receives quiesce ready signals for the respective execution fragments from the quiesce logic.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: July 6, 2021
    Assignee: SAMBANOVA SYSTEMS, INC.
    Inventors: Raghu Prabhakar, Manish K. Shah, Pramod Nataraja, David Brian Jackson, Kin Hing Leung, Ram Sivaramakrishnan, Sumti Jairath, Gregory Frederick Grohoski
  • Patent number: 11048575
    Abstract: For error handling of data communications between first and second tasks in a data transmission interval, where first time intervals and second time intervals are predefined for the first and second tasks, respectively, the data transmission interval is omitted in one of the second time intervals when (1) execution of the first task immediately prior to the current second time interval, which began in a first time interval, during an immediately preceding second interval, continues past an end point of that first time interval, and an execution of the second task of the current second interval has begun, or (2) execution of the second task, which began in an immediately preceding one of the second intervals, continued past an end point of the preceding second interval and an execution of the first task the current second interval has already begun.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: June 29, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Lou Guillot, Peter Haefele, Simon Kramer, Uwe Hartmann, Venugopalan Ranjith Kumar
  • Patent number: 11049470
    Abstract: An apparatus receives pieces of image data of respective frames from a server apparatus, where each of the pieces of image data represents a display screen reflecting a result of processing corresponding to an input operation performed on the apparatus. The apparatus, in response to reception of a piece of image data of a first frame among the frames from the server apparatus, controls a display timing of the first frame, based on an occurrence state of an input operation on the apparatus.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: June 29, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Kohji Yamada
  • Patent number: 11036553
    Abstract: A priority-based resource allocation method, includes accepting a resource application submitted by a job, the resource application including resource demand information and job priority information; determining, according to the resource demand information of the resource application, whether remaining resources of a system meet the resource application, and traversing, in an allocated resource application queue when the remaining resources do not meet the resource application, allocated resource applications having job priorities lower than that of the resource application; using the sum of system resources occupied by all traversed resource applications plus the remaining resources as available resources; and stopping traversing when the available resources meet the resource application, and allocating the available resources to the resource application.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: June 15, 2021
    Assignee: Alibaba Group Holding Limited
    Inventors: Yang Zhang, Yihui Feng, Jin Ouyang, Qiaohuan Han, Fang Wang
  • Patent number: 11036528
    Abstract: Aspects of the present disclosure describe techniques for managing locks in just-in-time compiled code in a software application. An example method generally includes profiling locks by during execution of the JIT compiled code. Locks are generally profiled by identifying locks on resources accessed by the JIT compiled code, and recording access information for each of the identified locks. When a safepoint is reached during execution of the JIT compiled code, one or more locks eligible for conversion to a biased lock are identified .based on the recorded access information for each of the identified locks, one or more locks eligible for conversion to a biased lock. Each respective lock of the one or more eligible locks is converted to a biased lock based on a current lock status of the respective lock.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: June 15, 2021
    Assignee: International Business Machines Corporation
    Inventors: Ting Wang, Xiao Ping Guo, Ao Hang, Gui Haochen, Yang Liu
  • Patent number: 11039225
    Abstract: The disclosed technology is generally directed to communications in an IoT environment. For example, such technology is usable for IoT data control. In one example of the technology, a declarative data request is received. The declarative data request is a request for data from multiple IoT devices. The declarative data request is translated into a plurality of individual requests. Destination IoT devices associated with the plurality of individual requests are identified. The plurality of individual requests to the destination IoT devices are sent. IoT data is received from the destination IoT devices based on the plurality of individual requests. The declarative data request is responded to based on the received IoT data.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: June 15, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Elio Damaggio
  • Patent number: 11025745
    Abstract: Technologies for end-to-end quality of service for I/O operations include a compute device in an I/O path. The compute device receives from another of the compute devices in the I/O path, an I/O request packet. The I/O request packet includes one or more QoS deadline metadata. The QoS deadline metadata is indicative of latency information relating to a currently executing workload relative to a specified QoS. The compute device evaluates the QoS deadline metadata and assigns a priority to the I/O request packet as a function of the evaluated metadata.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: June 1, 2021
    Assignee: Intel Corporation
    Inventors: Piotr Wysocki, Maciej Andrzej Koprowski, Grzegorz Jereczek
  • Patent number: 11023410
    Abstract: A system is described that performs memory access operations. The system includes a processor in a first node, a memory in a second node, a communication interconnect coupled to the processor and the memory, and an interconnect controller in the first node coupled between the processor and the communication interconnect. Upon executing a multi-line memory access instruction, the processor prepares a memory access operation for accessing, in the memory, a block of data including at least some of each of at least two lines of data. The processor then causes the interconnect controller to use a single remote direct memory access memory transfer to perform the memory access operation for the block of data via the communication interconnect.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 1, 2021
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: David A. Roberts, Shenghsun Cho
  • Patent number: 11019259
    Abstract: A real-time generation method for a 360-degree VR panoramic graphic image is provided. The method includes: determining a current camera location and scenario information; rendering a three-dimensional graphic image in a scene photographed by the camera onto a space projection object in real time, and performing combined rendering and capturing and combination to form a fully surrounding panoramic CUBE texture map; in a viewing angle range of 360 degrees, performing spherical projection and second rendering on the texture of the panoramic CUBE texture map, and converting same into a rendered object to generate a panoramic scenario map; and outputting the generated panoramic scenario map via a video IO card to obtain a 360-degree VR panoramic graphic image with a key signal. In addition, also provided is a real-time generation method for a 360-degree VR panoramic graphic image video.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: May 25, 2021
    Assignee: IDEAPOOL CULTURE & TECHNOLOGY CO., LTD.
    Inventor: Pengcheng Shi
  • Patent number: 11010696
    Abstract: Examples of job allocation are described hereon. In an example, a job for allocation may be received. The job may be analyzed to obtain information pertaining to the job. The information may comprise at least one of a domain of the job and a priority level of the job. Further, performance of resources may be determined to provide resource information. The resource information may be determined using a supervised learning model comprising a job vector for each job type and a resource vector corresponding to each resource. The resource information may include a list of resources with at least one of a corresponding probability of each resource completing the job and a performance score of each resource. Based on the job information and the resource information, the resource may be recommended for the job using an expertise-estimation modeling technique and the job may be assigned to the recommended resource, accordingly.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 18, 2021
    Assignee: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Guanglei Xiong, Chung-Sheng Li, Christopher Cole, Michael Dekshenieks, Kayhan Moharreri
  • Patent number: 10997519
    Abstract: Systems, computer-implemented methods, and computer program products to facilitate quantum computing job scheduling are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a scheduler component that can determine a run order of quantum computing jobs based on one or more quantum based run constraints. The computer executable components can further comprise a run queue component that can store the quantum computing jobs based on the run order. In an embodiment, the scheduler component can determine the run order based on availability of one or more qubits comprising a defined level of fidelity.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: May 4, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John A. Gunnels, Mark Wegman, David Kaminsky
  • Patent number: 10990926
    Abstract: A computer creates a prioritization list of a set of project functions, wherein each project function is associated with a priority level and an amount of resources. The computer detects a request, wherein the request includes a request to do one or more of alter one or more project functions of the set of project functions, add one or more project functions to the set of project functions, and remove one or more project functions from the set of project functions. The computer determines whether to allow the request based on at least on a comparison to the prioritization list.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: April 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory J. Boss, Rick A. Hamilton, II, Ashish Patel, Randy A. Rendahl
  • Patent number: 10984009
    Abstract: Aspects described herein may relate to methods, systems, and apparatuses that partitions searchable content and distributes the segments across a plurality of processing nodes, which in turn further sub-partitions the partitions for processing by local search actor in order to increase the speed with which a search request from a user is processed. Processing nodes available to receive partitioned searchable content are registered with an external storage device. The external storage device also maintains a global results collector that compiles results from the partitions of searchable content. Respective local collector actors receive compiled results from local search actors for a processing node and the compiled results are sent to the global results collector for compiling for the plurality of processing nodes. Results of the user search request are then provided to the user.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: April 20, 2021
    Assignee: Capital One Services, LLC
    Inventors: Hala Salim El-Ali, Rajesh Ranjan Sinha, Raghavendra Dharmavaram, Siddharth Srinivasan, Vipin Dwivedi, Fredrick Allen Crable
  • Patent number: 10980941
    Abstract: A computer-readable medium on a mobile computing device comprises an inter-application communication data structure to facilitate transitioning and distributing data between software applications in a shared app group for an operating system of the mobile computing device includes a scheme field of the data structure providing a scheme id associated with a target software app to transition to from a source software app, wherein the scheme id is listed on a scheme list stored with the source software app; and a payload field of the data structure providing data and/or an identification where to access data in a shared file system accessible to the software applications in the shared app group, wherein the payload field is encrypted.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: April 20, 2021
    Assignee: DexCom, Inc.
    Inventors: Gary A. Morris, Scott M. Belliveau, Esteban Cabrera, Jr., Rian Draeger, Laura J. Dunn, Timothy Joseph Goldsmith, Hari Hampapuram, Christopher Robert Hannemann, Apurv Ullas Kamath, Katherine Yerre Koehler, Patrick Wile McBride, Michael Robert Mensinger, Francis William Pascual, Philip Mansiel Pellouchoud, Nicholas Polytaridis, Philip Thomas Pupa, Anna Leigh Davis, Kevin Shoemaker, Brian Christopher Smith, Benjamin Elrod West, Atiim Joseph Wiley
  • Patent number: 10986158
    Abstract: Disclosed aspects relate to cancellation management with respect to a web application. A service request is received by the web application. An identifier for the service request is established. A cancellation request for the service request is received by the web application. Using the identifier, a termination of the service request is initiated. In embodiments, the termination of the service request is performed to free a set of computing resources such as bandwidth, processing, or memory.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: April 20, 2021
    Assignee: International Business Machines Corporation
    Inventor: James A. Iuliano
  • Patent number: 10977045
    Abstract: Microprocessor with multiple issue queues in a microprocessor, where at least one of the issue queues is an adjustable mode queue that can be set to act as either of a priority queue, or a regular queue, with respect to intake of new instructions and/or outflow of old instructions. A set of summary bit value(s) can be set to control whether the adjustable mode queue has instruction intake priority and/or instruction outflow priority relative to the other issue queue(s).
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: April 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Satish Kumar Sadasivam, Puneeth A. H. Bhat, Shruti Saxena
  • Patent number: 10969843
    Abstract: A system transfers power between a plurality of devices. Content is displayed to a group of users. An amount of power required by the system to at least complete display of the content is determined. In response to the required amount of power exceeding the power in a rechargeable power source of the system, one or more devices that are associated with users of the group are identified, wherein the identified devices each include a power source. Power is wirelessly received from the identified one or more devices. Embodiments of the present invention further include a method and program product for transferring power between a plurality of devices in substantially the same manner described above.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: April 6, 2021
    Assignee: International Business Machines Corporation
    Inventors: Shikhar Kwatra, Jeremy R. Fox, Mauro Marzorati, Sarbajit K. Rakshit
  • Patent number: 10970130
    Abstract: Parallel tasks are created, and the tasks include a first task and a second task. Each task resolves a future. At least one of three possible continuations for each of the tasks is supplied. The three continuations include a success continuation, a cancellation continuation, and a failure continuation. A value is returned as the future of the first task upon a success continuation for the first task. The value from the first task is used in the second task to compute a second future. The cancellation continuation is supplied if the task is cancelled and the failure continuation is supplied if the task does not return a value and the task is not cancelled.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: April 6, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John Duffy, Stephen H. Toub
  • Patent number: 10966064
    Abstract: A system that incorporates teachings of the present disclosure may include, for example, a processor that can maintain a first virtual task list associated with one of a sending user or a receiving user. A first message originating at equipment of the sending user is received and content of the first message is analyzed to determine a task. Behavior information is obtained associated with one of the sending user, the receiving user or both, and first virtual task list is adjusted to obtain a modified virtual task list according to the content of the first message and the behavior information. A second message is provided to one of the receiving user or another user according to the modified virtual task list. Other embodiments are disclosed.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: March 30, 2021
    Assignees: AT&T Intellectual Property I, L.P., AT&T Mobility II LLC
    Inventors: Dana Tardelli, Ginger Chien, Adrianne Binh Luu, Leonid Razoumov, Nemmara K. Shankaranarayanan
  • Patent number: 10963380
    Abstract: A simultaneous multithread (SMT) processor having a shared dispatch pipeline includes a first circuit that detects a cache miss thread. A second circuit determines a first cache hierarchy level at which the detected cache miss occurred. A third circuit determines a Next To Complete (NTC) group in the thread and a plurality of additional groups (X) in the thread. The additional groups (X) are dynamically configured based on the detected cache miss. A fourth circuit determines whether any groups in the thread are younger than the determined NTC group and the plurality of additional groups (X), and flushes all the determined younger groups from the cache miss thread.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: March 30, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory W. Alexander, Brian D. Barrick, Thomas W. Fox, Christian Jacobi, Anthony Saporito, Somin Song, Aaron Tsai
  • Patent number: 10942771
    Abstract: The present disclosure provides a method, an apparatus and a system for multi-module scheduling, capable of solving at least one of the problems associated with the multi-module scheduling technique in the related art, i.e., inconsistency in data inputted to a computing module, and a significant delay or low throughput in data transmission between computing modules.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: March 9, 2021
    Assignee: TUSIMPLE, INC.
    Inventors: Yifan Gong, Siyuan Liu, Dinghua Li, Jiangming Jin, Lei Su, YiXin Yang, Wei Liu, Zehua Huang
  • Patent number: 10942768
    Abstract: Aspects of the disclosure provide for mechanisms for scheduling computing tasks in a computer system. A method of the disclosure includes maintaining a priority queue comprising a plurality of computing tasks sorted in view of a plurality of numerical representations of priorities associated with the plurality of computing tasks; determining an attribute mask for a processing unit of a computer system, the attribute mask comprising a numerical representation of at least one attribute of the processing unit; and identifying, in view of the attribute mask, a computing task in the priority queue of the sorted computing tasks for processing by the processing unit of the computer system.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: March 9, 2021
    Assignee: Red Hat, Inc.
    Inventors: Nathaniel McCallum, Monis Khan, Benjamin Petersen, Jonathan Toppins
  • Patent number: 10942744
    Abstract: Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for DSX comprises execution hardware to execute instructions to begin and end a data speculative execution (DSX) and speculative instructions during the DSX, and DSX tracking hardware to track speculative memory accesses and detect ordering violations in a DSX of speculative instructions using a sequence number, addresses of instruction accesses, and whether an instruction being tracked is a write, and to trigger a mis-speculation upon an ordering violation.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Robert Valentine, Milind B. Girkar
  • Patent number: 10929189
    Abstract: Embodiments of a system and method for dynamic hardware acceleration are generally described herein. A method may include identifying a candidate task from a plurality of tasks executing in an operating environment, the operating environment within a hardware enclosure, the candidate task amenable to hardware optimization, instantiating, in response to identifying the candidate task, a hardware component in the operating environment to perform hardware optimization for the task, the hardware component being previously inaccessible to the operating environment, and executing, by the operating environment, a class of tasks amenable to the hardware optimization on the hardware component.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: February 23, 2021
    Assignee: Intel Corporation
    Inventors: Stephen T. Palermo, Soo Jin Tan, Valerie Young, Hassnaa Moustafa
  • Patent number: 10932002
    Abstract: A method of identifying media content presented on a display device includes determining a selected input source providing a video signal to the display device, and then selecting a first set of content identification rules when it is determined that the selected input source is a first input source, and selecting a second set of content identification rules when it is determined that the selected input source is a second input source. The method further comprises applying the selected first set or second set of content identification rules to the video signal in order to generate content identification data for the media content presented on the display device. Application of the content identification rules includes waiting for a trigger event and applying an algorithm to one or more frames of the video signal following the trigger event.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: February 23, 2021
    Assignee: Hyphametrics, Inc.
    Inventors: Gerardo Lopez Zamudio, Joanna Drews
  • Patent number: 10929178
    Abstract: In an embodiment, an operating system for a computer system assigns each independently-schedulable code sequence to an activity. An activity may thus be associated with a group of related code sequences, such as threads that communicate with each other (whether or not they are part of the same program). When a code sequence is ready to be scheduled and it is not part of the current activity, it may preempt the current activity if the activity for the code sequence is not enabled and is not masked by the enabled activities. Each activity may define which other activities it masks. A flexible scheduling scheme may be devised based on the mask assignments for each activity.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 23, 2021
    Assignee: Apple Inc.
    Inventors: Peter H. van der Veen, Shawn R. Woodtke, Stephen J. McPolin
  • Patent number: 10915359
    Abstract: A technique for scheduling processing tasks having different latencies is provided. The technique involves identifying one or more available requests in a request queue, where each request queue corresponds to a different latency. A request arbiter examines a shift register to determine whether there is an available slot for the one or more requests. A slot is available for a request if there is a slot that is a number of slots from the end of the shift register equal to the number of cycles the request takes to complete processing in a corresponding processing pipeline. If a slot is available, the request is scheduled for execution and the slot is marked as being occupied. If a slot is not available, the request is not scheduled for execution on the current cycle. On transitioning to a new cycle, the shift register is shifted towards its end and the technique repeats.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: February 9, 2021
    Assignee: ATI Technologies ULC
    Inventors: Jimshed B. Mirza, Qian Ma, Leon King Nok Lai
  • Patent number: 10908963
    Abstract: Methods, apparatus, and products for deterministic real time business application processing in a service-oriented architecture (‘SOA’), the SOA including SOA services, each SOA service carrying out a processing step of the business application where each SOA service is a real time process executable on a real time operating system of a generally programmable computer and deterministic real time business application processing according to embodiments of the present invention includes configuring the business application with real time processing information and executing the business application in the SOA in accordance with the real time processing information.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: February 2, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Landon C. Miller, Siljan H. Simpson
  • Patent number: 10901790
    Abstract: Automated techniques are disclosed for minimizing communication between nodes in a system comprising multiple nodes for executing requests in which a request type is associated with a particular node. For example, a technique comprises the following steps. Information is maintained about frequencies of compound requests received and individual requests comprising the compound requests. For a plurality of request types which frequently occur in a compound request, the plurality of request types is associated to a same node. As another example, a technique for minimizing communication between nodes, in a system comprising multiple nodes for executing a plurality of applications, comprises the steps of maintaining information about an amount of communication between said applications, and using said information to place said applications on said nodes to minimize communication among said nodes.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Paul M. Dantzig, Arun Kwangil Iyengar, Francis Nicholas Parr, Gong Su
  • Patent number: 10901727
    Abstract: In response to detecting a code change request for a particular file of multiple files of a software build during testing, a computer generates a sensitivity rating of the particular file to cause breaks in the software build based on a relative level of failure of the particular file as compared to the multiple files based on one or more factors. The computer outputs a response to the code change request based on the sensitivity rating to one or more integrated development environment interfaces with access to the particular file of the software build. The computer uses the sensitivity rating to determine whether to grant the code change request.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: January 26, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Luke Biddle, Russell A. Currey, Sam Lewis, Jared R. Page
  • Patent number: 10891203
    Abstract: A method for creating a common platform graphical user interface is provided. The interface may enable a user to trigger a data load job from a tool. The tool may monitor file upload events, trigger jobs and identify lists of missing or problematic file names. The tool may run on a single thread, thereby consuming relatively less system resources than a multi-thread program to perform its capabilities. The tool may enable selection of file names using wildcard variables or keyword variables. The tool may validate a list of files received against a master file list for each data load job. The tool may receive user input relating to each data load job. The tool may generate a loop within the single thread to receive information. The tool may analyze the received information and use the received information to predict future metadata associated with future data load jobs.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: January 12, 2021
    Assignee: Bank of America Corporation
    Inventors: Sireesh Kumar Vasantha, Suki Ramasamy
  • Patent number: 10890960
    Abstract: A method and an apparatus for limiting rack power consumption are provided. The method includes: determining a rack power consumption limitation threshold; determining a current power consumption limitation mode; calculating a total power consumption limit for nodes in a rack; calculating a power consumption threshold for each of the nodes based on the current power consumption limitation mode, the rack power consumption limitation threshold and the total power consumption limit for the nodes in the rack; and transmitting the power consumption threshold for each of the nodes to the node, to enable the node to limit power consumption according to the received power consumption threshold.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: January 12, 2021
    Assignee: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD
    Inventor: Xiao Su
  • Patent number: 10884795
    Abstract: Embodiments for dynamic accelerator scheduling and grouping for deep learning jobs in a computing cluster. An efficiency metric of each job executing in the computing cluster is calculated to generate a prioritized job queue. Accelerator re-grouping execution plans are then generated based on the prioritized job queue, the accelerator re-grouping execution plans associated with a target cluster topology to be achieved according to the placement of selected jobs from the prioritized job queue in relation to a location of respective ones of a plurality of accelerators within the computing cluster. One of the accelerator re-grouping execution plans is executed to allocate the selected jobs to the respective ones of the plurality of accelerators to thereby shift the computing cluster to the target cluster topology.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: January 5, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Junfeng Liu, Kuan Feng, Qing Xu, Zhichao Su
  • Patent number: 10877697
    Abstract: A data storage device includes a nonvolatile memory device including one or more memory blocks having a first region and a second region and a controller configured to generate one or more write commands for writing data in the first region and the second region and transmit the one or more write commands to the nonvolatile memory device. The nonvolatile memory device includes a page buffer configured to store data to be written in the memory block and a control logic configured to control, based on the one or more write commands, the nonvolatile memory device to write the data in the first region and retain the data in the page buffer and to write the data retained in the page buffer in the second region.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: December 29, 2020
    Assignee: SK hynix Inc.
    Inventor: Seung Gu Ji
  • Patent number: 10853907
    Abstract: Systems, methods, and computer readable media to improve task switching operations in a graphics processing unit (GPU) are described. As disclosed herein, the clock rate (and voltages) of a GPU's operating environment may be altered so that a low priority task may be rapidly run to a task switch boundary (or completion) so that a higher priority task may begin execution. In some embodiments, only the GPU's operating clock (and voltage) is increased during the task switch operation. In other embodiments, the clock rate (voltages) of supporting components may also be increased. For example, the operating clock for the GPU's supporting memory, memory controller or memory fabric may also be increased. Once the lower priority task has been swapped out, one or more of the clocks (and voltages) increased during the switch operation could be subsequently decreased, though not necessarily to their pre-switch rates.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: December 1, 2020
    Assignee: Apple Inc.
    Inventors: Tatsuya Iwamoto, Kutty Banerjee, Rohan Sanjeev Patil
  • Patent number: 10838766
    Abstract: A memory system includes a controller configured to store start time stamps of a plurality of tasks, determine a delayed task among the tasks by performing a delay check operation based on an end time stamp of a current task and the start time stamps, and assign a priority to the delayed task.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: November 17, 2020
    Assignee: SK hynix Inc.
    Inventor: Jeen Park
  • Patent number: 10838765
    Abstract: An electronic device includes a display, a microphone, a communication circuit, a memory configured to store at least one application, and one or more processor(s), wherein the processor is configured to obtain voice data corresponding to the user's voice received through the microphone, transmit the voice data to an external electronic device through the communication circuit, receive a sequence of tasks for performing a first function of the at least one application, which is determined based on the voice data, from the external electronic device through the communication circuit; and while performing the tasks based on the sequence of tasks, when it is determined that execution of a first task in the sequence of tasks is not completed within a specified time, extending a time-out time of the first task and switching the execution of the first task to the execution in background.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: November 17, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Woong Kim, A Ra Go, Hyun Woo Kang, Seong Ick Jon, Ho Jun Jaygarl, Ga Jin Song
  • Patent number: 10827034
    Abstract: Described herein are systems, methods, and software to enhance the management of different versions of an application for a computing environment. In one implementation, a computing environment may identify a request to update an application from a first version to a second version on a virtual machine. In response to the request, one or more storage volumes may be identified that are associated with the second version of the application, wherein the one or more additional storage volumes comprise one or more delta volumes Once the one or more storage volumes are identified, the computing environment may attach the one or more storage volumes to the virtual machine to make the second version of the application executable on the virtual machine.
    Type: Grant
    Filed: September 9, 2017
    Date of Patent: November 3, 2020
    Assignee: VMware, Inc.
    Inventors: Sivaprasad Kundoor Govindankutty, Smitha Radhakrishnan, Jubish Kulathumkal Jose, Noble Peter Aranjani
  • Patent number: 10817341
    Abstract: The described technology is generally directed towards adaptively tuning thread weights for multithreaded processors. According to an embodiment, a system can comprise a memory that can store computer executable components, and a processor that can execute the computer executable components stored in the memory. The computer executable components can comprise a thread activity analyzer to determine a first likelihood of a first thread of a multithreaded processor entering a spin mode based on analysis of previous activity of the first thread. The system can further comprise a thread weight component to assign a thread weight to the first thread based on the first likelihood, wherein a share of resources of the multithreaded processor is assigned to the first thread based on the thread weight of the first thread.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: October 27, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Venkata L. R. Ippatapu, Kenneth Dorman
  • Patent number: 10810046
    Abstract: A method and system is disclosed herein for optimizing batch processing time required for executing one or more batch jobs received in real time, while adhering to service level agreements (SLAs) compliance in one batch job arrangement of an information technology service management (ITSM). A batch job system is characterized by the set of jobs and dependencies between jobs. Each job is in turn characterized by run-time, from-time and SLA definitions. SLAs can be of two kinds Start-time and End-time. Start-time SLA requires that the job execution starts before the specified time while End-time SLA necessitates that the job finishes its execution before the specified time. To optimize processing time required for executing one or more batch jobs the disclosure identifies SLA violations and solves them to produce a set of actionable levers.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: October 20, 2020
    Assignee: Tata Consultancy Services Limited
    Inventors: Alok Patel, Veerendra Kumar Rai, Abhinay Puvvala