Task Management Or Control Patents (Class 718/100)
  • Patent number: 11074523
    Abstract: A software solution for managing, sorting and ranking lists of tasks and integrating task and time management, such that tasks can be automatically or manually assigned to specified time blocks. Users can monitor the relationship between volume of tasks and available time in which to complete them. The solution and method can be applied to individual task lists as well as to the management of time across multiple projects and can be employed either by individuals or by collaborative groups. The solution and method employ multiple filters, sorts and handling rules to embody users' personal planning preferences. It can be used to manage task lists both with and without employing a scheduling component. The solution can interoperate with existing computer- and web-based calendar software and can use third-party calendar clients to display its output and to accept input from users.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: July 27, 2021
    Inventor: Dan Caligor
  • Patent number: 11068641
    Abstract: Systems and methods for optimizing data flow in an integrated circuit includes creating a task graph based on transforming an optimized network graph for a neural network application, wherein creating the task graph includes: enumerating a plurality of distinct tasks based on a decomposition of each of a plurality of network operations of the optimized network graph; and allocating a data buffer to each of pairs of dependent tasks of the plurality of distinct tasks based on the decomposition of each of the plurality of network operations of the optimized network graph; encoding a token-informed task scheduler based on a composition of the task graph, wherein the encoding the token-informed task scheduler includes: programming the token-informed task scheduler to cause an execution of the plurality of distinct tasks based on identifying a state of a respective data buffer between each of the pairs of dependent tasks.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: July 20, 2021
    Assignee: Mythic, Inc.
    Inventors: Pei-Ci Wu, Andrew Morten, Anthony Romano, Balaji Iyer, Alexander Dang-Tran, Eric Stotzer, David Fick
  • Patent number: 11068308
    Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement thread scheduling for multithreaded data processing environments are disclosed. Example thread schedulers disclosed herein for a data processing system include a buffer manager to determine availability of respective buffers to be acquired for respective processing threads implementing respective functional nodes of a processing flow, and to identify first ones of the processing threads as stalled due to unavailability of at least one buffer in the respective buffers to be acquired for the first ones of the processing threads. Disclosed example thread schedulers also include a thread execution manager to initiate execution of second ones of the processing threads that are not identified as stalled.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: July 20, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kedar Chitnis, Mihir Narendra Mody, Jesse Gregory Villarreal, Jr., Lucas Carl Weaver, Brijesh Jadav, Niraj Nandan
  • Patent number: 11061604
    Abstract: A data storage system architecture for accessing data, having a plurality of data storage subsystems coupling to a host for receiving an I/O request from the host, is provided. Each of the plurality of the data storage subsystems has: a redundant array of independent disks layer (RAID layer) for generating a plurality of media extents; a virtualization module for generating one or more virtual volumes (VVs); an on-board load balance (OBLB) module for offering a data access interface between the host and the data storage system architecture to parse the I/O request into at least one sub-I/O request; and a media extent server (ME server) module to receive the at least one sub-I/O request and to determine the validity of the at least one sub-I/O request. Accordingly, the host is able to issue I/O requests to any one of the data storage subsystems.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: July 13, 2021
    Assignee: Infortrend Technology, Inc.
    Inventors: Ching-Hao Chou, Michael Gordon Schnapp, Ching-Hai Hung
  • Patent number: 11061681
    Abstract: A method, system, and/or processor for processing data is disclosed that includes processing a parent stream; detecting a branch instruction in the parent stream; activating an additional child stream; setting a copy select vector of the child stream to be the same as the copy select vector of the parent stream; dispatching instructions for the parent stream and the additional child stream, and executing the parent stream and the additional child stream on different execution slices. In an aspect, the method further includes setting the copy select bits in the copy select vector for the child stream to equal the copy select bits in the copy select vector for the parent stream. A first parent mapper copy in an embodiment is associated and used in connection with executing the parent stream and a second different child mapper copy is associated and used in connection with executing the additional child stream.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Battle, Joshua W. Bowman, Hung Q. Le, Dung Q Nguyen, Brian W. Thompto
  • Patent number: 11062121
    Abstract: A method of data processing for an object identification system comprising a neural network. The method comprises, in a secure environment, obtaining first sensed data representative of a physical quantity measured by a sensor. The first sensed data is processed, using the neural network in the secure environment, to identify an object in the first sensed data. The method includes determining that the identified object belongs to a predetermined class of objects. In response to the determining, a first portion of the first sensed data is classified as data to be secured, and a second portion of the first sensed data is classified as data which is not to be secured. The second sensed data, derived from at least the second portion, is outputted as non-secure data.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: July 13, 2021
    Assignees: Apical Limited, Arm Limited
    Inventors: Daren Croxford, Zhi Feng Lee
  • Patent number: 11048506
    Abstract: A system and method for tracking stores and loads to reduce load latency when forming the same memory address by bypassing a load store unit within an execution unit is disclosed. Store-load pairs which have a strong history of store-to-load forwarding are identified. Once identified, the load is memory renamed to the register stored by the store. The memory dependency predictor may also be used to detect loads that are dependent on a store but cannot be renamed. In such a configuration, the dependence is signaled to the load store unit and the load store unit uses the information to issue the load after the identified store has its physical address.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: June 29, 2021
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Krishnan V. Ramani, Kai Troester, Frank C. Galloway, David N. Suggs, Michael D. Achenbach, Betty Ann McDaniel, Marius Evers
  • Patent number: 11048390
    Abstract: A GUI reformatting application is installed on a host computer and a mobile computer. Once activated, a first list of the user applications installed on the mobile computer is automatically transmitted to the host computer over a network. Selections of the user applications in the first list are received at the host computer wherein each selection identifies one of the user applications that is approved for enablement at the mobile computer. A second list of enabled user applications is generated at the host computer where the enabled user applications consist of those user applications identified by the selections made at the host computer. The second list is transmitted to the mobile computer and the home screen GUI on the mobile computer is then automatically reformatted to display only the launch icons associated with the enabled user applications.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: June 29, 2021
    Assignee: MI TECHNICAL SOLUTIONS, INC.
    Inventors: Michael L. Ihrig, Ryan C. Loughner
  • Patent number: 11048523
    Abstract: An information handling system (IHS), baseboard management controller (BMC) and method provide for coordinating the BMC and the host processor subsystem to avoid conflicts between power operations by BMC and maintenance activities by the host processor subsystem. In response to determining that a power operation is requested for the host processor subsystem, a service processor of the BMC determining whether a planned power operation (PPO) software sensor contains information indicating that the host processor subsystem is executing a critical operation utility. In response to determining that the host processor subsystem is not executing the critical operation utility, service processor updates/modifies information contained in the PPO software sensor to indicate that a power operation is scheduled. The modified information prevents the host processor subsystem from subsequently initiating execution of the critical operation utility.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: June 29, 2021
    Assignee: Dell Products, L.P.
    Inventors: Vaideeswaran Ganesan, Balamurugan Gnanasambandam, Tamilarasan Janakiram, Sreeram Muthuraman
  • Patent number: 11050853
    Abstract: The disclosed embodiments relate to provisioning of a service, such as a financial service, to a device, such as a mobile device operative to access the service wirelessly or otherwise, in a manner which efficiently provides a consistent user experience which meets a user's expectations as to the functionality and quality of the service, including the user interface therefore and service delivery, which leverages the available capacities of the devices through which the service is provided so as to maximize the functionality and quality of the provided service without diminishing the experience, i.e. without substantially reducing the quality or functionality.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: June 29, 2021
    Assignee: EXTRADE Financial Holdings, LLC
    Inventor: Sanjib Sahoo
  • Patent number: 11044359
    Abstract: In a device including a user interface, a processor and a memory in communication with the processor, the memory includes executable instructions that, when executed by the processor, cause the processor to control the device to perform functions of detecting an occurrence of an event, the device configured to generate a plurality of user notifications in response to the occurrence of the event, and causing only one of the plurality of user notifications to be output via the user interface while suppressing other user notifications such that duplicate user notifications of the event are prevented.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: June 22, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vijay Chandrasekaran, Ats Jenk
  • Patent number: 11029968
    Abstract: In one embodiment, a method includes storing thread state information associated with the first user-mode thread into a memory space associated with the first user-mode thread when executing in kernel space in response to a first system call by a first-user mode thread, executing first operations corresponding to the first system call on a processor, where data associated with executing the first operations are stored on a kernel stack associated with the processor, determining to pause the execution of the first operations, enqueuing a workload on a schedule queue for resuming execution of the first operations in a future, where the workload comprises data associated with executing a remainder of the first operations, and executing second operations corresponding to a second system call from a second user-mode thread on the processor, where data associated with executing the second operations are stored on the kernel stack associated with the processor.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: June 8, 2021
    Assignee: Facebook Technologies, LLC
    Inventors: Christoph Klee, Bernhard Poess
  • Patent number: 11030117
    Abstract: A host processor receives an address translation request from an accelerator, which may be trusted or un-trusted. The address translation request includes a virtual address in a virtual address space that is shared by the host processor and the accelerator. The host processor encrypts a physical address in a host memory indicated by the virtual address in response to the accelerator being permitted to access the physical address. The host processor then provides the encrypted physical address to the accelerator. The accelerator provides memory access requests including the encrypted physical address to the host processor, which decrypts the physical address and selectively accesses a location in the host memory indicated by the decrypted physical address depending upon whether the accelerator is permitted to access the location indicated by the decrypted physical address.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: June 8, 2021
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Nuwan Jayasena, Brandon K. Potter, Andrew G. Kegel
  • Patent number: 11030001
    Abstract: A method for execution by a request scheduler includes receiving a set of requests for execution from at least one request issuer. Resource requirements are determined for each of the set of requests, and current resource availability data is determined for resources indicated in the resource requirements. Scheduling data is generated for the set of requests based on the resource requirements and the current resource availability data. A first subset of the set of requests are added to a queue in response to the scheduling data indicating the first subset of the set of requests be queued for execution. Execution of the set of requests is facilitated in accordance with the scheduling data by facilitating immediate, simultaneous execution of a second subset of the set of requests and by facilitating serial execution of the first subset of the set of requests.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: June 8, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Baldocchi, Shaorong Liu, Jordan H. Williams, Ethan S. Wozniak, Manish Motwani, Ilya Volvovski
  • Patent number: 11016768
    Abstract: A system, method, apparatus and integrated circuit are provided for collecting runtime performance data with a set of hardware timers under control of a dedicated hardware control register by connecting a central processing unit (CPU) and memory to a timer block bank having a plurality of timer instances which are selectively enabled and activated to collect runtime performance data during execution of application code by measuring specified software execution events, where the dedicated hardware control register includes a plurality of register fields for independently controlling activation behavior of the plurality of timer instances in response to a single write operation to all register fields in the hardware control register.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: May 25, 2021
    Assignee: NXP USA, Inc.
    Inventors: Michael Rohleder, George A. Ciusleanu, Frank Steinert
  • Patent number: 11009935
    Abstract: Approaches are provided for a predictive electrical appliance power-saving management mode. An approach includes ascertaining a location and pace of a mobile device. The approach further includes calculating an amount of time that it will take to enable or start programs and services upon a computing device waking from a sleep mode or hybrid sleep mode. The approach further includes determining a distance threshold to the computing device that allows for the calculated amount of time to pass such that the programs and services are enabled or started prior to a user of the mobile device arriving at the computing device when the user is returning to the computing device at the ascertained pace. The approach further includes sending a signal to awaken the computing device from the sleep mode or hybrid sleep mode when the mobile device is within the distance threshold.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: May 18, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James E. Bostick, John M. Ganci, Jr., Sarbajit K. Rakshit, Kimberly G. Starks
  • Patent number: 11003668
    Abstract: Provided are systems and methods for programming language independent application development via test data stored in a database. In one example, the method includes receiving a database command from an application, the database command including a location and an access request for data at the location, determining if the application is operating in a test mode, and accessing data from a database based on the database command, wherein the accessing data comprises accessing test data stored in a test data storage based on the location included in the database command if the application is operating in the test mode, and accessing real data stored in a real data storage based on the location included in the database command if the application is not operating in test mode.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: May 11, 2021
    Assignee: SAP SE
    Inventors: Toni Fabijancic, Sebastian Mietke
  • Patent number: 11003664
    Abstract: Techniques are described herein for hybrid parallelization of in-memory table scans. Work for an in-memory scan is divided into granules based on a degree of parallelism. The granules are assigned to one or more processes. The work for each granule is further parallelized by dividing the work granule into one or more tasks. The tasks are assigned to one or more threads, the number of which can be dynamically adjusted.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: May 11, 2021
    Assignee: Oracle International Corporation
    Inventors: Teck Hua Lee, Shasank Chavan, Chinmayi Krishnappa, Allison Holloway, Vicente Hernandez, Dennis Lui
  • Patent number: 11003429
    Abstract: Scheduling of the operations of an integrated circuit device such as a hardware accelerator, including scheduling of movement of data into and out of the accelerator, can be performed by a compiler that produces program code for the accelerator. The compiler can produce a graph that represents operations to be performed by the accelerator. Using the graph, the compiler can determine estimated execution times for the operations represented by each node in the graph. The compiler can schedule operations by determining an estimated execution time for set of dependent operations that depend from an operation. The compiler can then select an operation that has a shortest estimated execution time from among a set of operations and which has a set of dependent operations that has a longest estimated execution time as compared to other sets of dependent operations.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: May 11, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Jindrich Zejda, Jeffrey T. Huynh, Tobias Joseph Kastulus Edler von Koch, Drazen Borkovic, Taemin Kim
  • Patent number: 10996981
    Abstract: A method for scheduling tasks on a processor includes detecting, in a task selection device communicatively coupled to the processor, a condition of each of a plurality of components of a computer system comprising the processor, determining a plurality of tasks that can be next executed on the processor based on the condition of each of the plurality of components, transmitting a signal to an arbiter of the task selection device that the plurality of tasks can be executed, determining, at the arbiter, a next task to be executed on the processor, storing, by the task selection device, the entry point address of the next task to be executed on the processor, and transferring, by the processor, execution to the stored entry point address of the next task to be executed.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: May 4, 2021
    Assignee: Toshiba Memory Corporation
    Inventor: Julien Margetts
  • Patent number: 10990153
    Abstract: An application processor includes an application processor including a first processor configured to generate a control signal based on whether user data is changed, wherein the application processor is configured to implement a power manager which dynamically controls power provided to the first processor, in response to the control signal.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: April 27, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Lae Park, Sang Ho Lim, Hwang Sub Lee
  • Patent number: 10984325
    Abstract: A dynamic, distributed directed activity network comprising a directed activity control program specifying tasks to be executed including required individual task inputs and outputs, the required order of task execution, and permitted parallelism in task execution; a plurality of task execution agents, individual of said agents having a set of dynamically changing agent attributes and capable of executing different required tasks in said activity control; a plurality of task execution controllers, each controller associated with one or more of the task execution agents with access to dynamically changing agent attributes; a directed activity controller for communicating with said task execution controllers for directing execution of said activity control program; a communications network capable of supporting communication between said directed activity controller and task execution controllers; and wherein said directed activity controller and task execution controllers communicate via said communication net
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: April 20, 2021
    Inventor: Robert D. Pedersen
  • Patent number: 10983955
    Abstract: A data structure used in memory-based file system, method and apparatus using thereof. The data structure comprising: a tree of the nodes comprising tree nodes and leaf nodes, each tree node points to at least one node, each leaf node is associated with a plurality of data unit elements each of which representing a data unit, wherein each data unit element is associated with two pointers, wherein at least one of the two pointers is capable of pointing to a data unit or to a data unit element; and a cyclic linked list of data unit elements representing identical clones of a data unit, wherein the cyclic linked list comprises a first element pointing directly to the data unit, wherein from each element in the cyclic linked list, the data unit can be reached in time complexity of O(1).
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: April 20, 2021
    Assignee: NETAPP, INC.
    Inventors: Amit Golander, Sagi Manole, Boaz Harrosh
  • Patent number: 10983846
    Abstract: A computer implemented method includes executing a user space partition first real-time task from a real-time task queue on a real-time kernel thread executing on a computing core of a computer, wherein the real-time kernel thread is scheduled by an operating system scheduler, pre-empting the first real-time task via a user space partition real-time task scheduler in response to a task switch signal, saving a first real-time task context, loading a user space second real-time task context for use by the real-time kernel thread via the user space partition real-time task scheduler, and executing the second real-time task from the real-time task queue on the real-time kernel thread.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: April 20, 2021
    Assignee: Futurewei Technologies, Inc.
    Inventors: Mark Huang, Liangchen Zheng
  • Patent number: 10985975
    Abstract: A parallel processing device includes a parallel processing engine implemented by a processor. The parallel processing engine is configured to execute a shell script for each particular processing job in a queue of processing jobs to run. The shell script is configured to dynamically generate a configuration file for each particular processing job. The configuration file instructs a network of computing systems to run the particular processing job using a particular number of parallel partitions corresponding to a parallel partitions parameter associated with the particular job. The configuration file includes randomized scratch directories for computing nodes within the network of computing systems and a calculated container size for the particular processing job. Each processing job is run on the network of computing systems according to the dynamically-generated configuration file of the particular processing job.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: April 20, 2021
    Assignee: Bank of America Corporation
    Inventors: Brad E. Romano, Shashi Thanikella
  • Patent number: 10986191
    Abstract: Disclosure method that includes traversing a user instance distribution of user instances of a user on hosts in a cluster to detect whether a trigger condition for user scheduling of adjustment of the user instance distribution is satisfied; migrating the user instance to be migrated out from the one or more hosts from which the user instances are to be migrated out to the one or more second hosts to which the one or more user instances are to be migrated in if the trigger condition for user scheduling is satisfied. The implementations of the present disclosure may schedule resources based on user instance distributions of users on hosts and achieve a balanced distribution of user instances. The implementations further avoid placing user instances of all users into a small number of hosts, increase the ability to prevent risks, and enhance the user experience.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: April 20, 2021
    Assignee: Alibaba Group Holding Limited
    Inventors: Yu Xie, Huining Yan
  • Patent number: 10979298
    Abstract: A multi-node collaboration network can include multiple computing nodes communicatively coupled to a collaboration server. A computing node can be joined to the multi-node collaboration network for sharing data corresponding to a current project among a set of project team members. Current project data can be compared, using computer hardware, with previous project data stored in a data storage device communicatively coupled to the collaboration network. A previous project corresponding to the current project can be determined, using the computer hardware, based on the comparing the current project data with the previous project data. Using the computer hardware and responsive to detecting a nonconforming decision, an electronic notification of the nonconforming decision is provided.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: April 13, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Marco Aurelio Stelmar Netto, Carlos Demetrio De Souza, Marcelo Dos Santos Rodrigues
  • Patent number: 10969255
    Abstract: The TIC environmental event sensor is a nickel-sized, ultra-thin circuit assembly, containing an extremely compact array of both environmental sensors and physical sensors, along with local and wireless access to all the sensor data, including BTLE & LoRa, as well as an electronic ink display for limited field access to sensor events in real time. The TIC is designed to capture changes in the sensor data in real time, and then log it for future examination. The most recent change will remain on the device's display. The changes can then be transmitted to a smart phone or tablet via BTLE, networked as an asset via LoRa, or locally scrolled at the device. The TIC is Ideal for tracking any variations in the surrounding conditions of an asset's travel, storage or use.
    Type: Grant
    Filed: April 21, 2019
    Date of Patent: April 6, 2021
    Inventor: Darrel Eugene Self
  • Patent number: 10963394
    Abstract: A controller of a data storage device includes: a host interface providing an interface to a host computer; a flash translation layer (FTL) translating a logical block address (LBA) to a physical block address (PBA) associated with an input/output (I/O) request; a flash interface providing an interface to flash media to access data stored on the flash media; and one or more deep neural network (DNN) modules for predicting an I/O access pattern of the host computer. The one or more DNN modules provide one or more prediction outputs to the FTL that are associated with one or more past I/O requests and a current I/O request received from the host computer, and the one or more prediction outputs include at least one predicted I/O request following the current I/O request. The FTL prefetches data stored in the flash media that is associated with the at least one predicted I/O request.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: March 30, 2021
    Inventors: Ramdas P. Kachare, Sompong Paul Olarig, Vikas Sinha, Zvika Guz
  • Patent number: 10963303
    Abstract: Aspects of the disclosure relate to enabling independent storage and processing of data with centralized event control. An event control computing platform may receive an indicator of a processing task associated with processing a dataset. Subsequently, the event control computing platform may authenticate the indicator of the processing task. Then the event control computing platform may identify and allocate resources for executing the processing task and storing the dataset. Finally, the event control computing platform may generate and transmit a series of commands to cause the dataset to be accessed by the processing platform, cause the processing task associated with the dataset to be executed, and cause the processed dataset to be stored on the storage platform.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: March 30, 2021
    Assignee: Bank of America Corporation
    Inventors: Jerome M. Zott, Faisal Azfar, Vijaya M. Anusuri, Sridhar Ramaswamy, Robert J. Nicholson, Sitaram C. Yarlagadda
  • Patent number: 10963261
    Abstract: Snapshots are shared across save requests. A request to take a snapshot of one or more architected registers is obtained, and a determination is made as to whether the one or more architected registers have been modified since a previous snapshot that includes the one or more architected registers was taken. Based on determining the one or more architected registers have not been modified, the previous snapshot is used to satisfy the request to take the snapshot.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 30, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10956193
    Abstract: Moving scheduling of processor time for virtual processors (VPs) out of a virtualization hypervisor. A host operating system schedules VP (virtual processor) processor time. The host operating system creates VP backing threads, one for each VP of each virtual machine. There is a one-to-one mapping between each VP thread in the host operating system and each VP in the hypervisor. When a VP thread is dispatched for a slice of processor time, the host operating system calls into the hypervisor to have the hypervisor start executing the VP, and the hypervisor may perform a processor context switch for the VP. Of note is the security separation between VP scheduling and VP context switching. The hypervisor manages VP context switching in kernel mode while VP scheduling is performed in user mode. There is a security/interface boundary between the unit that schedules VP processor time and the hypervisor.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: March 23, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Artem Oks, David Hepkin
  • Patent number: 10957393
    Abstract: Method of operating a memory, and apparatus configured to perform similar methods, including performing a first access operation having a plurality of phases on a first grouping of memory cells, receiving a command to perform a second access operation having a plurality of phases on a second grouping of memory cells while performing a particular phase of the plurality of phases of the first access operation, pausing the first access operation in response to completion of the particular phase of the plurality of phases of the first access operation, performing an initial phase of the plurality of phases of the second access operation while the first access operation is paused, and performing a next subsequent phase of the plurality of phases of the first access operation and a next subsequent phase of the plurality of phases of the second access operation concurrently.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: March 23, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Luca De Santis
  • Patent number: 10956215
    Abstract: Predictive job admission control is provided. In response receiving a job for execution, a predicted resource utilization estimate is generated for the job prior to admission of the job to execution. Historic job execution statistics corresponding to the job are searched for. It is determined whether corresponding historic job execution statistics were found during the search. In response to determining that corresponding historic job execution statistics were found during the search, the predicted resource utilization estimate for the job is adjusted based on the corresponding historic job execution statistics found during the search to form an adjusted resource utilization estimate. The job is scheduled for execution based on the adjusted resource utilization estimate.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: March 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: David Kalmuk, Scott Douglas Walkty, Faizan Qazi, Patrick R. Perez
  • Patent number: 10949227
    Abstract: Methods and systems for context-based navigation through a plurality of applications on an electronic device are provided. The method includes generating and displaying an interactive user interface (a first interactive user interface) indicating a connection between a first application on the electronic device and at least one additional application on the electronic device. The first application and the at least one additional application, identified from the plurality of applications installed on the electronic device, are related to each other based on a topic selected from at least one topic identified in the first application. The topic may be identified based on content of the first application. Further, the method comprises allowing a user to launch the at least one additional application from the first interactive user interface.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: March 16, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Siba Prasad Samal, Suyambulingam Rathinasamy Muthupandi, Tarun Jindal
  • Patent number: 10949271
    Abstract: An enhanced copy-and-paste function copies multiple logical and physical software objects from a source computing environment to a distinct target computing environment. A physical object can be any software-data entity, such as a document, a container, a database, or a disk image. A logical object contains a hierarchy of two or more physical or logical objects. Objects are copied to a logical copy clipboard, where they may be assembled into logical objects. Each physical object is then transferred one at a time to a conventional physical clipboard, transmitted to a corresponding physical clipboard in a corresponding target environment, and then forwarded to a logical paste clipboard, where the original logical objects are reconstructed and pasted into the target environment. Each logical object may be pasted into multiple target environments and may contain physical objects copied from multiple source environments. Multiple logical objects may contain the same physical object.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: March 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Dong Chen, Shao Jun Ding, Zhi Li Guan, Yang Liang, Xin Peng Liu, Ting Yin, Wu Mi Zhong
  • Patent number: 10942781
    Abstract: The method may include collecting performance data relating to processing nodes of a computer system which provide services via one or more applications, analyzing the performance data to generate an operational profile characterizing resource usage of the processing nodes, receiving a set of attributes characterizing expected performance goals in which the services are expected to be provided, and generating at least one provisioning policy based on an analysis of the operational profile in conjunction with the set of attributes. The at least one provisioning policy may specify a condition for re-allocating resources associated with at least one processing node in a manner that satisfies the performance goals of the set of attributes. The method may further include re-allocating, during runtime, the resources associated with the at least one processing node when the condition of the at least one provisioning policy is determined as satisfied.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: March 9, 2021
    Assignee: BMC Software, Inc.
    Inventors: Yiping Ding, Assaf Marron, Fred Johannessen
  • Patent number: 10942824
    Abstract: Exemplary embodiments herein describe programming models and frameworks for providing parallel and resilient tasks. Tasks are created in accordance with predetermined structures. Defined tasks are stored as data objects in a shared pool of memory that is made up of disaggregated memory communicatively coupled via a high performance interconnect that supports atomic operations as descried herein. Heterogeneous compute nodes are configured to execute tasks stored in the shared memory. When compute nodes fail, they do not impact the shared memory, the tasks or other data stored in the shared memory, or the other non-failing compute nodes. The non-failing compute nodes can take on the responsibility of executing tasks owned by other compute nodes, including tasks of a compute node that fails, without needing a centralized manager or schedule to re-assign those tasks. Task processing can therefore be performed in parallel and without impact from node failures.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: March 9, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Haris Volos, Kimberly Keeton, Sharad Singhal, Yupu Zhang
  • Patent number: 10942861
    Abstract: Apparatuses and methods for managing a coherent memory are described. These may include one or more algorithmic logic units (ALUs) and an input/output (IO) interface. The I/O interface may receive one or more commands and retrieve data from or write data to a memory device. Each command may contain a memory address portion associated with a memory device. The apparatus may also include a memory mapping unit and a device controller. The memory mapping unit may map the memory address to a memory portion of the memory device, and the device controller may communicate with the memory device to retrieve data from or write data to the memory device. The apparatus may be implemented as a processing element in a configurable logic block network, which may additionally include a control logic unit that receives programming instructions from an application and generate the one or more commands based on the instructions.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: March 9, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy Chritz, David Hulton
  • Patent number: 10936367
    Abstract: Described herein is a system and method for ranking and/or taking an action regarding execution of jobs of a shared computing cluster based upon predicted user impact. Information regarding previous executions of a plurality of jobs is obtained, for example, from job execution log(s). Data dependencies of the plurality of jobs are determined. Job impact of each of the plurality of jobs as a function of the determined data dependencies is calculated. User impact of each of the plurality of jobs as a function of the determined data dependencies, the calculated job impact, and time is calculated. The plurality of jobs are ranked in accordance with the calculated user impact. An action is taken in accordance with the ranking of the plurality of jobs. The action can include automatic scheduling of the jobs and/or providing information regarding the rankings to a user.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: March 2, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Carlo Aldo Curino, Konstantinos Karanasos, Subramaniam Venkatraman Krishnan, Christopher William Douglas, Sriram S Rao, Andrew F Chung
  • Patent number: 10924406
    Abstract: A control device includes a cyclic communication part and a communication management part. A cyclic communication part controls communication of first control data of which arrival in a first guarantee time is guaranteed according to a preset cyclic period and second control data of which arrival in a second guarantee time longer than the cyclic period is guaranteed and of which a sequence of information included is determined. The communication management part manages a communication schedule of first control data and second control data. When new second control data is acquired while the second control data is divided into a plurality of communication data and communicated according to the cyclic period, the communication management part determines a communication sequence of the plurality of second control data according to priorities of the plurality of second control data.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: February 16, 2021
    Assignee: OMRON Corporation
    Inventors: Mitsuhiro Yoneda, Shigenori Sawada, Hirohito Mizumoto, Ziqiang Xu
  • Patent number: 10922123
    Abstract: Techniques of migrating containerized software packages between source and destination computing devices are disclosed herein. In one embodiment, a method includes receiving, at a destination device, a request to migrate a source container currently executing on the source device to the destination device. The method also includes synchronizing a list of handles utilized by the source container on the source device between the destination device and the source device and instantiating, in the destination device, a destination container using a copy of an image, a memory snapshot, and the synchronized list of handles of the source container on the source device. Upon completion of instantiating the destination container, the destination device can transmit a remote display output of the application to be surfaced on the source device in place of the local display output generated by the source container.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: February 16, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Frederick Justus Smith, IV, Paul Bozzay, Benjamin M. Schultz, Margarit Chenchev, Hari R. Pulapaka
  • Patent number: 10913155
    Abstract: A robot joint controlling method includes: receiving a motion command; determining one or more joint servos that are needed to execute the motion command; and determining whether the one or more joint servos are in an occupied state, and if not, executing the motion command so as to control the one or more joint servos to operate accordingly.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: February 9, 2021
    Assignee: UBTECH ROBOTICS CORP
    Inventors: Youjun Xiong, Gaobo Huang, Jiawen Hu
  • Patent number: 10915365
    Abstract: A mapper node and a reducer node respectively run on different central processing units (CPUs) in a CPU pool, and a remote shared partition shared by the mapper node and the reducer node is delimited in the storage pool. The mapper node executes a map task to obtain a data segment, and stores the data segment into a remote shared partition. The reducer node directly obtains a to-be-processed data segment from the remote shared partition, and executes a reduce task on the to-be-processed data segment.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: February 9, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jiyuan Tang, Wei Wang, Yi Cai
  • Patent number: 10915424
    Abstract: The techniques described herein may provide deadlock detection and prevention with improved performance and reduced overhead over existing systems. For example, in an embodiment, a method for improving performance of software code by preventing deadlocks may comprise executing software code in a computer system comprising a processor, memory accessible by the processor, and program instructions and data for the software code stored in the memory, the program instructions executable by the processor to execute the software code, logging information relating to occurrence of deadlock conditions among threads in the executing software code, detecting occurrence of deadlock conditions in the software code based on the logged information, and modifying the software code or data used by the software code so as to prevent occurrence of at least one detected deadlock condition.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: February 9, 2021
    Assignee: The Board of Regents of The University of Texas System
    Inventors: Tongping Liu, Jinpeng Zhou, Sam Silvestro, Hongyu Liu
  • Patent number: 10909289
    Abstract: A hardware monitor arranged to detect livelock in a hardware design for an integrated circuit. The hardware monitor includes monitor and detection logic configured to detect when a particular state has occurred in an instantiation of the hardware design; and assertion evaluation logic configured to periodically evaluate one or more assertions that assert a formal property related to reoccurrence of the particular state in the instantiation of the hardware design to detect whether the instantiation of the hardware design is in a livelock comprising the predetermined state. The hardware monitor may be used by a formal verification tool to exhaustively verify that the instantiation of the hardware design cannot enter a livelock comprising the predetermined state.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: February 2, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Ashish Darbari, Iain Singleton
  • Patent number: 10908672
    Abstract: An information processing device includes a state determination unit. The state determination unit switches between first execution processing that executes a function of the information processing device by way of an operating system, and second execution processing that stops operation of the operating system during operation, and executes a specific function of the information processing device by way of a specific program without turning ON a power source of the information processing device. The second execution processing is not performed during execution of the first execution processing.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: February 2, 2021
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Takeshi Okada, Hiroyuki Kato, Keiichi Imamura, Kayo Okada, Masaru Sakata, Kousuke Ishizaki
  • Patent number: 10908954
    Abstract: In one embodiment, tasks executing on a data processing system can be associated with a Quality of Service (QoS) classification that is used to determine the priority values for multiple subsystems of the data processing system. The QoS classifications are propagated when tasks interact and the QoS classes are interpreted a multiple levels of the system to determine the priority values to set for the tasks. In one embodiment, one or more sensors coupled with the data processing system monitor a set of system conditions that are used in part to determine the priority values to set for a QoS class.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: February 2, 2021
    Assignee: Apple Inc.
    Inventors: Daniel A. Steffen, Matthew W. Wright, Russell A. Blaine, Daniel A. Chimene, Kevin J. Van Vechten, Thomas B. Duffy
  • Patent number: 10901920
    Abstract: One embodiment provides for a computer-implemented method comprising instantiating a synchronization primitive to control access to a resource, acquiring the synchronization primitive at a first thread, the first thread having a first priority, associating a turnstile with the synchronization primitive, setting an inheritor of the turnstile to the first thread, attempting to acquire the synchronization primitive at a second thread while the synchronization primitive is held by the first thread, the second thread having a second priority, adding the second thread to a wait queue of the turnstile; and in response to determining that the second priority is higher than the first priority, increasing the priority of the first thread to the second priority.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: January 26, 2021
    Assignee: Apple Inc.
    Inventors: Jainam A. Shah, Jeremy C. Andrus, Daniel A. Chimene, Kushal Dalmia, Pierre Habouzit, James M. Magee, Marina Sadini, Daniel A. Steffen
  • Patent number: 10901798
    Abstract: A method, system and computer program product for dependency layer deployment optimization in a workload node cluster. Historical data of workload deployment requests to a workload node cluster and a list of dependency layers for the workload deployment request are maintained, where a dependency layer defines support programs on which a workload program depends. Furthermore, a map of currently deployed dependency layers across the nodes of the workload node cluster is maintained. The historical data is analyzed to generate predictions of dependency layers required in the workload node cluster at given times. Furthermore, dependency layers are deployed and/or reclaimed in the workload node cluster according to the predictions ahead of a workload deployment request requiring predicted dependency layers.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventor: Henry Nash