Process Scheduling Patents (Class 718/102)
  • Patent number: 11507277
    Abstract: Example storage systems and methods provide data storage management using a key data store with progress values. A key data store includes a set of key data entries that each include a key value associated with a storage operation and a timestamp corresponding to a creation time of the key data entry. Storage management processes are executed on the set of key data entries and progress values for the storage management processes are tracked using the timestamps of the key data entries to manage the relative progress of the storage management processes.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: November 22, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Thomas Demoor, Carl Rene D'Halluin
  • Patent number: 11489791
    Abstract: Examples include a method of switching a packet by a virtual switch by receiving a system call to transmit a packet from a first application running in a first container on a first core, determining a destination for the packet, obtaining a buffer in an application memory space of the destination, copying the packet to the destination application memory space, and writing an entry for the packet to a queue assigned to the destination, the destination queue being in a queue manager. The packet may then be obtained by an entity at the destination.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: November 1, 2022
    Assignee: Intel Corporation
    Inventors: Niall D. McDonnell, Bruce Richardson, John Mangan, Harry Van Haaren, Ciara Loftus, Brian A. Keating
  • Patent number: 11481190
    Abstract: Provided are a computer program product, system, and method for selecting a plurality of processing systems to sort a data set. A determination is made of processing systems to perform a sort of records in a data set. The data set is divided into data subsets, each data subset comprising a portion of the records of the data set. Each of the determined processing systems of is notified of a data subset to sort. In response to receiving notification from the determined processing systems that the records in the data subsets have been sorted, the sorted data subsets are merged into a sorted data set comprising the records of the data set sorted.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 25, 2022
    Assignee: INTERNATIONAL BUSINESS MACHIINES CORPORATION
    Inventors: Michael R. Scott, Ronald David Boenig, II, David C. Reed, Samuel Ryan Smith
  • Patent number: 11481298
    Abstract: Processor(s) of a sampling profiler can identify an activity of multiple activities serviced by a central processing unit (CPU). Each activity can be performed by computing thread(s) of multiple computing threads executing various subroutines of a computer program. The processor(s) can set a target representing a total number of computing threads required to work simultaneously for a maximal use of the CPU. The processor(s) can determine a number of busy computing threads that are performing the activity by using the CPU. The processor(s) can calculate a number of wasted computing threads that are not performing the activity and not using the CPU by computing a difference between the target and the number of busy threads. The processor(s) can compute a CPU time usage for the activity by multiplying time duration of the activity by a value obtained by dividing the number of wasted threads by the number of busy threads.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: October 25, 2022
    Assignee: SAP SE
    Inventor: Tobias Scheuer
  • Patent number: 11470139
    Abstract: Systems, methods, and devices relating to video encoding for low-concurrency video channels are described herein. A video processing system may receive a manifest request for an encoded video stream associated with a selected channel. Based on the manifest request, the video processing system may request for a real-time linear (RTL) encoder to be started to encode the input compressed video stream for the channel in real-time. Also based on the manifest request, the video processing system may assign a faster-than-real-time (FTRT) encoder from a pool of already-running FTRT encoders to encode the video stream in real-time until the RTL encoder is fully started. The FTRT encoder may encode at a lower quality level to enable expedited real-time encoding. Based on the RTL encoder being fully started, the video processing system may switch the encoding from the FTRT encoder to the RTL encoder. The FTRT encoder may be returned to the FTRT encoder pool.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: October 11, 2022
    Assignee: Comcast Cable Communications, LLC
    Inventor: Alexander Giladi
  • Patent number: 11467870
    Abstract: Systems, apparatuses, and methods for abstracting tasks in virtual memory identifier (VMID) containers are disclosed. A processor coupled to a memory executes a plurality of concurrent tasks including a first task. Responsive to detecting one or more instructions of the first task which correspond to a first operation, the processor retrieves a first identifier (ID) which is used to uniquely identify the first task, wherein the first ID is transparent to the first task. Then, the processor maps the first ID to a second ID and/or a third ID. The processor completes the first operation by using the second ID and/or the third ID to identify the first task to at least a first data structure. In one implementation, the first operation is a memory access operation and the first data structure is a set of page tables. Also, in one implementation, the second ID identifies a first application of the first task and the third ID identifies a first operating system (OS) of the first task.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: October 11, 2022
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Anirudh R. Acharya, Michael J. Mantor, Rex Eldon McCrary, Anthony Asaro, Jeffrey Gongxian Cheng, Mark Fowler
  • Patent number: 11461069
    Abstract: A multi-core audio processor includes a plurality of audio processing cores having differing capabilities, a plurality of buffers, wherein each buffer is configured to store a plurality of samples associated with a corresponding audio stream, a deadline scheduler including a plurality of deadline registers configured to store a plurality of deadline values for each audio stream, and a plurality of audio processing core interfaces coupling the plurality of audio processing cores to the deadline scheduler, each of the audio processing core interfaces associated with a corresponding audio processing core. The plurality of deadline values indicate an order of processing of samples stored in the plurality of buffers by the plurality of processing cores.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: October 4, 2022
    Assignee: KNOWLES ELECTRONICS, LLC.
    Inventors: Erick Alvarado, Xiaojun Chen, Dave Rossum, Niel Warren
  • Patent number: 11463541
    Abstract: Systems and methods for selecting content based on an event associated with a device identifier are provided. One or more processors can receive a request to serve content. The processors can identify a device identifier associated with the request. The processors can determine, from the device identifier, an event for which to serve content. The processors can determine, from the request, a length of time between a time the request to serve content is received and a time at which the event is scheduled to occur. The processors can select, based on the determined length of time and event parameters associated with the event, content for display and provide the selected content for display at a computing device associated with the device identifier.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: October 4, 2022
    Assignee: GOOGLE LLC
    Inventors: Courtney Hampson, Jason Robert Richard Sanio
  • Patent number: 11461368
    Abstract: Recommending analytic tasks based on similarity of datasets is disclosed. One example is a system including a data processor, a matching module, and a recommendation module. The data processor receives an incoming dataset via a processing system, and generates a feature vector for the incoming dataset. The matching module determines similarity measures between the generated feature vector and representative feature vectors for a plurality of datasets in a data repository, and selects at least one dataset of the plurality of datasets based on the similarity measures. The recommendation module identifies at least one analytic task associated with the selected dataset, and recommends, to a computing device via the processing system, the at least one analytic task to be performed on the incoming dataset.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: October 4, 2022
    Assignee: Micro Focus LLC
    Inventors: Mahashweta Das, Mehmet Kivanc Ozonat
  • Patent number: 11456039
    Abstract: A system includes a memory component and a processing device, operatively coupled with the memory component, to send a read command to the memory component while a program or erase operation being executed by the memory component is suspended. The processing device, operatively coupled with the memory component, can then send an auto resume command to the memory component to automatically resume execution of the program or erase operation after the read command is executed.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: September 27, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Eric N. Lee, Dheeraj Srinivasan
  • Patent number: 11449332
    Abstract: An example polling computing device includes a processor controlled to: determine an interval time to poll a monitored device in a queue of monitored devices based on a current processing time of a given monitored device being polled, and an average processing time for previously polled monitored devices; adjust a polling rate such that the interval time is between a minimum polling interval target and a maximum polling interval target; poll the monitored devices in the queue according to the polling rate; receive, in response to the poll, from the monitored devices in the queue, current software version indicators of software installed at the monitored devices; and transmit, to a software patch difference device, the current software version indicators, the software patch difference device to determine which of the monitored devices have been updated since a last poll based on the current software version indicators.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 20, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shakti Ashirvad, Gaurav Sujit Roy, Juan M. Venegas, III, Ronnie Glenn Blewer
  • Patent number: 11444906
    Abstract: Using proximity data to update user interfaces for users of a communication platform is described. The communication platform can determine, for a first user of the communication platform, a first location of the first user and for at least a second user of the communication platform, a second location of the second user. Based at least in part on a determination that the first location and the second location satisfy a condition, the communication platform can cause a user interface of the communication platform to be updated, wherein the updated user interface indicates at least one of (i) proximity data associated with the first user and the second user or (ii) context data associated with at least one of the first user or the second user.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: September 13, 2022
    Assignee: Slack Technologies, LLC
    Inventors: Justin Rushing, Akshay Bakshi, Scott Buchanan, Leena Mansour
  • Patent number: 11431656
    Abstract: A switch identification method in by a computer includes sending a first packet to a first virtual switch emulating a first physical switch, and identifying a second virtual switch that is an allocation destination to which the first virtual switch allocates the first packet, and referring, to a storage unit that stores a switch correspondence information that associates a second physical switch that is an allocation destination of the first physical switch with the second virtual switch, and identifying the second physical switch that is the allocation destination to which the first physical switch allocates a second packet emulated by the first packet.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: August 30, 2022
    Assignee: FUJITSU LIMITED
    Inventor: Junichi Higuchi
  • Patent number: 11422849
    Abstract: A data processing system with technology for dynamically grouping threads includes a machine-readable medium and first and second cores, each with multiple logical processors (LPs). The system also comprises an operating system which, when executed, enables the system to select an LP to receive a new low-priority thread and to assign the new low-priority thread to the selected LP. The operation of selecting an LP to receive the new low-priority thread comprises, when the first core has multiple idle LPs, automatically determining whether the second core has an idle LP and a busy LP that is executing a current low-priority thread. In response to determining that the second core has an idle LP and a busy LP that is executing a current low-priority thread, the system automatically selects the idle LP in the second core to receive the new low-priority thread. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Deepak Samuel Kirubakaran, Vijay Dhanraj, Russell Jerome Fenger, Hisham Abu-Salah, Eliezer Weissmann
  • Patent number: 11423291
    Abstract: An arithmetic device includes storage, a controller, and operation circuitry. The storage stores therein P-dimensional input vectors, P×N-dimensional matrixes, N-dimensional intermediate value vectors, and N-dimensional output vectors, and is capable of executing, in parallel, two or more of reading processing of the input vector, reading processing of the matrix, reading processing of the intermediate value vector, and writing processing of the output vector. The controller sets read timings of a first input vector, a first matrix, and a first intermediate value vector, and write timing of a first output vector, in operation processing including a D-dimensional processing loop. The operation circuitry calculates product of the first input vector and the first matrix, calculates sum of the product and the first intermediate value vector, and stores the sum as the first output vector in the storage.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: August 23, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Koichiro Ban
  • Patent number: 11422852
    Abstract: A processor includes a plurality of cores configured to perform operations independently, a memory, and a control circuit electrically connected to the plurality of cores and the memory. The control circuit is configured to acquire one or more instructions associated with a task, store data corresponding to the task based on the one or more instructions, transmit the instructions to the at least some cores, check one or more cores that have responded to the instructions among the at least some cores, prevent the task from being allocated to the cores except for one core if the task is allocated to the one core, and allocate the task to one of the cores, the allocation of the task including changing state information associated with the allocation and setting other cores not allocated the task among the plurality of cores not to access the data corresponding to the task.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: August 23, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won Jin Kim, Keong Ho Lee, Hyuk Min Kwon, Rakie Kim
  • Patent number: 11422858
    Abstract: A workload/processor resource scheduling system is coupled to a processing system. The workload/processor resource scheduling system monitors a performance of first workload(s) by the processing system according to a workload/processor resource schedule, and identifies a correlation between the performance of the first workload(s) according to the workload/processor resource schedule, and an operating level of a processing system operating parameter for the processing system when performing the first workload(s) according to the workload/processor resource schedule. Based on the correlation, the workload/processor resource schedule and the processing system operating parameter are linked.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: August 23, 2022
    Assignee: Dell Products L.P.
    Inventor: John Kelly
  • Patent number: 11422912
    Abstract: Accurate time estimates for operations performed on an SDDC are disclosed. The method includes receiving information about a job performed on an SDDC from at least one of a plurality of different reporting SDDC's, the information including a description of the SDDC, a description of the job performed on the SDDC, and a plurality of time stamps, each time stamp indicative of an operation performed on the SDDC in order to complete the job. The information is stored in a database in a granular time-based data set. When a request for a time estimate for a yet-to-be-performed job is received from at least a second SDDC (the request including a description of the SDDC), the stored information is used in conjunction with the description of the second SDDC to generate a time estimate for the yet-to-be-performed job.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: August 23, 2022
    Assignee: VMware, Inc.
    Inventor: Krzysztof K. Pierscieniak
  • Patent number: 11416176
    Abstract: Systems and methods for distributed storage and processing systems using storage controllers for load sharing are described. A host processor may receive a function request that corresponds to a plurality of compute tasks, such as map compute tasks targeting data in local storage. The host processor may fetch the data from local storage devices through storage controllers. At least one storage controller, such as a non-volatile memory express (NVMe) interface controller, may be configured to execute overflow tasks for the function request. Another storage controller may be configured for executing other processing and management activities, such as reduce compute tasks.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: August 16, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventor: Dinesh Kumar Agarwal
  • Patent number: 11416399
    Abstract: A server includes a field programmable gate array (FPGA) partitioned into a set of partial reconfiguration (PR) slots and a memory that supports a set of logical buffers. A deterministic application request module (DARM) receives application requests to allocate the set of reconfiguration slots to one or more tenants and the one or more tenants configure the allocated reconfiguration slot to perform tasks. The DARM stores data associated with the application request in a first logical buffer from the set of logical buffers. A reconfiguration slot scheduling (RSS) module identifies a first reconfiguration slot from the set of reconfiguration slots and associates the first reconfiguration slot with the first logical buffer. A reconfiguration slot initialization (RSI) module reconfigures the first reconfiguration slot to perform the tasks based on the data stored in the first logical buffer.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: August 16, 2022
    Assignee: Nokia Solutions and Networks Oy
    Inventors: Andrea Enrici, Bogdan Uscumlic
  • Patent number: 11403138
    Abstract: A method for handling a relative priority based scheduling procedure in an electronic device. The method includes receiving at least one task, from an application, to access a first core from a plurality of cores in the electronic device. Further, the method includes determining a relative priority with at least one second core from the plurality of cores in the electronic device based on the at least one task. Further, the method includes scheduling the at least one task in the first core from the plurality of cores in the electronic device based on the relative priority.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: August 2, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Anup Manohar Kaveri, Nischal Jain, Rohit Kumar Saraf, Samarth Varshney, Shwetang Singh, Vinayak Hanagandi, Srinivasa Rao Kola, Younjo Oh
  • Patent number: 11403145
    Abstract: Computing systems, for example, multi-tenant systems deploy software artifacts in data centers created in a cloud platform using a cloud platform infrastructure language that is cloud platform independent. The system allows users to specify a system configuration freeze for a time interval for services running in a datacenter configured on a cloud platform. During the system freeze, changes to the system are prohibited or put on hold. The system generates pipelines for modifying system configuration of services. A pipeline includes a change stage for making a change associated with a service and a pre-change stage for acquiring a lock. If the system receives a request for performing system freeze of a datacenter entity, the system acquires locks on services of the datacenter entity. As a result, execution of pipelines configured to change the system configuration of the services is put on hold.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: August 2, 2022
    Assignee: Salesforce, Inc.
    Inventor: Jeaneth Vergara
  • Patent number: 11403139
    Abstract: An information processing device includes: a plurality of threads, each of the plurality of threads being configured to process any of a plurality of tasks, the plurality of tasks being obtained by dividing a job; and a control circuit configured to execute processing when designating a next task in scheduling for the plurality of threads, the processing including inquiring of an assignment destination thread out of the plurality of threads as to whether the next task is to be completed by a scheduled time, and preferentially assigning a task supposed to be completed by the scheduled time in the assignment destination thread, as the next task from among the plurality of tasks.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: August 2, 2022
    Assignee: Fujitsu Limited
    Inventor: Ken Iizawa
  • Patent number: 11386522
    Abstract: Disclosed herein are systems and methods for correcting distortion in a camera lens. The methods can include receiving at least one image of a calibration object, in which the image is captured via the camera lens and the lens has lens distortion. The methods can further include fitting a plurality of geodesics in the image; determining at least one connection equation for the plurality of geodesics; and determining a metric based on the connection equation, the metric comprising a first distorted radial coordinate. The methods can further include determining an undistorted radial coordinate based on the first distorted radial coordinate; determining a second distorted radial coordinate as a function of the undistorted radial coordinate; inverting the undistorted radial coordinate; and generating an undistorted image based on the inverted undistorted radial coordinate.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: July 12, 2022
    Inventors: Gabriel Archacki Hare, Keith Mertens, Daniel Rothman
  • Patent number: 11386451
    Abstract: An advertising system has limited computing resources to spend evaluating advertisements of advertisers to determine a “best” advertisement to serve to users of a social networking system. The computing resources are allocated (e.g., by varying the number of advertisements that are considered for presentation to a user) based on the neediness of the user and/or the advertiser on a per impression basis. The neediness of a user may be determined by grouping users into groups and determining a yield curve of expected revenue per computing resource used. Then, the revenue may be maximized across impression opportunities for multiple users. The neediness of an advertiser may be determined by biasing the selection of one advertiser's advertisements over another advertiser's advertisements based on an expected revenue, an expected number of interactions of the advertisement, or otherwise maximizing a satisfaction coefficient for the advertiser.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: July 12, 2022
    Assignee: META PLATFORMS, INC.
    Inventors: Andrew John Tulloch, Stuart Michael Bowers, Joaquin Ignacio Quinonero Candela
  • Patent number: 11385870
    Abstract: A non-transitory computer-readable recording medium storing a data transformation program that causes a processor to execute a process. The process includes generating a plurality of first programs, each of the first programs transforming first input data and outputting first output data, contents of the transforming by the plurality of the first programs being different from each other, and among a plurality of pieces of a second input data different from the first input data, outputting the second input data that maximizes an entropy of a plurality of pieces of second output data, where each of the first programs transforms the second input data to the second output data.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: July 12, 2022
    Assignee: Fujitsu Limited
    Inventor: Yoshifumi Ujibashi
  • Patent number: 11372673
    Abstract: Embodiments of the present disclosure disclose an artificial intelligence chip and an instruction execution method for an artificial intelligence chip. A specific embodiment of the artificial intelligence chip includes: an instruction memory, a data memory, at least one general execution unit, and at least one dedicated execution unit. The instruction memory is configured to: receive a kernel code including at least one code block. The general execution unit is configured to: receive the code block, lock the dedicated execution unit associated with the received code block, and send an instruction in the received code block to the locked dedicated execution unit. The dedicated execution unit is configured to: execute the received instruction, and store an execution result in the data memory. The data memory is configured to: store the execution result sent by the dedicated execution unit.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: June 28, 2022
    Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Ningyi Xu, Yan Huang, Jinchen Han, Peng Wu, Jiaxin Shi
  • Patent number: 11372851
    Abstract: A method for rapid data analysis includes receiving and interpreting a first query operating on a first dataset partitioned into shards by a first field; collecting a first data sample from a first set of data shards; calculating a first result to the first query based on analysis of the first data sample; and partitioning a second dataset into shards by a second field based on the first result.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: June 28, 2022
    Assignee: Scuba Analytics, Inc.
    Inventors: Robert Johnson, Lior Abraham, Ann Johnson, Boris Dimitrov, Don Fossgreen
  • Patent number: 11372672
    Abstract: A method and apparatus that schedules and manages a background task for device is described. In an exemplary embodiment, the device registers the background task, where the registering includes storing execution criteria for the background task. The execution criteria indicates a criterion for launching the background task and the execution criteria based on a component status of the device. The device further monitors the running state of the device for an occurrence of the execution criteria. If the execution criteria occurs, the device determines an available headroom with the device in order to perform the background task and launches the background task if the background task importance is greater than the available device headroom, where the background task importance is a measure of how important it is for the device to run the background task.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: June 28, 2022
    Assignee: Apple Inc.
    Inventors: Daniel Andreas Steffen, Kevin James Van Vechten
  • Patent number: 11366648
    Abstract: Systems and methods for compiling functions into a single entity are disclosed. An execution graph representing dependencies between a plurality of functions is analyzed to identify portions of the graph that include two or more of the plurality of functions used as a combined entity and have a single entry point. The plurality of functions corresponds to a decomposed application. The processing device compiles the functions of each of the identified one or more portions of the graph into a composition. For each portion of the graph that includes two or more of the plurality of functions used as a combined entity and has multiple entry points, the processing device determines whether to compile each function providing a subsequent entry point to the portion into a composition with other functions of the portion based at least in part on a network latency and a scale efficiency of the application.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: June 21, 2022
    Assignee: Red Hat, Inc.
    Inventor: Markus Thoemmes
  • Patent number: 11360809
    Abstract: Embodiments of apparatuses, methods, and systems for scheduling tasks to hardware threads are described. In an embodiment, a processor includes a multiple hardware threads and a task manager. The task manager is to issue a task to a hardware thread. The task manager includes a hardware task queue to store a descriptor for the task. The descriptor is to include a field to store a value to indicate whether the task is a single task, a collection of iterative tasks, and a linked list of tasks.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 14, 2022
    Assignee: Intel Corporation
    Inventors: William Paul Griffin, Joshua Fryman, Jason Howard, Sang Phill Park, Robert Pawlowski, Michael Abbott, Scott Cline, Samkit Jain, Ankit More, Vincent Cave, Fabrizio Petrini, Ivan Ganev
  • Patent number: 11360763
    Abstract: One embodiment of the invention provides a method for automated code annotation in machine learning (ML) and data science. The method comprises receiving, as input, a section of executable code. The method further comprises classifying, via a ML model, the section of executable code with a stage classification label indicative of a stage within a workflow for automated ML that the executable code applies to. The method further comprises categorizing, based on the stage classification label, the section of executable code with a category of annotation that is most appropriate for the section of executable code. The method further comprises generating a suggested annotation for the section of executable code based on the category of annotation. The method further comprises providing, as output, the suggested annotation to a display of an electronic device for user review. The suggested annotation is user interactable via the electronic device.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: June 14, 2022
    Assignee: International Business Machines Corporation
    Inventors: Dakuo Wang, Lingfei Wu, Yi Wang, Xuye Liu, Chuang Gan, Si Er Han, Bei Chen, Ji Hui Yang
  • Patent number: 11360544
    Abstract: In order to manage power on a wearable computing device, a processor of the wearable computing device identifies one or more events. The processor determines a priority of each of the one or more events. Based on the priority of each of the one or more events, the processor determines whether to process the event. When the processor determines that the event is to be processed, the processor determines whether to defer processing of the event.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: June 14, 2022
    Assignee: Google LLC
    Inventors: David James Mak-Fan, Shivani Tyagi
  • Patent number: 11356334
    Abstract: A method is provided for sparse communication in a parallel machine learning environment. The method includes determining a fixed communication cost for a sparse graph to be computed. The sparse graph is (i) determined from a communication graph that includes all the machines in a target cluster of the environment, and (ii) represents a communication network for the target cluster having (a) an overall spectral gap greater than or equal to a minimum threshold, and (b) certain information dispersal properties such that an intermediate output from a given node disperses to all other nodes of the sparse graph in lowest number of time steps given other possible node connections. The method further includes computing the sparse graph, based on the communication graph and the fixed communication cost. The method also includes initiating a propagation of the intermediate output in the parallel machine learning environment using a topology of the sparse graph.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: June 7, 2022
    Inventors: Asim Kadav, Erik Kruus
  • Patent number: 11354154
    Abstract: Distributed timer task execution management is disclosed. A cluster member generates a first timer task that can be executed on any cluster member of a plurality of cluster members including the first cluster member that composes a cluster. A first timer task schedule that identifies at least one future point in time at which the first timer task is to be executed is generated. A second cluster member of the plurality of cluster members is selected as a cluster member owner for the first timer task that is to schedule the first timer task and to execute the first timer task at the at least one future point in time. The first timer task and the first timer task schedule are transferred to the second cluster member.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: June 7, 2022
    Assignee: Red Hat, Inc.
    Inventors: Paul M. Ferraro, Radoslav Husar
  • Patent number: 11353868
    Abstract: One or more examples include an apparatus having a hardware barrier logic to detect thread groups relating to machine learning operations and facilitate barrier synchronization of the thread groups across multiple dies representing multiple processors, such that data processing using the threads groups across the multiple processors is synchronized and stall-free.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: June 7, 2022
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Altug Koker, Joydeep Ray, Balaji Vembu, John C. Weast, Mike B. Macpherson, Dukhwan Kim, Linda L. Hurd, Sanjeev Jahagirdar, Vasanth Ranganathan
  • Patent number: 11347566
    Abstract: Methods and systems are provided for supporting operation of a plurality of software plugins of an IHS (Information Handling System). Incoming plugin commands are received and stored to a queue of a plurality of progressively weighted queues. The weighted queue is selected for storing the incoming plugin command based on a time constraint associated with the command. A proximate command is selected for processing from a queue of the plurality of weighted queues based on a weighted time for processing the proximate command. A recipient plugin of the proximate command is determined. Any plugin groups that the recipient is a member of are identified. The plugins of the first plugin group, including the recipient plugin, are activated to allocate use of IHS resources to the activated plugin.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: May 31, 2022
    Assignee: Dell Products, L.P.
    Inventors: Vivek Viswanathan Iyer, Srikanth Kondapi, Abhinav Gupta
  • Patent number: 11340952
    Abstract: A function performance trigger for a cloud computing system is disclosed. A function is to be run in response to the trigger. A template for a function in the cloud computing system is generated. The trigger is defined for the function based upon a performance parameter of the cloud computing system.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 24, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventor: Hesham Yassin
  • Patent number: 11340940
    Abstract: An application may be migrated from a first to a second computing system. Configuration parameter values associated with executing the migrated application on the second computing system may be determined by computational optimization based on configuration parameter values and/or monitored performance metrics associated with the application on the first computing system. Configuration parameter values associated with executing the migrated application on the second computing system may be determined by performing simulations of the migrated application configured for execution on the second computing system based on multiple sets of configuration parameter values, monitoring performance metrics associated with the simulations, and performing computational optimization based on the multiple sets of configuration parameter values and monitored performance metrics associated with the simulations.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: May 24, 2022
    Assignee: Bank of America Corporation
    Inventors: Anuja Savant, Pramodh Siril Rao Chennamaneni, Sasidhar Purushothaman, Alla Piltser, Zaheeruddin Mohammed
  • Patent number: 11334627
    Abstract: A computer-processor-implemented data processing method comprises: a computer processor executing instances of one or more processing functions, each instance of a processing function having an associated function-call identifier; and in response to initiation of execution by the computer processor of a given processing function instance configured to modify one or more pointers of a partitioned acyclic data structure: the computer processor storing the function-call identifier for that processing function instance in a memory at a storage location associated with the partitioned acyclic data structure; for a memory location which stores data representing a given pointer of the partitioned acyclic data structure, the computer processor defining a period of exclusive access to at least that memory location by applying and subsequently releasing an exclusive tag for at least that memory location; and the computer processor selectively processing the given pointer during the period of exclusive access in depende
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: May 17, 2022
    Assignee: Arm Limited
    Inventor: Brendan James Moran
  • Patent number: 11334391
    Abstract: A method of adjusting a set of resources allocated for a job includes analyzing, by a job tuning module, an intermediate result of a job. Processing the job includes processing a first iteration of a task and a second iteration of the same task. Additionally, the intermediate result is a result of the first iteration of the task, and the job is allocated a first set of resources during processing of the first iteration of the task. The method also includes sending a notification to a scheduler that causes the scheduler to adjust the first set of resources allocated to the job to a second set of resources for processing the second iteration of the task. The job may be allocated the second set of resources during processing of the second iteration of the task.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 17, 2022
    Assignee: RED HAT, INC.
    Inventors: Huamin Chen, Jay Vyas
  • Patent number: 11321125
    Abstract: In a multitask computing system, there are multiple tasks include a first task, a second task, and a third task, and the first task has a higher priority than that of the second task and the third task. A method including raising the priority of the second task that shares a first critical section with the first task and is accessing the first critical section when the first task is blocked due to failure to access the first critical section; determining whether there is a third task that shares a second critical section with the second task and is accessing the second critical section; and raising, when the third task is present, the priority of the third task. The techniques of the present disclosure prevent a low-priority third task from delaying the execution of a second task, thus avoiding the priority inversion caused by the delayed execution of a high-priority first task.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 3, 2022
    Assignee: Alibaba Group Holding Limited
    Inventors: Lingjun Chen, Bin Wang, Liangliang Zhu, Xu Zeng, Zilong Liu, Junjie Cai
  • Patent number: 11321265
    Abstract: A method of transferring data from a first bus to a second bus across an asynchronous interface using an asynchronous bridge. The bridge comprises a bus slave module, connected to the first bus, comprising a forward-channel initiator in a first power and/or clock domain; and a bus master module, connected to the second bus, comprising a forward-channel terminator in a second power and/or clock domain. The forward-channel initiator and terminator are in communication to form a forward lockable mutex for arbitrating access to signals used to transfer data from the first domain to the second domain. If the mutex is locked, a forward data channel is used to transfer data between the domains. Otherwise if the mutex is unlocked, the forward channel initiator toggles a status request signal and the forward channel terminator toggles a status acknowledge signal in response, the mutex thereby becoming locked.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: May 3, 2022
    Assignee: Nordic Semiconductor ASA
    Inventor: Berend Dekens
  • Patent number: 11321118
    Abstract: In one embodiment, a method includes empirically analyzing, by a computer cluster comprising a plurality of computers, a set of active reservations and a current set of consumable resources belonging to a class of consumable resources. Each active reservation is of a managed task type and comprises a group of one or more tasks task requiring access to a consumable resource of the class. The method further includes, based on the empirically analyzing, clocking the set of active reservations each clocking cycle. The method also includes, responsive to the clocking, sorting, by the computer cluster, a priority queue of the set of active reservations.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 3, 2022
    Assignee: MessageOne, Inc.
    Inventor: Jon Franklin Matousek
  • Patent number: 11321147
    Abstract: A technique for determining when it is safe to use scheduler lock-acquiring wakeups to defer quiescent states in real-time preemptible read-copy update (RCU). A determination may be made whether a deferred quiescent-state reporting request that defers the reporting of an RCU quiescent state on behalf of a target computer task is warranted. If so, it may be determined whether a previous deferred quiescent-state reporting request on behalf of the target computer task remains pending. A request may be issued for deferred quiescent-state report processing that reports a deferred quiescent state. The request for deferred quiescent-state report processing may be issued in a manner selected according to a result of the determining whether a previous deferred quiescent-state reporting request remains pending.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: May 3, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Paul E. McKenney
  • Patent number: 11314870
    Abstract: There is provided a method and system for an advanced endpoint protection. With this methodology, when a file is requested to be executed on any endpoint, all intelligence sources would be checked to decide if that file has any known or potential vulnerability associated with it. If there is any information about any known or potential vulnerability, it would be launched inside the secure container to isolate the all resource usage of that application from the rest of the known good and secure applications in order to achieve the secure computing environment on an endpoint.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: April 26, 2022
    Inventors: Melih Abdulhayoglu, Ilker Simsir
  • Patent number: 11315007
    Abstract: An apparatus to facilitate workload scheduling is disclosed. The apparatus includes one or more clients, one or more processing units to processes workloads received from the one or more clients, including hardware resources and scheduling logic to schedule direct access of the hardware resources to the one or more clients to process the workloads.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: April 26, 2022
    Assignee: Intel Corporation
    Inventors: Liwei Ma, Nadathur Rajagopalan Satish, Jeremy Bottleson, Farshad Akhbari, Eriko Nurvitadhi, Chandrasekaran Sakthivel, Barath Lakshmanan, Jingyi Jin, Justin E. Gottschlich, Michael Strikland
  • Patent number: 11307864
    Abstract: The disclosure provides a data processing device and method. The data processing device may include: a task configuration information storage unit and a task queue configuration unit. The task configuration information storage unit is configured to store configuration information of tasks. The task queue configuration unit is configured to configure a task queue according to the configuration information stored in the task configuration information storage unit. According to the disclosure, a task queue may be configured according to the configuration information.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: April 19, 2022
    Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Tianshi Chen, Lei Zhang, Shaoli Liu
  • Patent number: 11307986
    Abstract: Systems and methods for dynamically placing data in a hybrid memory structure are provided. A machine learning (ML)-based, adaptive tiered memory system can actively monitor application memory to dynamically place the right data in the right memory tier at the right time. The memory system can use reinforcement learning to perform dynamic tier placement of memory pages.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: April 19, 2022
    Assignee: THE FLORIDA INTERNATIONAL UNIVERSITY BOARD OF TRUSTEES
    Inventors: Adnan Maruf, Janki Bhimani, Ashikee Ghosh, Raju Rangaswami
  • Patent number: 11307805
    Abstract: A disk drive comprises non-volatile rotatable media and a controller operatively coupled to the non-volatile rotatable media. The controller is configured to receive a series of host commands to be executed by the controller and generate a command execution sequence comprising the series of host commands. A task manager, integral or coupled to the controller, is configured to receive a plurality of background tasks comprising a least two priority background tasks to be executed by the controller along with execution of the series of host commands, and insert one or more of the at least two priority background tasks into the command execution sequence while maintaining a specified ratio of priority background task execution and host command execution substantially constant. The controller is configured to execute the command execution sequence with the one or more inserted priority background tasks.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: April 19, 2022
    Assignee: Seagate Technology LLC
    Inventors: Xiong Liu, Jin Quan Shen