Patents Represented by Attorney, Agent or Law Firm Edward J. Kondracki
  • Patent number: 6422470
    Abstract: The invention relates to a process for the secure processing of a sensitive logical element (S2) in a storage register (30) containing several words (31-38), each formed of several logical elements (L1-L8, S1-S8). The process comprises: defining a first auxiliary word containing several logical elements randomly defining the position of a sensitive word (36) among the words of the storage register, which is intended to store the sensitive logical element (S2), and within the sensitive word, the position of the sensitive logical element among the logical elements of the sensitive word, the other words (31-35, 37, 38) of the storage register constituting decoy words; and using the first auxiliary word to select the sensitive word (36) and storing the sensitive logical element (S2) in its position within the sensitive word.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: July 23, 2002
    Assignee: Bull CP8
    Inventors: Benoît Bole, Jean-Luc Salles
  • Patent number: 6424962
    Abstract: A method of automated proving for unrestricted first-logic to test the satisfiability of clause sets describing an industrial system which applies the instance generation rule ( IG ) ⁢   ⁢ Ψ Ψ ⁢   ⁢ σ where &PSgr; is a term, &sgr; a substitution and &PSgr;&sgr; an instance of &PSgr; yielded by the substitution &sgr;, and is characterized in that, instance subtraction is defined as the substraction of the instance &PSgr;&sgr; from &PSgr; resulting in a generalized term which is a triplet <&PSgr;, &sgr;, &Lgr;> where &Lgr; is a finite set of standard substitutions {&lgr;1, . . . , &lgr;n} and defined by GE(<&PSgr;, &sgr;, &Lgr;>)=GE(&PSgr;&sgr;)−GE({&PSgr;&lgr;1, . . .
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: July 23, 2002
    Assignee: Bull S.A.
    Inventor: Jean-Paul Billon
  • Patent number: 6404888
    Abstract: A confusion data generator for the generation of non-linear confusion data utilizes a plurality of arrays acting as non-linear state machines to generate a stream of confusion data of a certain width. Each non-linear state machine contributes equally to the overall width of the confusion data. The output bit stream from the confusion data generator is then used with a combiner such as an XOR combiner to generate secure text from plaintext. The confusion data generator can be used to securely store data on a storage medium or transmit data over a communication medium. The confusion data generator is computationally inexpensive, scalable and provides good security when used with a combiner, such as an XOR combiner, to generate secure text.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: June 11, 2002
    Assignee: Zarlink Semiconductor Inc.
    Inventor: Abdulkader Omar Barbir
  • Patent number: 6402041
    Abstract: The invention relates to a control device for controlling the flow of a fluid through a thermostatic faucet comprising a temperature control device (5) within the body of the faucet for controlling the outlet temperature of the fluid and comprising a thermosensitive element (3) and a flow control device (11) for controlling the flow from the faucet. The temperature control device includes a control knob (12) and the flow control device includes a control element (13). This control device is characterized in that the flow control device (11) is disposed downstream from the mixing chamber and controls the flow cross section of an outlet located downstream from the mixing chamber, and the control knob and control element are located on the same side of the body of the faucet that houses the control device, and on the opposite side from the outlet.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: June 11, 2002
    Assignee: Eurotherm Watts, S.A.
    Inventors: Eddy Jelloul, Frédéric Regnier, Laurent Bongrand
  • Patent number: 6401184
    Abstract: A computer system comprises a nonuniform access memory distributed in several places of residence. The memory accesses a physical resource of the memory at a physical address constituted by a field of i bits and a field of j bits. The memory comprises a table with a number of rows equal to a power (i−j) of two, each row being accessible by a field of (i−k) bits of the physical address containing an identifier of the place of residence of the resource. The process for identifying a place of residence of a physical memory resource thereof consists of simply reading the identifier in the row of the table referenced by the field of (i−k) bits.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: June 4, 2002
    Assignee: Bull, S.A.
    Inventors: Nadia Bouraoui, Jean-Pascal Mazzilli
  • Patent number: 6393125
    Abstract: A method and apparatus for the initialization of a class of non-linear confusion data generators is especially useful to enhance the security of non-linear confusion data generators that are restricted to short size secret keys or seeds. The initializer utilizes a user seed and a displacement distance to single or multiple secret key and cipher arrays to randomize confusion data generators such that their security is enhanced. The initializer provides the ability to design confusion data generators that are capable of securing large size data files as a collection of smaller size segments that can be independently decrypted for fast access and review. The initializer can be used to securely store data on a storage medium or transmit data over a communication medium.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: May 21, 2002
    Assignee: Zarlink Semiconductor Inc.
    Inventor: Abdulkader Omar Barbir
  • Patent number: 6384471
    Abstract: The present invention concerns a package for an integrated circuit (3) of the type comprising a cavity (2) in which the integrated circuit (3) is mounted, the active surface (10) of the integrated circuit (3) being electrically connected to the package on the level of connection (Nc) of an array of balls (13i) to the package, providing a mechanical and electrical link between the integrated circuit (3) and a printed circuit card to which the package must be assembled. It is characterized in that it comprises an additional layer (14) that is rigid and electrically neutral, mounted on the level of connection (Nc) of the integrated circuit (3) and the balls (13i) and containing the balls (13i). It particularly applies to the connections of BGA and PBGA packages.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: May 7, 2002
    Assignee: Bull S.A.
    Inventors: Claude Petit, Yves Stricot
  • Patent number: 6373850
    Abstract: A videoconferencing center (31, 33) for data communications and teleprocessing is provided which comprises first routing switches having a plurality of sending ports (51, 53, 55, 57) and a plurality of receiving ports (50, 52, 54, 56), each sending port adapted to be operatively connected to a receiving data terminal equipment unit (10, 28, 29) or to a receiving port of second routing switch (32, 34), each receiving port adapted to be operatively connected to a sending data terminal equipment unit (10, 28, 29) or to a sending port of another group switching center (32, 34). Each receiving port is assigned a receiving stack (102) that is addressable in a single logical address space and each sending port is assigned a sending stack (103) for containing addresses of said single logical address space. The single logical address reduces the risk of losing data received, which risk results from the necessary limits on physical addresses of stacks.
    Type: Grant
    Filed: July 6, 1998
    Date of Patent: April 16, 2002
    Assignee: Bull S.A.
    Inventors: Georges Lecourtier, Anne Kaszynski
  • Patent number: 6370674
    Abstract: The components of performance analysis considered within the scope of the invention are, in particular, the determination of the speed at which a circuit or a circuit component can generate output signals from input signals, and the noise immunity of the circuit. The process for evaluating the performance of a very high scale integrated circuit comprises: a first step (E1) in which, for each lead (Li) of said circuit, an equivalent coupling capacity value (CTi) relative a fixed potential, is generated as being a sum of the existing real coupling capacity values (Cij) of leads (Lj) of said circuit with said lead (Li), each of which is assigned a weighting coefficient (Kij); and a second step (E2) following said first step (E1), in which a switching time interval ([tid,tif]) in each lead (Li) is generated as being a function of said equivalent capacity (CTi). The fixed potential may be ground.
    Type: Grant
    Filed: January 20, 1999
    Date of Patent: April 9, 2002
    Assignee: Bull S.A.
    Inventor: Michel Thill
  • Patent number: 6362960
    Abstract: A case (1) for housing at least one unit of electronic equipment (2) includes at least one fan (3) and an opening (15) for extracting the fan (3). A moving element (18, 28, 4, 33) is provided which, when the fan (3) is inside the case (1), is maintained in contact with at least one side of the fan (3). When the fan (3) is not inside the case (1), the moving element is maintained in contact with the case (1) so as to obstruct the opening (15) of the case (1) through which the fan is extracted.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: March 26, 2002
    Assignee: Bull, S.A.
    Inventors: Emmanuel Ducourt, Jean-Paul Prevot
  • Patent number: 6340043
    Abstract: A series of flexible sheets are used around a pallet with products thereon, the pallet being disposed in a tunnel. The flexible sheets fill with air pressure supplied at one end of the tunnel such that air leakage around the periphery of the pallet and products is prevented. The arrangement is used to maintain the products at desired temperatures.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: January 22, 2002
    Inventor: Michel Paupardin
  • Patent number: 6338072
    Abstract: A system and process for dynamically controlling the allocation of resources in a “UNIX” open data processing system that includes a local resource manager, wherein the system is configured to sort jobs by dimension, which is defined as a set of currently executed processes which have the same importance from the point of view of the local resource manager. The system is configured to assign a relative weight to each of the dimensions by the user, and to adjust execution priorities of the jobs of each dimension as a function of the relative weights of the dimensions when the system is heavily loaded.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: January 8, 2002
    Assignee: Bull S.A.
    Inventors: Daniel Lucien Durand, Gérard Sitbon, François Urbain
  • Patent number: 6338080
    Abstract: The present invention relates to a process and a device for handling the execution of a job in an open data processing system as a function of the resources. The process comprises the following steps: determining the resources available in virtual memory, real memory, temporary file space, central processing unit utilization time during the last time interval; computing the amount of resources preallocated to other requests and not yet used; comparing the amount of resources required for the execution of a job for which the request has been presented to the current amount of resources available minus the total amount of resources preallocated to other requests, in order to determine as a function of the result of this comparison the start, the deference or the denial of the start of the job requested.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: January 8, 2002
    Assignee: Bull S.A.
    Inventors: Daniel Lucien Durand, Gérard Sitbon
  • Patent number: 6321686
    Abstract: A multi-purpose, species-discriminating bird feeder includes a base, a top, and a plurality of sides extending between the base and the top. At least two of the sides include an upper side member and a lower side member. The upper and lower side members are at least partially spaced from each other to provide an ingress/egress opening so that birds of a selected size may enter and exit an interior portion of the bird feeder through its sides. Birds or mammals larger than the selected size are prevented from entering the interior portion. Each upper side member is manually selectively adjustable so that a size of the respective ingress/egress opening between the upper and lower side members may be adjusted. The construction of the bird feeder provides good visibility for the birds to enter the bird feeder and for bird watchers to watch the birds feed. In addition, the location of the ingress/egress openings allows prompt exit from the feeder by birds disturbed by predators or other disturbance.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: November 27, 2001
    Assignee: Wild Bird Centers of America, Inc.
    Inventors: Aelred D. Geis, Dan A. Bloedorn, Jane Crowley
  • Patent number: 6318878
    Abstract: A portable reading lamp having an attached conformable base is provided. The conformable base comprises a sealed bag of granular displaceable material which enables the lamp to be easily mounted on most surfaces, including the user's body, by conforming to the profile of the underlying surface. The conformable bag is arranged to receive and releaseably retain an attached lamp assembly operably embedded into the displaceable material and adjusted in such a way that the light beam produced by the lamp is acceptably stable and has a sufficiently narrow span of illumination to achieve an acceptable level of illumination while being restricted to the reading material.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: November 20, 2001
    Inventor: Jerold W. Dorfman
  • Patent number: 6321361
    Abstract: The present invention relates to a process for detecting errors in an integrated circuit constituting a high-speed serial-parallel communication port and which allows a restart in case of an error, the port (100) comprising, in a sending part (40) which encodes each message, at last one buffer (TDBUF) for data to be transmitted issuing from a parallel bus and, in a receiving part (41), at least one buffer (RDBUF) for data to be received, the process comprising: checking the consistency of the messages, checking the consistency of a character stream constituting the messages, verifying the synchronous and cyclical utilization of the buffers of the sending (40) (TDBUF) and receiving (41) (RDBUF) parts, and checking the data of the messages by calculating a cyclic redundancy check (CRC) code on the data of each message.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: November 20, 2001
    Assignee: Bull S.A.
    Inventors: Jean-François Autechaud, Christophe Dionet
  • Patent number: 6317838
    Abstract: A method and architecture allowing a remote user, especially an Internet remote user, to securely access private resources protected by a firewall. The architecture comprises a computer facility and many remote user terminals connected via the Internet. The computer facility comprises a security server that controls a security database. The firewall comprises a centralized security means, which is under the control of a security server and is arranged to authenticate remote users and to provide a security profile describing all resources a user may access with a single sign-on data during a single session. A user's terminal further includes a device to generate one-time passwords and the computer includes a device to decode the passwords. The accessed resources may be servers or logical units acceded though protocols having a notion of authentication.
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: November 13, 2001
    Assignee: Bull S.A.
    Inventor: Eric Baize
  • Patent number: 6305074
    Abstract: The process for mounting an integrated circuit (11) on a support (10) comprising a structure (13) of conductors (14) comprises connecting the conductors to respective terminals (12) of the integrated circuit without interposing a part of the support for insulating the conductors of the integrated circuit as in the standard TAB technology. The connection can be made directly by thermocompression or ultrasound, or indirectly through ball bonds. It is only after the connection that the insulation between the conductors and the integrated circuit is applied. The insulating substrate of the TAB support (10) can be attached to the conductors outside the integrated circuit, before or after the connection of the conductors.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: October 23, 2001
    Assignee: Bull, S.A.
    Inventor: Patrick Courant
  • Patent number: 6305015
    Abstract: An information processing system architecture comprising a set of software products subdivided into domains (21-23), each of which comprises at least one software product. Each domain (21-23) contains specific information comprising an identifier of the domain (21-23), its attributes, and data on the software products comprising it. These data allow the installation and/or the updating of the domains (21-23) in accordance with a set of rules. The software products are constituted of products that are fully integrated into the domains, which follow standard installation and/or updating rules common to the system, and of heterogeneous products from external sources whose packaging and installation and/or updating rules remain specific. A consistency check of the version can be carried out on all or some of these external products. The system (2) comprises at least two specific domains for the operating system (21) and the operations monitor (23) of the system (2).
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: October 16, 2001
    Assignee: Bull S.A.
    Inventors: Jean Akriche, Jean-Marie Lanquetin, Alain Leteinturier, Gérard Sitbon, Jean-François Touzan
  • Patent number: D459726
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: July 2, 2002
    Assignee: Cherry GmbH
    Inventor: Markus Kuchler