Abstract: In a signal processing integrated circuit having a plurality of physical channels and a plurality of gain registers, a plurality of offset registers and an plurality of setup registers, mechanisms are provided to assign one of a plurality of gain registers independently of a selected one of a plurality of offset registers when processing signals from a physical channel.

Abstract: Processing circuiter 100 is provided having a passive data transfer capability. Processing circuitry 100 includes a bus 116, a first subsystem 105 coupled to bus 116 through first passive transfer logic 120a, and a second subsystem 108 coupled to bus 116 through second passive transfer logic 120b. Processing circuitry 100 further includes control circuitry 101/103 coupled to bus 116 for initiating a passive data transfer between first and second subsystems 105 and 108, first and second passive transfer logic 120a and 120b there after controlling exchange of data between the first and second subsystems 105 and 108 independent of the control circuitry 101/103.

Abstract: A multicolor display element includes a plurality of display areas arranged in a pattern, each including light emitting diodes of respective primary colors, which are coupled to the buses in accordance with their colors. A single enable input is provided for receiving an enable signal having an active level and an inactive level, for selectively extinguishing the entire display element and for illuminating the selected display areas in a desired color. The enable input jointly controls the conductivity of tri-state buffers which are respectively coupled to the buses.

Abstract: An optical disk pickup system 400 using current mode signal transmission is disclosed. An operational amplifier 404 has an input for receiving an electrical signal and a feedback loop including a current path of a first transistor 405 of a first size, transistor 405 having a control terminal at a preselected voltage. A conductor 402 is coupled to an output of operational amplifier 404 for transmitting the electrical signal as a current. A second transistor 406 of a second size has a current path in series with a conductor 402 and a control terminal coupled to the preselected voltage, transistors 405, 406 forming a current divider.

Abstract: A memory architecture 400 includes an array of memory cells partitioned into a plurality of subarrays 401. Each subarray 401 includes a plurality of memory cells organized in rows and columns, each row associated with a conductive wordline 407 and each column associated with a pair of conductive half-bitlines 403. The first sense amplifier 402 is selectively coupled to selected pair of half-bitlines 403. A second sense amplifier 402 is selectively coupled to the selected pair of half-bitlines 403. A first local I/O line 404 is coupled to first sense amplifier 402 and a second local I/O line 404 is coupled to the second sense amplifier 402. First and second sets of global I/O lines 405 are selectively coupled to the first and second I/O lines 404.

Abstract: A variable color complementary display device includes a plurality of display areas arranged in a pattern for selectively exhibiting a plurality of display units. Each display area includes a plurality of pairs of light emitting diodes for emitting, when forwardly biased, light signals of respective primary colors and a device for combining the light signals in the display area to obtain a light signal of a composite color. Each pair includes a first light emitting diode and a second light emitting diode, both of the same color, connected in an anti-parallel fashion such that their polarities are opposite. A device is provided for selectively forwardly biasing the first light emitting diodes, for illuminating certain of the display areas in a display color. The second light emitting diodes in the remaining display areas are automatically illuminated in a complementary color.

Abstract: A hinged cap with a cap body having a raised portion with an outlet opening in its upper boundary wall, a hinged lid connected via a hinge to said cap body, and a locking arrangement formed on cap body and on hinged lid. At least the raised portion is formed of an elastically deformable material, and the hinged lid positions tight against at least the lip of the outlet opening in a closed position, exerting pressure on the raised portion in the direction of closure. An element formed of an elastically deformable material is provided on the hinged connection which generates a biasing between the cap body and the hinged lid in order to bring the hinged lid into an opened position.

Abstract: A method of dynamically adjusting a multiple stage pipeline to execute one of a set of instructions, wherein each stage has a latency and performs a selected data operation. An instruction to be executed is received and a number of stages of the pipeline is selected to execute the instruction as needed to perform a corresponding data operation. Unnecessary stages are bypassed to a reduced latency and the instruction is executed with the selected stages.

Abstract: Amplitude control circuitry 5000 includes a first register 5001 for storing received amplitude control data and a second register 5002 for storing amplitude control data transfered from first register 5001. Output circuitry 5005, 5006, 5007 controls the amplitude of a received signal in response to amplitude data transferred from second register. A sensor 5003 determines when data stored in first register 5001 and second register 5002 does not match and enables a comparator 5004 when data in first register 5001 and, second register 5002 does not match. Comparator 5004 compares a signal output from output circuitry 5005, 5006, 5007 with a reference signal and generates a signal for enabling the transfer of data from first register 5001 to second register 5002 when the signal output from output circuitry 5005, 5006, 5007 falls within a window defined by the reference voltage.

Abstract: A memory 200 includes a first memory segment 302 comprising an array of rows and columns of memory cells, a selected column of cells in the first segment 302 accessed through a dedicated sense amplifier 304 associated with the first segment. A second memory segment 302 comprises an array of rows and columns of memory cells, a selected column of cells in the second memory segment 302 accessed through a dedicated sense amplifier 304 associated with the second segment. A Read Input/Output line 306a is coupled to the sense amplifier accessing the selected column of the first segment 302 for reading data from the first segment during a selected access cycle. A Write Input/Output line 306b is coupled to the sense amplifier 304 accessing the selected column of the second segment 302 for simultaneously writing data to the second memory segment 302 during the selected access cycle.

Abstract: A method of operating shared memory in a multiple processor system. A token is by default maintained with a first processor, the token enabling access to shared memory. A determination is made that a second processor requires access to shared memory. A determination is also made as to whether the first processor is accessing to the shared memory. The token is transferred the second processor if the first processor is not accessing the shared memory. The second processor accesses the shared memory with the token.

Abstract: In accordance with the present invention complementary P-channel and N-channel input pairs of transistors form in an op amp. Two sets of such pairs are provided so that a transconductance range of each set of pairs is different. By combining the outputs of each of the sets of P-channel and N-channel pairs, a transconductance glitch is reduced in half.

Abstract: The present invention relates to a single use undergarment for use by neonatal, pediatric, adult and geriatric patients for the purposes of obtaining a measured sample of either fecal or urine material. Such devices are needed in order to gather fecal and urine samples in a safe, non-invasive manner without the assistance of medical professionals.

Abstract: A single chip audio system 100 includes a bus interface 101, digital to analog converters 110, an analog mixer 115, and analog spatial enhancement circuitry 7500. Digital to analog converters 110 convert digital audio data received through bus interface 101 into analog signals. Analog mixer 115 mixes signals received from digital to analog converters 110 with an analog signal received from an external source. Analog spatial enhancement circuitry 7500 enhances first and second mixed analog signals output from analog mixer 115.

Abstract: In accordance with the present invention, a downhole separation tool is provided which utilizes a downhole separation chamber with a series of fluid regulators responsive to a formation fluid and constituent components for separate desirable formation yields from the less desirable yields prior to lifting the fluids to the surface. The separation chamber has an input for the formation fluid, a production output, and a disposal output, in a tree arrangement according to the density order of the fluids in the separation chamber. The input flow regulator is coupled to the separation chamber input, the production regulator is coupled to the production output, and the disposal regulator is coupled to the disposal output. Each of the regulators are responsive to a fluid density of the formation fluid, first constituent and remainder constituent, accordingly, to regulate the flow of the respective fluid.

Abstract: A signal generator 600 includes oscillator circuitry for generating first and second signals having a selected phase relationship and an interpolator 610 for interpolating between a phase of the first signal and a phase of the second signal to generate a third signal having a phase between the phases of the first and second signals.

Abstract: Circuitry 400 for controlling a bidirectional terminal includes an output transistor 405 for selectively coupling the bidirectional terminal to a voltage rail, output transistor 405 turning on when a voltage at a control node falls below a preselected threshold voltage. A diode 402 is coupled to the control node and has a threshold voltage lower than the threshold voltage of the transistor for maintaining the output transistor in a substantially turned off state by maintaining the voltage at the control node above the VDD−VT, where VDD is the supply voltage and VT is the threshold voltage of transistor 405.

Abstract: A method for synchronizing stream processing with a locally generated system time clock is disclosed. A program clock reference is recovered from a transport layer and used to vary the frequency of the locally generated system time clock. A presentation time stamp is recovered from a packetized elementary stream derived from the transport layer. The relationship between a reference sample associated with the presentation time stamp from the packetized elementary stream and a current sample being streamed is determined relative to the system time clock. Data samples are added or subtracted from a stream of data samples being streamed in response to the step of determining to establish a relationship between the stream of samples and the presentation time stamp relative to the system time clock.

Abstract: A prophylactic system 100 for a dental hand piece 101 of a selected shape and having an outlet 112 for providing a fluid to an operating field is disclosed. A cover 102 has a shape substantially similar to the hand piece 101 for enclosing the dental hand piece 101 and includes an aperture 118 for communicating with the operating field. An s-shaped valve 600 includes a path 605 for coupling the fluid from outlet 118 of the hand piece 101 to the aperture 118 of the cover.

Abstract: A method of managing multiple channels of audio data in an audio system having multiple speakers. A first channel signal is selectively passed through a software high-pass filter to selectively drive a first one of the speakers. A plurality of channel signals are selectively summed in software to generate a composite signal and the composite signal passed through a software low-pass filter to selectively drive a second one of the speakers.