Patents Represented by Attorney, Agent or Law Firm Jones Volentine, LLC
  • Patent number: 6228739
    Abstract: A pre-treatment method for improving the growth of hemi-spherical grains (HSGs) on a semiconductor structure by removing etching residue before forming a capacitor storage node having the HSGs. The pre-treatment method includes dry-etching a material layer formed on a surface of a semiconductor substrate to form a storage node pattern on the semiconductor substrate. Multiple ashing sequences are then performed on the semiconductor structure using an etching gas, followed by a stripping step using H2SO4 to remove any residue remaining on the semiconductor structure after the multiple ashing sequences. The semiconductor structure is then cleaned with an ammonium peroxide mixture (APM), and HSGs are thereafter grown on capacitor storage nodes of the storage node pattern.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: May 8, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heon-jae Ha, Hong-seong Son, Young-ki Hong, Jae-inh Song, Chun-yong Park
  • Patent number: 6228737
    Abstract: A plurality of CVD silicon nitride film islands are formed on a lower electrode which is located over a semiconductor substrate. The plurality of CVD silicon nitride film islands are spaced apart from one another to define exposed regions of the lower electrode therebetween. The CVD silicon nitride film islands and the exposed regions of the lower electrode are then subjected to heat treatment in a nitride atmosphere to form thermal silicon nitride films in the exposed regions of the lower electrode. A capacitor insulating film is formed over the CVD silicon nitride film islands and the thermal silicon nitride films, and then an upper electrode is formed over the capacitor insulating film.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: May 8, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Nobuhiko Inoue
  • Patent number: 6230244
    Abstract: Read access to a memory device is controlled by comparing an input control code with a predetermined code stored in the memory device. The comparison is performed inside the memory device, and read access is enabled or disabled according to the result. The control code can be used to select one of several memory devices connected to a common bus, or to provide security for information stored in the memory device.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: May 8, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Nobuhiro Kai
  • Patent number: 6225932
    Abstract: A color palette RAM 100 according to the present invention, which is provided with a RAM 101 for storing color information, an address register 102 that holds an input address and outputs an address to the RAM 101 and a comparator circuit 103 that compares the input address and the address output by the address register, outputs a match signal if these addresses match and stops the operation of the RAM 101 based upon the match signal, is capable of minimizing the level of the power consumed for precharge operations and the like, since the RAM can be set in a disabled state when the same address in the color palette RAM is accessed continuously, as is the case, for instance, when pixels of the same color lie adjacent to one another.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: May 1, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Junichi Yanagihara
  • Patent number: 6225694
    Abstract: A semiconductor device according to the invention of the present application comprises a substrate having a surface on which interconnections are formed, a semiconductor element connected to the interconnections and mounted on the substrate, and a conductive map for covering the semiconductor element electrically connected to a ground potential. Owing to the provision of the conductive cap for covering the semiconductor element in this way, the semiconductor device can prevent the emission of an electromagnetic wave to the outside and can be prevented from malfunctioning due to an external electromagnetic wave.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: May 1, 2001
    Assignee: Oki Electric Industry Co, Ltd.
    Inventor: Makoto Terui
  • Patent number: 6226563
    Abstract: A method for controlling equipment in a semiconductor fabrication system including automatically receiving operational state data from equipment in a semiconductor fabrication system and determining whether the operational state data corresponding to any of the equipment is abnormal. If the operational state data is abnormal for certain equipment, it is determined whether the operational state data indicate all units of the certain equipment are in non-operational states. If all units of the certain equipment are in the non-operational states, all process condition data corresponding to the certain equipment is blocked off in the host computer, whereby the equipment is isolated from a fabrication processing flow. Otherwise, non-operational units of the certain equipment are identified, indicated by respective parameters of the operational state data having non-operational state values, and a subset of the process condition data corresponding to the non-operational units is blocked off in the host computer.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: May 1, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-il Lim
  • Patent number: 6222784
    Abstract: A semiconductor memory of wherein the delay of control signals for controlling sense amplifiers is efficiently controlled without extensively changing a currently-used fabricating process. A dummy bit line pair are arranged between desired bit line pairs in the memory cell array. Since the dummy bit line pair is not related to a normal operation such as reading data stored in memory cells, it is not necessary to dispose a sense amplifier in an area of a sense amplifier array adjacent to the dummy bit line pair. As a result, there is formed a free area in the sense amplifier array. The free area has at least a width between the dummy bit line pair. This free area further forms a contact portion for electrically connecting sense amplifier control signal lines and low resistance sense amplifier control signal lines. That is, this free area is utilized as a shunt area of the sense amplifier control signal lines.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: April 24, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hidekazu Kikuchi
  • Patent number: 6223096
    Abstract: An elevator system automatically adjusts the inclination of a wafer boat during the manufacturing of semiconductor devices so that the wafers in the boat are maintained horizontal during their processing. The elevator system includes the wafer boat, a base on which the boat is supported, an elevator for loading the boat into a processing chamber and removing it from the chamber, a sensing unit for detecting the inclination of the boat relative to the horizontal, a horizontal control unit which is interposed between the base and the elevator and is drivable to maintain the boat in such a position that the wafers in the boat lie in horizontal planes, and a control unit for receiving information from the sensing unit and, based on the information, outputting a control signal to the horizontal control unit.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: April 24, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-huem Nam, Hyun Han, Sun-woo Kawk
  • Patent number: 6222208
    Abstract: A light-emitting diode includes a first semiconductor epitaxial layer of a first conduction type, a second semiconductor epitaxial layer of the first conduction type laminated upon the first semiconductor epitaxial layer and having an energy band gap greater than that of the first semiconductor epitaxial layer, and an area of impurities formed within the first semiconductor epitaxial layer and the second semiconductor epitaxial layer by doping impurity of a second conduction type from the side of the second semiconductor epitaxial layer. A front of the diode is located within the first semiconductor epitaxial layer.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: April 24, 2001
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Masumi Taninaka, Takatoku Shimizu
  • Patent number: 6218725
    Abstract: A bipolar transistor and a method of fabricating the same are provided which are adapted to reduce chip size and production costs. To produce the transistor, a second conductive type well region is formed in a first conductive type semiconductor substrate and isolation trenches are formed at both sides of the well region. A high density second conductive type buried layer is formed in the semiconductor substrate which is formed at the bottom of the isolation trench. The buried layer is formed in two regions surrounding respective bottoms of two adjacent isolation trenches. The two regions are electrically connected with each other and in direct contact with the well region. An extrinsic base region and a device isolation region are formed sequentially onto the semiconductor substrate using a nitration layer pattern as a mask, wherein the nitration layer pattern is formed on the surface of semiconductor substrate.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: April 17, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chang-ki Jeon
  • Patent number: 6216054
    Abstract: A method for controlling preventative maintenance cycles in a semiconductor fabrication system includes automatically receiving, at a preventative maintenance module (PMM) in data communication with a host computer, operating parameter data from equipment in the system. Specification data corresponding to the equipment are retrieved by the PMM from a preventative maintenance cycle data base. It is determined whether the operating parameter data exceeds the specification data at the PMM. If the operating parameter data exceeds the specification data, then a key value of a variable ID corresponding to the equipment is changed, and an operating state of the equipment is modified by inserting the variable ID into an equipment control message and downloading the equipment control message to the equipment.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: April 10, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-man Jang, Jai-seop Choi, Jun Jung
  • Patent number: 6214751
    Abstract: A method of forming a thin film on a plurality of wafers stored in a wafer cassette does not require cleaning the reaction chamber(s) after each thin film formation step. The reaction chamber cleaning is performed after the thin film formation process is performed consecutively at least two times.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: April 10, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Soo-hwan Lee
  • Patent number: 6214637
    Abstract: A method of forming a photoresist pattern having a uniformly fine line width, and a method of manufacturing a semiconductor device using such a photoresist pattern as a mask, include the step of forming an anti-reflective coating (ARC) using only a hydrocarbon based gas. A highly reflective layer is formed on a semiconductor substrate on which an underlayer is disposed. Using only a hydrocarbon based gas, the ARC is formed on the highly reflective layer. A photoresist layer is formed on the ARC, and is exposed and developed to form a photoresist pattern on the ARC. The ARC and the highly reflective layer under the photoresist pattern are etched using the photoresist pattern as a mask. Thereafter, the photoresist pattern and the ARC are simultaneously removed. The ARC is of an amorphous silicon film having high etching selectivity and being easily removed along with the photoresist pattern.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: April 10, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-beom Kim, Chang-hwan Kim
  • Patent number: 6211010
    Abstract: A method of forming a hemispherical grain includes cleaning a polysilicon layer of a native oxide in-situ in the processing chamber of the HSG growth reactor. Such a native oxide adversely affects the growing of HSGs from seeds during the thermal treatment performed in the processing chamber. The cleaning is carried out by dry etching the polysilicon layer with plasma. The plasma may be produced from a mixture of fluorine and inert gases having a volumetric ratio within the range of 0.2:100 to 25:100. Such a plasma can be formed by ionizing the gas with an RF power within a range of 20 to 500 Watts. An advantage of using plasma etching to clean the polysilicon of a native oxide is that the plasma etching is an anisotropic process. The present invention is thus particularly useful in the manufacture of a DRAM capacitor.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: April 3, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang Hyeok Lee, Se Hyoung Ryu, Chan Sik Park, Eung Yong Ahn, Yun Young Kwon
  • Patent number: 6212106
    Abstract: Complementary read signals Bi, /Bi applied to bit line pair 1i, 2i are compared with complementary address signals Ai, /Ai in a comparison unit 10i. The result of the comparison is output to output lines 15i, 16i as complementary detection signals. The detection signals on the output lines 15i, 16i are applied to the amplifier unit 20i which starts amplifying operation, when the level “H” is applied to terminals E. An enable signal EN from outside of the circuit is applied to the first stage amplifier unit 201 of the first group and the first stage amplifier unit 20n+1 of the second group, of which output signals are applied to the terminals E of the succeeding amplifier units 202 to 20n, and 20n+2 to 202n. With this structure, the amount of electric consumption can be reduced with scarcely increasing time required for operation.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: April 3, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Satoru Kurotsu
  • Patent number: 6211017
    Abstract: Upon opening a tunnel window of an EEPROM having a floating gate, a portion of a conductive layer which serves as a floating gate electrode is cut as an opening and side walls are formed on side portions of the opening. A gate insulating film is removed by a self-aligned method using each side wall as a mask, and a thin tunnel oxide is locally formed within the tunnel window.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: April 3, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takashi Ono
  • Patent number: 6209194
    Abstract: An automatic loading and unloading apparatus using servo motors allows simultaneous loading and unloading of two or more semiconductor device packages into and from test devices. The loading and unloading apparatus has a feeding mechanism which has a feed container carrying two semiconductor device packages which have not yet been tested; a loading tool for transferring those two semiconductor device packages from the feed container to a centering position; a DC test contact tool; an insertion tool; a removal tool; and a sorting station for sorting the semiconductor device packages depending on results of a burn-in test. The tools of the apparatus are driven by the action of servo motors, thereby allowing independent movements thereof in the vertical and horizontal directions.
    Type: Grant
    Filed: October 3, 1997
    Date of Patent: April 3, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju Il Kang, Byung Ro Kim, Sung Yeol Lee, Hyun Ho Kim, Young Ki Park
  • Patent number: 6212262
    Abstract: An advertiser-sponsored telephony system includes an automatic sales transaction option, whereby a telephony user may automatically purchase an advertised product without disconnecting from the advertiser-sponsored telephony system. After hearing a promotional message for an advertised product in the advertiser-sponsored telephony system, a telephony user is presented with an option to submit an instruction to automatically place a purchase order for the product. The advertiser-sponsored telephony system verifies the telephony user's identity and confirms that an account which has been pre-registered by the telephony user has sufficient funds to cover the price of the purchase order. If these criteria are satisfied, then the purchase order is processed and the caller continues with his or her telephone call.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: April 3, 2001
    Assignee: BroadPoint Communications, Inc.
    Inventor: Alexandre Perry Kamel
  • Patent number: 6207358
    Abstract: In the fabrication of semiconductor devices, a method of forming a fine pattern on a semiconductor substrate includes the steps of exposing and developing a photoresist deposited on a film of a semiconductor substrate in order to remove selected portions of the photoresist, etching portions of the film left exposed when the selected portions of the photoresist are removed, and subsequently removing any of the photoresist remaining on the semiconductor substrate with dimethylacetamide, or a combination of monoethanolamine and dimethylsulfoxide. Such stripping solutions are capable of removing photoresists in the Deep-UV group as well as the conventionally used photoresists in the I-line group.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: March 27, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mi-sook Jeon, Chun-deuk Lee, June-ing Gil, Pil-kwon Jun
  • Patent number: 6207489
    Abstract: A method for manufacturing a capacitor having a dielectric film formed of a tantalum oxide film. The method includes forming a lower electrode that is electrically connected to an active region of a semiconductor substrate. A pre-treatment film including a component selected from a group consisting of silicon oxide, silicon nitride, and combinations thereof, is formed on the surface of the lower electrode. A dielectric film is formed on the pre-treatment film using a Ta precursor. The dielectric film includes a first dielectric layer deposited at a first temperature selected from a designated temperature range, and a second dielectric layer deposited at a second temperature different from the first temperature and selected from the same designated temperature range. A thermal treatment is thereafter performed on the dielectric film in an oxygen atmosphere.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: March 27, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kab-jin Nam, Seok-jun Won, Ki-yeon Park, Yong-woo Hyung, Young-wook Park