Abstract: A superconductive Josephson junction high density memory array is provided. Each memory cell in the array comprises a two branch superconducting interferometer storage loop which has only a single Josephson junction device in one of the branches. The Josephson junction devices are mounted on a substrate having a patterned ground plane. The ground plane pattern is provided with holes or apertures which surround the Josephson junction devices so that the control current of the control lines couple with the tunnel junctions of the Josephson junction devices but not with the ground plane. This structural arrangement provides a threshold characteristic for the single Josephson junction device which is symmetrical to the gate current, thus, may be easily switched to two current states indicative of two logic states.

Abstract: A drilling monitor employs laser optics and an associated signal processing device to provide intelligent control capable of making the optimum decision to maintain hole quality and maximize drill life during the drilling of via holes in a circuit board. Twist angle, bending and temperature of the drill are monitored and the drill motor and/or the board is controlled accordingly in response to present data being compared to preprogrammed acceptable standardized data.

Abstract: There is shown and described a relatively simple electronic circuit using few discrete components which is used to replace the filter and delay line differentiator in existing circuits. The new circuit provides a simultaneous output of even and odd signals which have the same transfer function except for the derivative operation. The circuit is especially useful in read and write channels of a disk drive apparatus.

Abstract: Apparatus and method for encoding binary data in a ternary format including ternary 0, ternary 1 and ternary 2 code symbols. In a preferred embodiment of the invention utilized for magnetic data storage, a ternary 0 is represented by the absence of signal change, a ternary 1 is represented by a single transition and a ternary 2 is represented by a pulse or pair of closely spaced transitions. Further features of the invention provide for merging ternary code symbols so as to prevent the spacing between adjacent symbols from becoming so small as to create undesirable crowding, and inserting and shifting symbols to prevent the spacing between adjacent symbols from becoming so great as to adversely affect recovery of the encoded data.

Abstract: A Josephson junction latch circuit is provided which has an AND gate having plural inputs and a single output. The output of the single AND gate is directly coupled to a Josephson junction flux storage loop capable of storing flux indicative of the output of the AND gate. A Josephson junction sense line is provided capable of sensing the flux condition of the flux storage loop. The sense line is directly coupled to amplifying gates which produce amplified true and complement quantities whenever the sense line is actuated.

Abstract: A dehumidifier for a head-disk assembly in a disk drive unit. The dehumidifier includes a housing which is ported to define an air passage therethrough. Within the passage is a Peltier effect device that has a cold surface exposed to air flowing within the passage and a hot surface connected to a heat radiator. Water vapor carried in air that contacts the cold surface condenses; there is sump below the cold surface to contain water that condenses. The housing is installed so that air flow through the passage is induced by convection.

Abstract: The reduction of electromagnetic interference radiation from electrical component housings is enhanced due to an electrically conductive adapter rings each connected to associated electrically conductive cable shields. The rings and cables are engaged and retained by an electrically conductive bar attached to the housing and adapted to receive the rings, and thereby discharge electromagnetic signals to the housing ground potential.

Abstract: An improved high speed gallium arsenide (GaAs) to emitter coupled logic (ECL) voltage level converter is provided which consumes less power and also provides an improved speed-power product performance characteristic. The converter includes a three branch output circuit which emulates the operation of an ECL output driver. The emulator circuit causes faster switching by compensating for parasitic resistances and capacitance and is also provided with a gate discharge network which reduces switching time of the ECL output emulator.

Abstract: During the preparation of a Josephson junction device, one of the steps for making a base electrode is to deposit a superconducting material on a substrate and to anneal the deposited material to make it a continuous homogeneous polycrystalline grain-like electrode material. Ordinarily, the base electrode and the counter electrode materials are deposited in a vacuum system at a vacuum pressure which is below one.times.10.sup.-6 torr to remove all contaminants such as oxygen, oxides of carbon and water vapor. It has been discovered that depositing conventional superconducting base electrode and counter electrode materials in the presence of an inert gas at much high vacuum pressures around 20.times.10-3 torr produce a superior lead-gold superconductive electrode which is substantially immune to thermal cycling.

Abstract: Apparatus is disclosed for stacking a continuous paper form having uniformly positioned folds or seams as it exits from a device such as a printer. It utilizes a pair of curved surfaces over which an air flow is alternately directed to alternately create an air film over each of the curved surfaces. This air film attracts the paper in such a manner that the continuous paper form is refolded in a bin or stacker in its original configuration.

Abstract: A gallium arsenide buffer amplifier for use in a very large scale integrated circuits is provided. The transistor device in the buffer amplifier has a uniform depth N+ source, gate and drain region and the N+ dopant concentration is made very high which effectively reduces the resistance of the transistor device and permits the area of the device to be reduced by more than one order of magnitude while maintaining high current and power levels.

Abstract: There is shown and described a high speed bus architecture which uses a common control bus and permits high speed data transfer between a plurality of active and/or passive users while reducing the system overhead structure which was previously required.

Abstract: Ink jet printers include orifices which may become clogged or otherwise inoperative. This can cause printing defects which may go undetected for a substantial period because these printers usually operate unattended. An optical detector is provided for testing the operability of each ink jet orifice prior to the beginning of printing either a print cycle or a page. Ink is deposited on a member which moves the deposit through an optical path for detection. Absence of a deposit signals a malfunction.

Abstract: Apparatus is provided for cooling a closely grouped plurality of integrated circuit chips by forced air convection. A heat sink, having a plurality of fins and a narrow channel between each fin, is connected to a first side of a substrate and has one end protruding into an aperture in the substrate. A chip is connected directly to the one end of the sink and is electrically connected to a second side of the substrate.

Abstract: An oscillating coolant pump includes a pair of opposed bellows mounted to reciprocate in a housing for moving a volume of fluid through a heat exchanger and an electronics package. The pump functions without the use of check valves.

Abstract: A multichip thermal conduction module has improved cooling in a housing having a board including chips mounted on the board. The housing is divided so as to form first and second cooling portions. The chips are in the first cooling portion. Several bunches of heat conducting strands extend into the first cooling portion so that each bunch is urged into deflecting contact with a respective chip. A fluid inlet and outlet are provided in the second cooling portion.

Abstract: A novel method of depositing the oxide barrier junction on a base electrode of a Josephson junction device is provided. An ionized oxygen plasma region is generated juxtaposed the surface of the base electrode to be oxidized. The pressure of the oxygen in the vacuum chamber is held at a predetermined high pressure where the zero voltage supercurrent is found to be independent of oxygen pressure variations and the flow of oxygen through the vacuum chamber is stabilized at the optimum minimum necessary for growth of the oxide barrier junction. The oxide barrier junctions so produced have consistent and predictable supercurrent densities.

Abstract: A high speed code processing system for error correcting code is disclosed. It uses bit parallel residue generation for cyclic codes. This minimizes the time delay for cyclic code processing. Residue generation of the bit string is accomplished by processing multiple bits in each clock time instead of the conventional bit-by-bit implementation. Thus, the checkword calculation and the syndrome calculation are accomplished at a significantly higher speed than the conventional shift register approach to provide a system capable of on-line residue generation.

Abstract: A nondestructive readout, random access memory system is disclosed. The memory is formed of a plurality of discrete thin ferromagnetic film memory elements in which binary data are stored as the presence, or absence, of cross-tie, Bloch-line pairs. Column lines and row lines form a matrix array of the memory elements, one at each column line, row line intersection. Cross-tie, Bloch-line pairs are formed in the memory elements by the selective coincidence of row line and column line write drive fields while readout of the presence, or absence, of the cross-tie, Bloch-line pair is by a coincident row line read drive field and a column read current signal that flows through the memory elements aligned along a selected column. A read amplifier is differentially coupled across the one fully selected memory element to detect a first, or second, opposite polarity output signal that is indicative of the presence, or absence, of a cross-tie, Bloch-line pair at the one fully selected memory element.