Patents Represented by Attorney Yudell Isidore Ng Russell, PLLC
  • Patent number: 8301992
    Abstract: A method, system and computer program product for enabling a register file to recover from detection of a parity error. A first register file and a second register file are associated with a parallel file structure. When the parity error is detected, the system determines whether the first register file or second register file is associated with the parity error. The register file determined to have the parity error is associated with an offending register and a non-offending register is associated with the “good” register file. Subsequent to the detection of the parity error, the system executes a repair sequence, whereby the register file associated with the offending register receives data from the register file associated with the non-offending register. The offending register file recovers from the parity error with or without the use of a parity interrupt.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Bybell, Michael B. Mitchell, Jason M. Sullivan
  • Patent number: 8302070
    Abstract: A method of formatting source code in an Integrated Development Environment (IDE) environment includes the steps of: selecting a source statement in an IDE; associating a style sheet definition with a selected source statement; applying the style sheet definition to the selected source statement to format a display of the selected source statement; and in response to the style sheet definition being applied to the selected source statement, displaying content from the selected source statement in a visual style that is defined by the style sheet definition.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Samuel S. Adams, Lisa A. Seacat
  • Patent number: 8302109
    Abstract: A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication in a computer system. An end-of-initiative procedure to ensure that the network interface hardware has received an interrupt enable and to recheck the interrupt queue is unnecessary in the present invention.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Lakshminarayana Arimilli, Claude Basso, Piyush Chaudhary, Bernard C. Drerup, Jody B. Joyner, Jan-Bernd Themann, Christoph Raisch, Colin B. Verrilli
  • Patent number: 8300630
    Abstract: A supervisor computer directly communicates, via User Datagram Protocol (UDP) packets, with a call control application software in a soft phone. The UDP packets provide real-time information, from a desktop of the soft phone, describing call activity and usage status of the soft phone. The supervisor computer is able to remotely control usage of the soft phone according to information provided by the UDP packets.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Peeyush Jaiswal, Naveen Narayan
  • Patent number: 8301910
    Abstract: A method and system that enables cross-border compliance with export restrictions of particular computer technology, including software loaded on a computing device. The computing device is loaded with software, and has a country location device, such as a low-end GPS device. The country location device (country locator) stores the present geographic location of the device in a location register. When the computing device is turned on or the software is activated for operation on the computing device, a security utility of the software compares the value in the register against a list of pre-established locations that are export-restricted. When the value matches (or falls within a range) of one of pre-established locations, the features of the software that are export restricted are automatically disabled.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Bhargav V. Perepa, Sujatha Perepa, Vishwanath Venkataramappa
  • Patent number: 8296719
    Abstract: A computer-implemented method, system, and computer-readable medium for determining if a software factory is ready to take on a software project is presented. In a preferred embodiment, the computer-implemented method includes the steps of: receiving a software project proposal including a custom software description describing a specific project type of the software project; determining, by a computer processor, that the software project proposal is qualified for acceptance by a software factory, utilizing a scorecard for the specific project type, wherein the scorecard provides a maturity assessment of resources required and identifies any potential choke-points for the specific project type; and in response to a determination that the software project proposal is qualified for acceptance by the software factory, the software factory undertaking the software project proposal.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jarir K. Chaar, Ronald D. Finlayson, Thomas A. Jobson, Jr., Naomi M. Mitsumori, Francis X. Reddington
  • Patent number: 8296740
    Abstract: The signal state that a signal of interest within a system under test has during each of a plurality of cycles of operation of the system under test is stored in a trace file. In association with the signal state, information regarding a requested access to the signal state by a control program during a particular cycle among the plurality of cycles is also stored. From the trace files a presentation is generated that presents, for at least a signal of interest within the system under test, a plurality of signal state indications, each indicating a respective state that the signal had during a one of a plurality of cycles of operation of the system under test. The presentation also indicates, in a graphically distinctive manner, at least one cycle of operation during which a control program requested access to a state of the signal, so that the influence of the control program on the state of the system under test is visually apparent.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Wolfgang Roesner, Derek Edward Williams
  • Patent number: 8296651
    Abstract: A method, apparatus and computer program element are disclosed for selecting a term for inclusion in a glossary in a document handling or processing system in which a set of functions or rules are applied to the term in order to provide a probability measure for the terms being suitable for inclusion in said glossary.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Andrew James Frederick Bravery, Gordon Douglas Hutchison
  • Patent number: 8296519
    Abstract: A processing unit includes a store-in lower level cache having reservation logic that determines presence or absence of a reservation and a processor core including a store-through upper level cache, an instruction execution unit, a load unit that, responsive to a hit in the upper level cache on a load-reserve operation generated through execution of a load-reserve instruction by the instruction execution unit, temporarily buffers a load target address of the load-reserve operation, and a flag indicating that the load-reserve operation bound to a value in the upper level cache. If a storage-modifying operation is received that conflicts with the load target address of the load-reserve operation, the processor core sets the flag to a particular state, and, responsive to execution of a store-conditional instruction, transmits an associated store-conditional operation to the lower level cache with a fail indication if the flag is set to the particular state.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Guy L. Guthríe, William J. Starke, Derek E. Williams
  • Patent number: 8290141
    Abstract: A technique of operating a communication device includes dividing a frequency band associated with a background noise signal into respective sub-bands. Respective individual level estimates for each of the respective sub-bands are then determined. A total level estimate for the background noise signal is determined. Finally, a comfort noise signal (whose characteristics are based on the respective individual level estimates and the total level estimate) is provided.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: October 16, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Roman A. Dyba, Perry P. He, Brad L. Zwernemann
  • Patent number: 8288657
    Abstract: An improved multi-layered ceramic package comprises: a plurality of signal layers, each having one or more signal lines; a plurality of vias, each providing one of a voltage (Vdd) power connection or a ground (Gnd) connection; at least one reference mesh layer adjacent to one or more signal layers; and a plurality of via-connected coplanar-type shield (VCS) lines, with a first VCS line extending on a first side of a first signal line within the plurality of signal layers and a second VCS line extending on a second opposing side of the first signal line. Each of the plurality of VCS lines interconnect with and extend past one or more vias that are located along the directional path in which the VCS lines runs. The placement of the VCS lines relative to the signal lines reduces coupling noise and controls impedance discontinuity in the ceramic package.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jinwoo Choi, Sungjun Chun, Anand Haridass, Roger Weekly
  • Patent number: 8290134
    Abstract: A method of and system for managing a conference call among participants and a moderator provides a control mode in which only one participant can speak at time. All participants other than the speaker are muted. The system maintains a talk queue. When a participant requests to speak, the system places the participant in the talk queue. The system may announce to the moderator that the participant has registered to speak. The system may also announce to the moderator the participant's position in the talk queue. When a speaking participant relinquishes, or is preempted from, the speaking position, the system mutes the speaking participant. The system informs the participant at the top of the talk queue that it is his or her turn to speak and unmutes that participant, whereby that participant becomes the new speaking participant. The system removes the new speaking participant from the talk queue. The system may announce their respective positions to the other participants in the talk queue.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Peeyush Jaiswal, Naveen Narayan
  • Patent number: 8290080
    Abstract: A technique for communicating in a wireless communication system includes creating, using two distinct Alamouti codes, a power-scaled quasi-orthogonal space-time block code. The technique further includes transmitting, using a transmitter, the power-scaled quasi-orthogonal space-time block code over multiple antennas (e.g., three or four transmit antennas).
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: October 16, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Hoojin Lee
  • Patent number: 8291414
    Abstract: A virtual machine manager (VMM) enables provisioning of services to multiple clients via a single data processing system configured as multiple virtual machines. The VMM performs several management functions, including: configuring/assigning each virtual machine (VM) for/to a specific, single client; scheduling the time and order for completing client services via the assigned client VM; instantiating a client VM at a scheduled time and triggering the execution of services tasks required for completing the specific client services on the client VM; monitoring and recording historical information about the actual completion times of services on a client VM; and updating a scheduling order for sequential instantiating of the multiple client VMs and corresponding client services, based on one or more of (i) pre-established time preferences, (ii) priority considerations, and (iii) historical data related to actual completion times of client services at a client VM.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Ravi P. Bansal, Rhonda L. Childress, Steven M. Weinberger
  • Patent number: 8289060
    Abstract: A flip-flop includes a functional latch and a retention latch. The functional latch is configured to maintain a logic state of the flip-flop in a power-up mode and the retention latch is configured to maintain the logic state of the flip-flop in a power-down mode. The retention latch is selectively coupled to the functional latch and the retention latch is configured to maintain the logic state in the power-down mode irrespective of a level of an associated clock signal when the power-down mode is entered. A clock pulse that clocks the flip-flop is derived from the associated clock signal.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: October 16, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Samuel J. Tower, Matthew S. Berzins, Charles A. Cornell
  • Patent number: 8290996
    Abstract: A method, system, and computer program product for creating and implementing file clones using reverse ditto references. A clone inode is created as a copy of an original inode. The clone inode and the original inode are indistinguishable to an end user. Each additional file clone created spawns a clone inode. An immutable clone-parent inode is created that contains the disk block addresses, while writable clones inode instead contain dittos linking the clone inode to data blocks referenced in the clone-parent inode. Data block address links in the original inode are moved to the new clone-parent inode and dittos replace the original data block address links in the original inode. When a clone file is updated, the new data is written to a new disk location and a corresponding ditto in the clone inode is replaced with a data block link address, keeping the data of the clone-parent inode intact.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Thomas Eugene Engelsiepen, Frank B. Schmuck
  • Patent number: 8291259
    Abstract: A processing unit includes a processor core and a cache memory coupled to the processor core. The cache memory includes a data array, a directory of the data array, error detection logic that sequentially detects a first, second and third correctable errors in the data array of the cache memory and provides indications of detection of the first, second and third correctable errors, and control circuitry that, responsive to the indication of the third correctable error and an indication that the first and second correctable errors occurred at too high a frequency, marks an entry of the data array containing a cache line having the third correctable error as deleted in the directory of the cache memory regardless of which entry of the data array contains a cache line having the second correctable error.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Guy L. Guthrie, Harmony L. Helterhoff, Kevin F. Reick, Phillip G. Williams
  • Patent number: 8285939
    Abstract: In response to a data request of a first processing unit among a plurality of processing units, the first processing unit selects a victim cache line to be castout from the lower level cache of the first processing unit and selects the lower level cache of a second of the plurality of processing units as an intended destination of a lateral castout (LCO) command by randomized round-robin selection. The first processing unit issues on the interconnect fabric an LCO command identifying the victim cache line and the intended destination. In response to a coherence response to the LCO command indicating success of the LCO command, the first processing unit removes the victim cache line from its lower level cache, and the victim cache line is held in the lower level cache of one of the plurality of processing units other than the first processing unit.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Guy L. Guthrie, Harmony L. Helterhoff, Kevin F. Reick, Phillip G. Williams
  • Patent number: 8286178
    Abstract: A system, method, and computer program product for managing processor entitlement of virtual processors in logical partitioned data processing system. One embodiment of the invention provides a method of managing processing resources in a data processing system. The method involves creating a resource set comprising a grouping of virtual processors, and allocating a processing resource entitlement the resource set. The method also includes assigning the resource set to a workload, receiving a request by the workload for utilization of processing resources, and in response to receiving the workload request dispatching the assigned resource set. The method further includes determining whether the dispatched virtual processors of the resource set have exceeded the assigned processing resource entitlement, and in response to determining that the processing resource entitlement has been exceeded, undispatching the resource set.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Basu Vaidyanathan, Marcos A. Villarreal
  • Patent number: D669246
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: October 23, 2012
    Assignee: Triple Crown Dog Academy, Inc.
    Inventors: Jerry J. Wolfe, Jr., Harold Keith Benson