Abstract: A device for converting binary logic pulses into an output current and the output current being switchable between a positive and negative polarity. The device provides a charge pump circuit which is suitable for the phase-detector stage in a phase-locked loop (PLL) circuit. The charge pump circuit comprises an input stage for the "UP" binary logic pulses and a second stage for the "DOWN" binary logic pulses. The input stages comprise emitted-coupled transistor pairs. The circuit includes current sources and current sinks for generating the output current in the input stages in response to the binary logic pulses. The circuit features a pair of switch diodes coupled between the outputs of the input stages. The diodes form a commutator which controls the direction of the output current and the leakage current during the idle states. The circuit also includes a clamping circuit to limit the voltage swing across the switching diodes.

Abstract: An emitter-coupled oscillator circuit suitable for monolithic integration.

Abstract: A bump structure for bonding leads to a semi-conductor, in which the bump has a thin lower portion which overlaps and seals the edges of the passivation layer, and a thicker upper or stem portion of smaller lateral dimensions to fit within the margins of the opening in the passivation layer. Thus, during bonding, downward compressive forces are applied primarily through the bump stem directly to the metal termination pad beneath the bump, and very little force is applied to the edges of the passivation layer. This reduces the likelihood of passivation layer cracking, increasing device reliability. Because the bump stem is formed within the margins of the passivation layer opening, it has a flat top, resulting in better lead bonding.

Abstract: The noise suppression system has a discriminator, an amplitude circuit and a filtering circuit. The discriminator has an input sensor, a timer and a decision unit. The input sensor senses when the incoming signal is over a given amplitude threshold and starts the timer running. The decision unit determines when the time is over a given time threshold and the discriminator informs the amplitude circuit. The amplitude circuit has an amplitude sensor and a control unit. The amplitude sensor senses the amplitude of the incoming signal when the discriminator has a signal over the given time threshold and the amplitude sensor relays the amplitude to the control unit. The control unit outputs a control signal. The control unit has two amplitude thresholds, the control signal being at a constant minimum below the first threshold, proportional to the amplitude sensor amplitude between the thresholds, and at a constant maximum above the second threshold.

Abstract: The switch has a cross-point. The cross-point has an input buffer, a level shift and an output buffer. The input and output buffers are BJT's, the level shift is two diode connected BJT's. The voltage drops across the buffers are designed to match the voltage drops across the diodes. The cross-point is enabled by a current source forcing current through the diodes. The matching of the voltage drops is effected by the Early voltage of the BJT's as they are operated at different V.sub.ce 's. An Early voltage determinator determines the effect of the Early voltage and adjusts the current flowing from the current source to force differing bias currents through the input buffer and the diodes to make the sum of the V.sub.be 's of each more independent of Early voltage. The output impedance of the current source and the impedance of the cross-point form a resistor-capacitor network. Where the f.sub..tau.

Abstract: An electrical component combination having a receiver and an amplifier. The receiver has three pins extending from its front surface. The amplifier has six pads on its rear surface. The pins are bonded to three of the pads providing electrical and mechanical connection between the receiver and amplifier. The other pads may provide frequency control, power control and gain trim. The combination is placed within a hearing aid housing. The housing may be an in the ear type. The combination provides electrical and mechanical access to the components. The components may be receivers, amplifiers, pre-amplifiers, filters, microphones or other such components.

Abstract: The clipping circuit has a voltage reference and a transconductance connected to a voltage input. The input is connected through the transconductance to an output resistor. The voltage output is taken between the output resistor and the transconductance. The voltage reference has a third current source feeding a diode connected transistor and a resistor. A second current source feeds into the resistor after the transistor. The base of the diode connected transistor is connected to the voltage input. The transconductance has a second transistor whose base is connected to the voltage input, collector sinks current from a fourth current source and emitter feeds current to a resistor. A first current source feeds current to a third transistor and to a current mirror. The base of the third transistor is connected between the fourth current source and the collector of the second transistor.

Abstract: The temperature compensated reference circuit has a first common emitter BJT whose base is connected to a first JFET current source and through a JFET resistor to a voltage output. The JFET resistor is biased in the linear region and the JFET current source is biased in the saturation region in an operating condition. The voltage across the JFET resistor is selected to be approximately equal to the pinch-off voltage of the JFET current source. The temperature co-efficient of the first BJT and JFET resistor will cancel one another to produce a generally temperature invariant voltage at the output. The voltage regulator incorporates the reference circuit and has a second BJT current source driving the reference circuit. A feedback system includes a second JFET current source between the collector of the first BJT and the connection between the voltage output and the collector of the second BJT. The second JFET current source drives the base of a common emitter third BJT.

Abstract: The improved operational amplifier stages are an input, a gain and an output stage. The input stage has a differential buffer amplifier connected to a transconductance section for converting a differential voltage signal to a current signal. The input stage is operable within a range of differential voltage signals, the range including common mode voltage signals at or beyond the negative supply rail. The gain stage has two cascaded transistors. The base of the first transistor is connected to the emitter of the second transistor through an integrating capacitor. The capacitor is further connected through a resistor to the negative supply rail. The output stage has a driving amplifier and two common emitter output transistors. One output transistor is driven by the amplifier through two current mirrors, the output of the second current mirror being compared to a reference current source. The other output transistor is driven directly by the amplifier.