Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.

Abstract: One embodiment pertains to a method including determining if external power is supplied to a power system which includes a DC-DC voltage converter; if external power is not supplied to the power system, then turn on a switching transistor in the DC-DC voltage converter and provide battery power to the load through the switching transistor; if external power is supplied to the power system, then charge a battery.

Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.

Abstract: An enhanced layout for a multiple-finger ESD protection device has several embodiments. In these embodiments, the base contacts of the NPN (or PNP) transistors utilized as voltage clamps in the multiple-finger NPN-based (or PNP-based) multiple-finger ESD protection device are disposed at opposite edges of the multiple-finger ESD protection device and oriented perpendicularly to the orientation of the fingers in the multiple-finger ESD protection device. Similarly, the body contacts of the NMOS (or PMOS) transistors utilized as voltage clamps in the multiple-finger NMOS-based (or PMOS-based) multiple-finger ESD protection device are disposed at opposite edges of the multiple-finger ESD protection device and oriented perpendicularly to the orientation of the fingers in the multiple-finger ESD protection device.

Abstract: An optical proximity detector includes a driver, light detector, analog front-end, sensor(s) that sense correction factor(s) (e.g., temperature, supply voltage and/or forward voltage drop), and a digital back end. The driver drives the light source to emit light. The light detector produces a light detection signal indicative of a magnitude and a phase of a portion of the emitted light that reflects off an object and is incident on the light detector. The analog front-end receives the light detection signal and outputs a digital light detection signal, or digital in-phase and quadrature-phase signals, which are provided to the digital back-end. The digital back-end performs closed loop correction(s) for dynamic variation(s) in gain and/or phase caused by a portion of the analog front-end, uses polynomial equation(s) and sensed correction factor(s) to perform open loop correction(s) for dynamic variations in temperature, supply voltage and/or forward voltage drop, and outputs a distance value.

Abstract: One embodiment is directed towards a molded insulator substrate. The molded insulator substrate includes a first insulator having a first surface and a second surface. A recess in said first surface of the first insulator is configured to facilitate venting of a second insulator over exposed regions of the first surface. A first conductive terminal is exposed through the first surface. A second conductive terminal is exposed through the second surface and electrically coupled to the first terminal.

Abstract: An embodiment of an apparatus includes first and second core regions, first and second conductors, and an isolation region. The first core region has a first permeability, and the first conductor is disposed in the first core region. The second core region has a second permeability, and the second conductor is disposed in the second core region. And the isolation region is disposed between the first and second core regions, and has a third permeability that is significantly different than the first and second permeabilities. For example, the first and second conductors may be windings of respective first and second inductors, and the isolation region, which may be attached to, or integral with, the first and second core regions, may reduce the amount of magnetic coupling between the inductors to a level that is negligible, such that the inductors may be used in applications that call for magnetically uncoupled inductors.

Abstract: A voltage error signal is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adapter current limit regulation mode, an adapter current sense voltage, indicative of an adapter current, is compared to an adapter current reference voltage to produce an adapter current error signal. A compensator receives the adapter current error signal and outputs a compensated adapter current error signal. The adapter current sense voltage, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal provided to the PWM controller. Alternatively, an input voltage, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal.

Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: A method to soft start a charge pump circuit according to embodiments includes enabling switching for a plurality of power transistors, selecting a first switching control signal from a plurality of switching control signals for the selected plurality of power transistors, slowly ramping up a plurality of bootstrap supply voltages associated with the selected plurality of power transistors, driving a gate-to-source voltage of each power transistor of the selected plurality of power transistors at a first predefined level, and determining if the plurality of bootstrap supply voltages are less than a second predefined level. If the plurality of bootstrap supply voltages are less than the second predefined level, the method further includes toggling and thereby selecting a second switching control signal from the plurality of switching control signals for a second selected plurality of power transistors.

Abstract: The present embodiments relate to methods and apparatuses for providing fault protection in a power controller such as a voltage regulator, and particularly protection against reverse over current fault conditions. Some embodiments are capable of distinguishing between different types of reverse over current conditions, such as a high-side short or a normal over voltage condition. In these and other embodiments, fault protection is performed in favor of a load connected to the voltage regulator, rather than components of the voltage regulator itself.

Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.

Abstract: One embodiment is directed towards a method. The method includes forming a drift region of a first conductivity type above or in a substrate. The substrate has first and second surfaces. A first insulator is formed over a first portion of the channel, and which has a first thickness. A second insulator is formed over the second portion of the channel, and which has a second thickness that is less than the first thickness. A first gate is formed over the first insulator. A second gate is formed over the second insulator. A body region of a second conductivity type is formed above or in the substrate.

Abstract: Disclosed herein is a power converter with low step down conversion ratio with improved power conversion efficiency. The power converter includes a first inductor to receive the input voltage, and a second inductor to supply the output voltage to a load. The first inductor and the second inductor are electromagnetically coupled to each other. The power converter further includes a first switch coupled between the first inductor and the second inductor. The first switch is switched according to a pulse having a frequency corresponding to a resonant frequency of (i) a series inductance between the first inductor and the second inductor and (ii) a parallel capacitance across the first switch. The power converter further includes a second switch coupled to the first switch and the second inductor to supply a reference voltage to the second inductor according to another pulse having the frequency.

Abstract: An optical proximity detector includes a plurality photodetectors (PDs) and a winner-take-all (WTA) circuit. Each of the PDs has a respective field of view (FOV) and produces a respective analog current detection signal indicative of light incident on and detected by the PD. In an embodiment, the WTA circuit includes a comparator and a multiplexor (MUX). The comparator compares the analog current detection signals produced by the PDs and produces a selection signal in dependence thereon. The MUX receives the analog current detection signals produced by the PDs and outputs one of the analog current detection signals in dependence on the selection signal produced by the comparator. Circuitry, which is shared by the PDs, produces a digital detection signal corresponding to the one of the analog current detection signals output by the MUX. Such design can be used to reduce power consumption, size and cost of an optical proximity detector.

Abstract: An electronic system, DC-DC voltage converter, method of operating a buck-boost DC-DC converter, and method for power mode transitioning in a DC-DC voltage converter are disclosed. For example, one method includes receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter, determining a power mode of operation of the DC-DC voltage converter, and if the power mode of operation is a first mode, outputting a first control signal to regulate the output voltage of the DC-DC voltage converter. If the power mode of operation is a second mode, outputting a second control signal to regulate the output voltage of the DC-DC voltage converter, and if the power mode of operation is a third mode, outputting a third control signal to regulate the output voltage of the DC-DC voltage converter.

Abstract: An embodiment pertains to a method including determining if an amplitude of an error signal has entered steady state. If the amplitude of the error signal has not entered steady state, then amplify with a high gain the amplitude of the AC component of the error signal. If the amplitude of the error signal has entered steady state, then initiate a timer. Determining if the amplitude of the error signal has remained in steady state while the timer runs. If the amplitude of the error signal has remained in steady state while the timer runs, then amplify with a low gain the amplitude of the AC component of the error signal.

Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.

Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.

Abstract: Photodetectors, methods for use in manufacturing photodetectors, and systems including photodetectors, are described herein. In an embodiment, a photodetector includes a plurality of photodiode regions, at least some of which are covered by an optical filter. A plurality of metal layers are located between the photodiode regions and the optical filter. The metal layers include an uppermost metal layer that is closest to the optical filter and a lowermost metal layer that is closest to the photodiode regions. One or more inter-level dielectric layers separate the metal layers from one another. Each of the metal layers includes one or more metal portions and one or more dielectric portions. The uppermost metal layer is devoid of any metal portions underlying the optical filter.