Patents Assigned to Intersil Americas LLC
  • Patent number: 10298132
    Abstract: Disclosed herein is a power converter with low step down conversion ratio with improved power conversion efficiency. The power converter includes a first inductor to receive the input voltage, and a second inductor to supply the output voltage to a load. The first inductor and the second inductor are electromagnetically coupled to each other. The power converter further includes a first switch coupled between the first inductor and the second inductor. The first switch is switched according to a pulse having a frequency corresponding to a resonant frequency of (i) a series inductance between the first inductor and the second inductor and (ii) a parallel capacitance across the first switch. The power converter further includes a second switch coupled to the first switch and the second inductor to supply a reference voltage to the second inductor according to another pulse having the frequency.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: May 21, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Sitthipong Angkititrakul, Jian Yin
  • Patent number: 10290564
    Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: May 14, 2019
    Assignee: Intersil Americas LLC
    Inventor: Randolph Cruz
  • Patent number: 10290618
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: May 14, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Francois Hebert, Steven R. Rivet, Michael Althar, Peter Oaklander
  • Patent number: 10277127
    Abstract: An electronic system, voltage regulator, controller and fault reporting method and circuit for a voltage regulator or other type of DC-DC converter are disclosed. For example, a fault reporting circuit is disclosed. The fault reporting circuit includes a first transistor device configured to generate a first signal indicating an occurrence of a fault in an associated circuit, a second transistor device coupled to the first transistor device, the second transistor device configured to generate at least one data signal indicating an identity of the fault in the associated circuit, and an output coupled to the first transistor device and the second transistor device, wherein the output is configured to receive the first signal and the at least one data signal. In some implementations, the fault reporting circuit is in a controller for a voltage regulator circuit formed on one or more semiconductor ICs, wafers, chips or dies.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: April 30, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Douglas M. Mattingly
  • Patent number: 10250138
    Abstract: Systems and methods for digital voltage compensation in a power supply integrated circuit are provided. In at least one embodiment, a method comprises receiving a digital voltage code, the digital voltage code corresponding to an output voltage value; setting an output count on a first counter to change from a present first digital count corresponding to a present voltage code value toward a target first digital count corresponding to a new voltage code value; and setting a second count to an offset count value on a second counter when the new voltage code value is received. The method also comprises combining the second count with the output count to form a combined count value; and decrementing the second count value from the offset count value to zero when the first counter reaches the target first digital count.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: April 2, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Robert H. Isham
  • Patent number: 10224351
    Abstract: Exemplary embodiments provide a solar cell device, and method for forming the solar cell device by integrating a switch component into a solar cell element. The solar cell element can include a solar cell, a solar cell array and/or a solar cell panel. The integrated solar cell element can be used for a solar sensor, while the solar sensor can also use discrete switches for each solar cell area of the sensor. Exemplary embodiments also provide a connection system for the solar cell elements and a method for super-connecting the solar cell elements to provide a desired connection path or a desired power output through switch settings. The disclosed connection systems and methods can allow for by-passing underperforming solar cell elements from a plurality of solar cell elements. In embodiments, the solar cell element can be extended to include a battery or a capacitor.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: March 5, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Stephen Joseph Gaul
  • Publication number: 20190056454
    Abstract: Systems and methods for an open wire scan are provided. In certain embodiments, An apparatus comprising a circuit includes a plurality of inputs for connecting with a plurality of outputs of a multi-cell battery pack; and an open connection detection circuit, formed within the circuit, for detecting an open connection on at least one of the plurality of inputs connected to the multi-cell battery pack and generating a fault condition responsive thereto. The open connection detection circuit comprises at least one current source device; and at least one device for turning on and off the at least one current source device. The open connection detection circuit also comprises at least one amplifier; an analog to digital converter; and a control logic circuit.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 21, 2019
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Anthony John Allen, Edgardo A. Laber
  • Patent number: 10211241
    Abstract: Exemplary embodiments provide a solar cell device, and method for forming the solar cell device by integrating a switch component into a solar cell element. The solar cell element can include a solar cell, a solar cell array and/or a solar cell panel. The integrated solar cell element can be used for a solar sensor, while the solar sensor can also use discrete switches for each solar cell area of the sensor. Exemplary embodiments also provide a connection system for the solar cell elements and a method for super-connecting the solar cell elements to provide a desired connection path or a desired power output through switch settings. The disclosed connection systems and methods can allow for by-passing underperforming solar cell elements from a plurality of solar cell elements. In embodiments, the solar cell element can be extended to include a battery or a capacitor.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: February 19, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Stephen Joseph Gaul
  • Patent number: 10175272
    Abstract: A remote differential voltage sensing circuit having a voltage input (Vin) and a voltage output (Vout), comprises a dual differential input stage including a common-source or common-collector differential input stage in parallel with a common-gate or common-base differential input stage. The common-source or collector differential input stage has differential inputs, one coupled to the voltage input (Vin) and the other coupled to the voltage output (Vout). The common-gate or common-base differential input stage has differential inputs, one coupled to a local ground (Agnd) and the other coupled to a remote ground (Rgnd). An output stage is driven by an output of the dual differential input stage and produces an output voltage at the voltage output (Vout). A compensation network is coupled between the voltage output (Vout) and the output of the dual differential input stage.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: January 8, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Wei Chen, Xin Zhang, Gwilym Luff, Peter J. Mole
  • Patent number: 10175733
    Abstract: One embodiment is directed towards a molded insulator substrate. The molded insulator substrate includes a first insulator having a first surface and a second surface. A recess in said first surface of the first insulator is configured to facilitate venting of a second insulator over exposed regions of the first surface. A first conductive terminal is exposed through the first surface. A second conductive terminal is exposed through the second surface and electrically coupled to the first terminal.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: January 8, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Randolph Cruz
  • Patent number: 10164441
    Abstract: An apparatus for charging a plurality of series connected battery cells, includes a first and second input terminals for providing a charging voltage to the plurality of series connected battery cell. A transformer includes a primary side associated with the charging voltage and a secondary side includes a plurality of portions. Each of the plurality of portions is connected across at least one of the plurality of series connected battery cell. A switch in series between each of the plurality of portions of the secondary side and the at least one of the plurality of series connected battery cells increases an impedance between the portion of the secondary side and the associated one of the plurality of series connected battery cells in a first state and decreases the impedance between the portion of the secondary side and the associated one of the plurality of series connected battery cells in a second state.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: December 25, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Zaki Moussaoui, Tony Allen
  • Patent number: 10158281
    Abstract: In an embodiment, a power-supply controller includes a control circuit, a drive circuit, and a signal-drop-reducing circuit. The control circuit is configured to generate a drive signal having a duty cycle, and the drive circuit is configured to cause a phase circuit of a power supply to generate, in response to the drive signal, an output signal having a magnitude. And the signal-drop-reducing circuit is configured to disable the driver circuit in response to the duty cycle corresponding to a signal magnitude that is lower than the magnitude of the output signal. For example, where a power supply has a non-zero residual output signal (e.g., output voltage) on its output node after the power supply is deactivated, such a power-supply controller can reduce or eliminate a drop in the residual output signal caused by, or that would be caused by, a restarting of the power supply.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: December 18, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Harold William Satterfield, James White
  • Patent number: 10148107
    Abstract: A universal serial bus charger comprises a universal serial bus connector for providing a connection to a voltage source. An output voltage connector provides a charging voltage to a connected battery. A switching voltage regulator generates the charging voltage responsive to the voltage source. Control circuitry monitors an actual charging current applied to the connected battery and provides a programmed current signal enabling the actual charging current to operate at a programmed level if the actual charging current does not exceed a programmed charging current level. The control circuitry provides a charging current limit signal enabling the actual charging current to operate at a predetermined charge current limit if the actual charging current exceeds the programmed charging current level. PWM control circuitry generates switching control signals to control operation of the switching voltage regulator responsive to the control circuitry.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: December 4, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Chuck Wong
  • Patent number: 10110127
    Abstract: On embodiment pertains to an apparatus including a control loop configured to receive an output voltage sense signal. The control loop includes a compensator; a PWM signal generator coupled to an output of the compensator; a reference circuit configured to receive a tracking signal, and which is configured to low bandwidth low pass filter the tracking signal when the tracking signal amplitude becomes substantially constant and representative of an output voltage that is substantially non-zero; and an error amplifier having a first input coupled to an output of the reference circuit, a second input configured to receive the output voltage sense signal, and an output coupled to the compensator.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: October 23, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Daniel Chieng
  • Patent number: 10101403
    Abstract: Systems and methods for an open wire scan are provided. In certain embodiments, An apparatus comprising a circuit includes a plurality of inputs for connecting with a plurality of outputs of a multi-cell battery pack; and an open connection detection circuit, formed within the circuit, for detecting an open connection on at least one of the plurality of inputs connected to the multi-cell battery pack and generating a fault condition responsive thereto. The open connection detection circuit comprises at least one current source device; and at least one device for turning on and off the at least one current source device. The open connection detection circuit also comprises at least one amplifier; an analog to digital converter; and a control logic circuit.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: October 16, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Anthony John Allen, Edgardo A. Laber
  • Patent number: 10090688
    Abstract: Systems and methods for overcurrent protection in a battery charger are provided. For example, a method for overcurrent protection may include controlling a switching regulator to direct electrical current between the switching regulator and a battery port; sensing a voltage drop that is related to the electrical current passing between the switching regulator and the battery port; applying a first ramp voltage to the sensed voltage drop generating a modified sensed voltage drop; comparing the modified sensed voltage drop against at least one reference voltage; and when the modified sensed voltage drop exceeds the at least one reference voltage, changing operation of the switching regulator to protect the battery charger from an overcurrent state.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: October 2, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Michael Jason Houston, John Stuart Kleine, Lei Zhao, Jia Wei
  • Patent number: 10073507
    Abstract: One embodiment pertains to a method including determining the duty cycle of a PWM signal, operating in valley current control mode when the duty cycle is greater than fifty percent, operating in peak current control mode when the duty cycle is less than fifty percent, and including, commencing a PWM pulse upon the occurrence of a pulse of a first clock signal pulse, and terminating the PWM pulse upon a level of a signal exceeding a positive window threshold.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: September 11, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Steven Laur, Daniel Zheng
  • Patent number: 10063130
    Abstract: In an embodiment, an amplifier includes first, second, and third stages, and a feedback network. The first stage has a first passband and is configured to generate a first output signal in response to first and second input signals, and the second stage has a second passband that is higher in frequency than the first passband and is configured to generate a second output signal in response to third and fourth input signals. The third stage has a first input node coupled to receive the first output signal, a second input node coupled to receive the second output signal, and an output node. And the feedback network is coupled between the second input node and the output node of the third stage. For example, where the first, second, and third stages are respective operational-transconductance-amplifier stages, such an amplifier may be suitable for low-power applications.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: August 28, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Seenu Gopalraju, Rhys Philbrick, Ruchi Parikh
  • Patent number: 10044256
    Abstract: In an embodiment, a method includes generating a pulse-width-modulated signal having a duty cycle, and isolating a power-supply output node in response to the duty cycle corresponding to a signal magnitude that is less than a magnitude of an output signal on the power-supply output node. For example, where a power supply has a non-zero residual output signal (e.g., output voltage) on its output node after the power supply is deactivated, a power-supply controller can use such a technique to reduce or eliminate a drop in the residual output signal caused by, or that would be caused by, a restarting of the power supply.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: August 7, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Harold William Satterfield, James White
  • Patent number: RE47005
    Abstract: A circuit for generating an output voltage to a top node of a plurality of LED strings. The circuit includes an inductor having a load current flowing therethrough and a switching transistor responsive to a switching control signal. An integrator generates a compensation voltage responsive to a voltage at a bottom node of the LED string and a reference voltage. Circuitry for combining an a correction offset with the compensation voltage is responsive to the compensation voltage and the load current through the inductor. The offset is generated only during a step load change of the load current and substantially reduces voltage transients from the compensation voltage and the output voltage. A summation circuit sums the compensation voltage including the correction offset with at least the voltage at the bottom node of the LED string to generate a first control signal. A latch generates the switching control signal responsive to the first control signal and a leading edge blanking signal.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: August 21, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Nicholas Ian Archibald, Allan Richard Warrington