Abstract: A current mode control regulator including a control circuit and a current generator. The control circuit regulates an output voltage based on a reference voltage using current mode control. The current generator applies an adjust current to a feedback current signal, in which the adjust current is proportional to a difference between a voltage indicative of the output voltage and the reference voltage to emulate an AC load resistance at an output of the current mode regulator. A load resistor emulator emulates an AC load resistor to increase the phase margin of current mode control regulator when operating without a battery coupled to the output, such as when the battery is physically removed or otherwise electrically disconnected. Operation is not substantially changed when the battery is connected, so that the desired phase margin is achieve with or without the battery.

Abstract: Optical proximity sensors, methods for use therewith, and systems including optical proximity sensor are described herein. Such an optical proximity sensor includes a light source and a light detector, wherein the light detector includes a plurality of individually selectable photodiodes (PDs). During a calibration mode, individual PDs of the plurality of PDs of the light detector are tested to identify which PDs are crosstalk dominated. During an operation mode, the PDs of the light detector that were not identified as being crosstalk dominated are used to produce a light detection value or signal that is useful for detecting the presence, proximity and/or motion of an object within the sense region of the optical proximity sensor. By not using the PDs that were identified as being crosstalk dominated, the signal-to-noise ratio of the light detection value or signal is improved compared to if the crosstalk dominated PDs were also used.

Abstract: An embodiment of a power-supply controller includes a switching circuit and a transition circuit. The switching circuit is configured to generate a regulated output voltage by generating first current pulses at an approximately fixed frequency during a first mode, and generating second current pulses at a variable frequency during a second mode. And the transition circuit is configured to transition the switching circuitry from the first mode to the second mode in response to a length of one of the first current pulses. For example, a power supply may include such a power-supply controller to transition the supply from a PWM mode to a PFM mode under light-load conditions. To cause this transition at a predictable load point, the controller may monitor the lengths of the current pulses during the PWM mode, and may transition the supply to a PFM mode in response to the lengths being below a threshold.

Abstract: Systems and methods are provided for overcurrent protection in a battery charger. In certain embodiments, a method includes turning on an adapter switch to receive electrical power from an adapter connected to the battery charger; controlling a switching regulator to direct electrical current between the switching regulator and a battery port. Further, the method includes sensing a voltage drop that is related to the electrical current passing between the switching regulator and the battery port; comparing the sensed voltage drop against at least one reference voltage; and, when the sensed voltage exceeds the reference voltage, changing operation of the adapter switch to protect the battery charger from an overcurrent state.

Abstract: An embodiment of a power-supply controller includes first and second circuits. The first circuit is operable to cause a first current to flow through a first phase of a power supply. And the second circuit is operable to cause the second phase of the power supply to operate in a reduced-power-dissipation mode for at least a portion of a time period during which a second current magnetically induced by the first current flows through the second phase.

Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: A method to soft start a charge pump circuit according to embodiments includes enabling switching for a plurality of power transistors, selecting a first switching control signal from a plurality of switching control signals for the selected plurality of power transistors, slowly ramping up a plurality of bootstrap supply voltages associated with the selected plurality of power transistors, driving a gate-to-source voltage of each power transistor of the selected plurality of power transistors at a first predefined level, and determining if the plurality of bootstrap supply voltages are less than a second predefined level. If the plurality of bootstrap supply voltages are less than the second predefined level, the method further includes toggling and thereby selecting a second switching control signal from the plurality of switching control signals for a second selected plurality of power transistors.

Abstract: Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an overhanging top locking feature profile; and alternating first and second segments along the edge of the paddle.

Abstract: Embodiments described herein relate to a circuit including a DC-to-DC converter and a switching device to selectively isolate an input voltage from an input node of the DC-to-DC converter. The circuit also includes a controller coupled to the input node and to the switching device. The controller is configured to apply a test voltage to the input node, to enable the switching device to be switched from a non-conductive state to a conductive state if a voltage on the input node is above a threshold while the test current is applied to the input node, and to restrict the switching device from being switched from the non-conductive state to the conductive state if the voltage on the input node is below the threshold while the test current is applied to the input node.

Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.

Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.

Abstract: An enhanced layout for a multiple-finger ESD protection device has several embodiments. In these embodiments, the base contacts of the NPN (or PNP) transistors utilized as voltage clamps in the multiple-finger NPN-based (or PNP-based) multiple-finger ESD protection device are disposed at opposite edges of the multiple-finger ESD protection device and oriented perpendicularly to the orientation of the fingers in the multiple-finger ESD protection device. Similarly, the body contacts of the NMOS (or PMOS) transistors utilized as voltage clamps in the multiple-finger NMOS-based (or PMOS-based) multiple-finger ESD protection device are disposed at opposite edges of the multiple-finger ESD protection device and oriented perpendicularly to the orientation of the fingers in the multiple-finger ESD protection device.

Abstract: An enhanced ESD clamp is provided with a resistor connected between the body terminal and the source terminal of a MOSFET device. In one exemplary embodiment, the MOSFET device is a grounded-gate NMOS (ggNMOS) transistor device with the resistor (“body resistor”) connected externally to the MOSFET device. In another embodiment, the MOSFET device is a ggPMOS transistor device. In yet another embodiment, the body resistor is disposed within and connected internally to the MOSFET device. In any event, the resistance value of the body resistor determines the level to which the trigger voltage of the ESD clamp will be reduced when an ESD event occurs.

Abstract: One embodiment is directed towards a method. The method includes forming a drift region of a first conductivity type above or in a substrate. The substrate has first and second surfaces. A first insulator is formed over a first portion of the channel, and which has a first thickness. A second insulator is formed over the second portion of the channel, and which has a second thickness that is less than the first thickness. A first gate is formed over the first insulator. A second gate is formed over the second insulator. A body region of a second conductivity type is formed above or in the substrate.

Abstract: On embodiment pertains to a method including determining if an amplitude of an error signal has entered steady state. If the amplitude of the error signal has not entered steady state, then amplify with a high gain the amplitude of the AC component of the error signal. If the amplitude of the error signal has entered steady state, then initiate a timer. Determining if the amplitude of the error signal has remained in steady state while the timer runs. If the amplitude of the error signal has remained in steady state while the timer runs, then amplify with a low gain the amplitude of the AC component of the error signal.

Abstract: Systems and methods for digital voltage compensation in a power supply integrated circuit are provided. In at least one embodiment, a method comprises receiving a digital voltage code, the digital voltage code corresponding to an output voltage value; setting an output count on a first counter to change from a present first digital count corresponding to a present voltage code value toward a target first digital count corresponding to a new voltage code value; and setting a second count to an offset count value on a second counter when the new voltage code value is received. The method also comprises combining the second count with the output count to form a combined count value; and decrementing the second count value from the offset count value to zero when the first counter reaches the target first digital count.

Abstract: Optical proximity sensors, methods for use therewith, and systems including optical proximity sensor are described herein. Such an optical proximity sensor includes a light source and a light detector, wherein the light detector includes a plurality of individually selectable photodiodes (PDs). During a calibration mode, individual PDs of the plurality of PDs of the light detector are tested to identify which PDs are crosstalk dominated. During an operation mode, the PDs of the light detector that were not identified as being crosstalk dominated are used to produce a light detection value or signal that is useful for detecting the presence, proximity and/or motion of an object within the sense region of the optical proximity sensor. By not using the PDs that were identified as being crosstalk dominated, the signal-to-noise ratio of the light detection value or signal is improved compared to if the crosstalk dominated PDs were also used.

Abstract: An optical proximity detector includes a plurality photodetectors (PDs) and a winner-take-all (WTA) circuit. Each of the PDs has a respective field of view (FOV) and produces a respective analog current detection signal indicative of light incident on and detected by the PD. In an embodiment, the WTA circuit includes a comparator and a multiplexor (MUX). The comparator compares the analog current detection signals produced by the PDs and produces a selection signal in dependence thereon. The MUX receives the analog current detection signals produced by the PDs and outputs one of the analog current detection signals in dependence on the selection signal produced by the comparator. Circuitry, which is shared by the PDs, produces a digital detection signal corresponding to the one of the analog current detection signals output by the MUX. Such design can be used to reduce power consumption, size and cost of an optical proximity detector.

Abstract: A method includes determining whether to switch from a first input video signal to a second input video signal. Upon switching from a first input video signal to a second input video signal, determining whether the current displayed frame has terminated. If the current displayed frame has terminated, process the second video input signal and load data corresponding to the second video input signal from the timing generator, scale and pixel clock registers correspondingly into the timing generator, scaler and pixel clock. Generate a clock signal for the second input video signal. Calculate generator parameter(s) corresponding to the second input video signal. Generate timing control signals for the second input video signal. Determine if a new frame of the second input video signal has occurred. Provide timing control signals and pixel data for the video to be displayed and corresponding the second input video signal.

Abstract: Auto-compensation—for compensating voltage regulators generating a regulated output voltage—may be performed dynamically by determining various coefficients of a compensation function used in compensating the power regulator, based at least on assumptions about the structure of the regulator and corresponding filters. At least the DC loop gain and the position of the compensation zeros may be determined without requiring any prior knowledge of the values of the various components of the system. The compensator coefficients may be adjusted based on duty-cycle jitter information, which may be accurately obtained/measured at a high signal-to-noise ratio. By observing the duty-cycle jitter, the capacitor (equivalent series resistance) may be optimally compensated by tuning the 0 dB crossover slope of the loop gain. Accordingly, auto-compensation may be performed by measuring the duty-cycle jitter while maintaining optimum stability and transient performance.