Patents Assigned to ROHM Co., Ltd.
  • Publication number: 20240128315
    Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota NAKAMURA
  • Publication number: 20240129673
    Abstract: A transducer includes: a film support portion; a vibration film that is connected to the film support portion and capable of displacing in a thickness direction; a base material having an opposed surface that is opposed to the vibration film; and a first piezoelectric element that is provided with a pair of electrodes and a piezoelectric film sandwiched between the pair of electrodes, and is arranged on the vibration film, in which the transducer maintains a pressure in a space between the base material and the vibration film so as to keep displacement of the vibration film within a certain range.
    Type: Application
    Filed: December 12, 2023
    Publication date: April 18, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Takashi NAIKI, Noriyuki SHIMOJI, Tomohiro DATE, Kenji GOUDA, Yurina AMAMOTO
  • Publication number: 20240128366
    Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer made of a nitride semiconductor; a second nitride semiconductor layer made of a nitride semiconductor having a bandgap larger than that of the first nitride semiconductor layer; a gate electrode located above the second nitride semiconductor layer; and a source electrode and a drain electrode formed on the second nitride semiconductor layer, wherein the first nitride semiconductor layer includes one or more stacked bodies, each of which includes a doped layer as a carbon-doped gallium nitride layer, and a non-doped layer as a non-doped gallium nitride layer formed on the doped layer, and wherein in a region below at least one of the gate electrode or the drain electrode, the number of dislocation lines passing through a top surface of the non-doped layer is smaller than the number of dislocation lines passing through a bottom surface of the non-doped layer.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 18, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Shinya TAKADO
  • Publication number: 20240128263
    Abstract: The present invention provides a nitride semiconductor device, including: a silicon substrate; a first lateral transistor over a first region of the silicon substrate and including: a first nitride semiconductor layer formed over the silicon substrate; and a first gate electrode, a first source electrode and a first drain electrode formed over the first nitride semiconductor layer; a second lateral transistor over a second region of the silicon substrate and including: a second nitride semiconductor layer formed over the silicon substrate; and a second gate electrode, a second source electrode and a second drain electrode formed over the second nitride semiconductor layer; a first separation trench formed over a third region; a source/substrate connecting via hole formed over the third region; a first interlayer insulating layer formed over the first source electrode and the second source electrode; and a second interlayer insulating layer formed in the first separation trench.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 18, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Hirotaka OTAKE
  • Publication number: 20240128373
    Abstract: The semiconductor device includes a chip which has a main surface, a first conductivity type channel region which is formed in a surface layer portion of the main surface, a second conductivity type drift region which is formed in the surface layer portion of the main surface so as to be adjacent to the channel region, a gate insulating film which covers the channel region and the drift region on the main surface, and a polysilicon gate which has a second conductivity type first portion which faces the channel region across the gate insulating film and a first conductivity type second portion which faces the drift region across the gate insulating film and forms a pn-junction portion with the first portion.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Yusuke SHIMIZU
  • Patent number: 11962246
    Abstract: The present disclosure provides a power supply control device and a flyback converter. The power supply control device includes: a comparator, comparing a current sensing signal generated by IN conversion of a primary side current flowing in the primary winding with a threshold voltage; a switching controller, turning off a switching element according to a comparing result of the current sensing signal and the threshold voltage by the comparator; an external terminal, connectable to a connection node of an external resistor connected in series between one end of the auxiliary winding and an application end of a ground potential; a current detector, detecting a terminal current flowing through the external terminal; and a threshold voltage corrector, correcting the threshold voltage based on a current detection signal of the current detector.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: April 16, 2024
    Assignee: Rohm Co., Ltd.
    Inventor: Hiroki Kikuchi
  • Patent number: 11961790
    Abstract: A semiconductor module includes a conductive substrate, a plurality of first semiconductor elements, and a plurality of second semiconductor elements. The conductive substrate includes a first conductive portion to which the plurality of first semiconductor elements are electrically bonded, and a second conductive portion to which the plurality of second semiconductor elements are electrically bonded. The semiconductor module further includes a first input terminal, a second input terminal, and a third input terminal that are provided near the first conductive portion. The second input terminal and the third input terminal are spaced apart from each other with the first input terminal therebetween. The first input terminal is electrically connected to the first conductive portion. A polarity of the first input terminal is set to be opposite to a polarity of each of the second input terminal and the third input terminal.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: April 16, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Hayashi, Kohei Tanikawa, Ryosuke Fukuda
  • Patent number: 11961883
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a device forming region and an outside region, an impurity region of a second conductivity type formed in a surface layer portion of a first main surface in the device forming region, a field limiting region of a second conductivity type formed in the surface layer portion in the outside region and having a impurity concentration higher than that of the impurity region, and a well region of a second conductivity type formed in a region between the device forming region and the field limiting region in the surface layer portion in the outside region, having a bottom portion positioned at a second main surface side with respect to bottom portions of the impurity region and the field limiting region, and having a impurity concentration higher than that of the impurity region.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: April 16, 2024
    Assignee: ROHM CO. LTD.
    Inventor: Jun Takaoka
  • Patent number: 11961816
    Abstract: A semiconductor device includes a semiconductor layer having a first surface, an insulating layer formed at the first surface of the semiconductor layer, a Cu conductive layer formed on the insulating layer, the Cu conductive layer made of a metal mainly containing Cu, a second insulating layer formed on the insulating layer, the second insulating layer covering the Cu conductive layer, a Cu pillar extending in a thickness direction in the second insulating layer, the Cu pillar made of a metal mainly containing Cu and electrically connected to the Cu conductive layer, and an intermediate layer formed between the Cu conductive layer and the Cu pillar, the intermediate layer made of a material having a linear expansion coefficient smaller than a linear expansion coefficient of the Cu conductive layer and smaller than a linear expansion coefficient of the Cu pillar.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: April 16, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Takei, Yuji Koga
  • Publication number: 20240120387
    Abstract: A nitride semiconductor device includes a passivation layer which has a first opening and a second opening, and which covers an electron supply layer, a gate layer, and a gate electrode. The passivation layer includes: a first insulation layer formed on at least a portion of the electron supply layer positioned, in plan view, between the first opening and gate layer; and a second insulation layer which covers the gate layer and gate electrode, and which is formed on the electron supply layer positioned, in plan view, between the second opening and gate layer. The second insulation layer is formed from a material having a Young's modulus lower than that of the first insulation layer.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Hirotaka OTAKE
  • Publication number: 20240120384
    Abstract: An SiC semiconductor device includes an SiC chip that has a main surface, and an n-type drift region that is formed in a surface layer portion of the main surface and has an impurity concentration adjusted by at least two types of pentavalent elements.
    Type: Application
    Filed: November 18, 2021
    Publication date: April 11, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Kenji YAMAMOTO, Yuki NAKANO
  • Publication number: 20240120322
    Abstract: A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Keiji OKUMURA
  • Patent number: 11955414
    Abstract: A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.
    Type: Grant
    Filed: August 24, 2023
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kohei Tanikawa, Kenji Hayashi, Ryosuke Fukuda
  • Patent number: 11955440
    Abstract: A semiconductor device includes an insulating support member, a first and a second conductive layer, a first semiconductor element, a first lead, a first detection conductor and a first gate conductor. The first and second conductive layers are disposed on a front surface of the insulating support member. The first semiconductor includes a first and a second electrode on the same side, and a third electrode disposed on the other side and electrically connected to the first conductive layer. The first lead is connected to the first and second conductive layer. The first detection conductor is connected to the first electrode. The first gate conductor is connected to the second electrode. At least one of the first detection conductor and the first gate conductor has an end connected to the first semiconductor element. The end has a coefficient of linear expansion smaller than that of the first conductive layer.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Katsuhiko Yoshihara
  • Patent number: 11955411
    Abstract: The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.
    Type: Grant
    Filed: April 5, 2023
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Koshun Saito, Tsuyoshi Tachi
  • Patent number: 11955452
    Abstract: A semiconductor module includes: a first conductive portion; a second conductive portion spaced from the first conductive portion in a first direction; first semiconductor elements electrically bonded to the first conductive portion and mutually spaced in a second direction perpendicular to the first direction; and second semiconductor elements electrically bonded to the second conductive portion and mutually spaced in the second direction. The semiconductor module further includes: a first input terminal electrically connected to the first conductive portion; a second input terminal of opposite polarity to the first input terminal; and an output terminal opposite from the two input terminals in the first direction and electrically connected to the second conductive portion.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Hayashi, Kohei Tanikawa, Ryosuke Fukuda
  • Patent number: 11955413
    Abstract: A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.
    Type: Grant
    Filed: August 24, 2023
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kohei Tanikawa, Kenji Hayashi, Ryosuke Fukuda
  • Patent number: D1021829
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yoshihisa Tsukamoto, Akihiro Kimura
  • Patent number: D1021831
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Kenji Yamamoto, Yasunori Kutsuma
  • Patent number: D1022932
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: April 16, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Yoshihisa Tsukamoto