Patents Assigned to ROHM Co., Ltd.
  • Patent number: 11924941
    Abstract: In a first light emission control device, a clock signal is generated, and after a first driving sequence starts to be performed in which the respective states of light-emitting elements in a first light-emitting element array are sequentially switched synchronously with the clock signal, at a particular time point a characteristic of the clock signal is changed from a first characteristic to a second characteristic. After the change, in a second light emission control device, a second driving sequence is performed in which the respective states of light-emitting elements in a second light-emitting element array are sequentially switched synchronously with the clock signal.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventors: Shinsuke Takagimoto, Akira Aoki
  • Patent number: 11923128
    Abstract: An electronic component includes an insulating layer, a low voltage conductor pattern formed inside the insulating layer, a high voltage conductor pattern formed inside the insulating layer such as to face the low voltage conductor pattern in an up/down direction, and a withstand voltage enhancement structure of conductive property formed inside the insulating layer and along the high voltage conductor pattern such as to protrude further outside than the low voltage conductor pattern in plan view.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: March 5, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Taketoshi Tanaka, Kosei Osada, Masahiko Arimura
  • Patent number: 11923834
    Abstract: A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventor: Tetsuo Yamato
  • Patent number: 11923277
    Abstract: A semiconductor device includes a conductive support member, a first semiconductor element, and a second semiconductor element. The conductive support member includes a first die pad and a second die pad separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. The first die pad has a first main surface mounting the first semiconductor element, and a first back surface opposing the first main surface. The second die pad has a second main surface mounting the second semiconductor element, and a second back surface opposing the second main surface. When viewed along a second direction, a distance in the first direction between the first back surface and the second back surface is larger than a distance in the first direction between the first main surface and the second main surface.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: March 5, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yoshizo Osumi, Hiroaki Matsubara, Tomohira Kikuchi
  • Patent number: 11922840
    Abstract: A liquid crystal display device includes a pixel array including a plurality of rows of gate lines, a plurality of columns of source lines, a plurality of switches, and a plurality of liquid crystal cells; a gate driver IC connected to the gate lines; a source driver IC connected to the source lines; a timing control IC arranged to control operation timings of the gate driver IC and the source driver IC; and a system power supply IC arranged to supply a power supply voltage to the source driver IC. Each of the timing control IC and the system power supply IC has a function of detecting an abnormality in the gate driver IC and an abnormality in the source driver IC.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventors: Yasuhiro Tamano, Shinji Kawata, Yoko Nomaguchi
  • Patent number: 11923833
    Abstract: For example, the switching drive device 100 includes a driver 30 configured to drive an N-type semiconductor switch element, a current limiter 50 configured to limit a current fed to a boot capacitor BC1 included in a bootstrap circuit BTC, and a current controller 60 configured to control the operation of the current limiter 50. The current controller 60 is configured to drive the current limiter 50 to limit the current fed to the boot capacitor BC1 when the charge voltage across the boot capacitor BC1 is higher than a threshold value.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: March 5, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Hama, Takahiro Kotani
  • Patent number: 11919441
    Abstract: A lamp control device comprises a first input terminal, a second input terminal, an output terminal that is configured to be connectable to a lamp via an external switch and outputs a drive current for the lamp, an internal switch provided on a first path connecting the first input terminal and the output terminal, a constant current section provided on a second path connecting the second input terminal and the output terminal, a voltage monitoring section that monitors a voltage applied to the output terminal, and a control section that controls the internal switch on the basis of a monitoring result from the voltage monitoring section.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventor: Masaaki Nakayama
  • Patent number: 11923017
    Abstract: A non-volatile storage device includes a memory that stores data in a non-volatile manner, a power supply that generates an internal voltage to feed it to the memory, a controller that controls the memory and the power supply, an A/D converter that performs A/D conversion on the internal voltage, and a fault detector that detects a fault related to data written in the memory based on the output of the A/D converter.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventors: Kazuhisa Ukai, Koji Nigoriike
  • Publication number: 20240071908
    Abstract: A semiconductor device includes an interlayer insulating film, and a wiring of an uppermost layer arranged on the interlayer insulating film, wherein the wiring includes a seed layer arranged on the interlayer insulating film and a wiring body portion arranged on the seed layer, wherein a constituent material of the wiring body portion is copper or a copper alloy, and wherein a trench is formed in an upper surface of the interlayer insulating film along an outer edge of the interlayer insulating film in a plan view.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 29, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Shoji TAKEI, Akinori NII
  • Publication number: 20240071875
    Abstract: A semiconductor device, includes: a substrate having an obverse surface facing in a thickness direction; a first lead having a loading surface facing a side same as a side the obverse surface faces as to the thickness direction and being fixed on the obverse surface; and a first semiconductor element arranged on the loading surface. A dimension of the substrate in a first direction orthogonal to the thickness direction is larger than a dimension of the substrate in a second direction orthogonal to the thickness direction and the first direction. The first lead includes a first region overlapped with the first semiconductor element as viewed in the thickness direction and a second region separated from the first semiconductor element as viewed in the thickness direction, and at least a part of the second region extends along the second direction.
    Type: Application
    Filed: January 20, 2022
    Publication date: February 29, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Hiroyuki TAJIRI
  • Publication number: 20240072108
    Abstract: An SiC semiconductor device includes an SiC semiconductor chip that has a main surface, an n-type drift region that is formed in a surface layer portion of the main surface and has an impurity concentration adjusted by at least two types of pentavalent elements, and a p-type impurity region that is formed inside the drift region such as to form a pn-junction portion with the drift region.
    Type: Application
    Filed: November 18, 2021
    Publication date: February 29, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Hiroaki SHIRAGA, Kenji YAMAMOTO
  • Patent number: 11914219
    Abstract: A position detection unit generates a position detection value PFB that indicates the position of a control target. A temperature detection unit generates a temperature detection value that indicates the temperature. A correction unit corrects the position detection value PFB. A controller generates a control instruction value SREF such that the position detection value PFB_CMP subjected to the correction matches a position instruction value PREF that indicates the target position of the control target. A driver unit applies a driving signal that corresponds to the control instruction value SREF to an actuator. The correction unit corrects the position detection value PFB such that the relation between the position detection value PFB and the actual position exhibits linearity that is uniform independent of the temperature.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Jun Maede, Akihito Saito, Yoshihiro Sekimoto
  • Patent number: 11916112
    Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as a device surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface, a main surface insulating layer including an insulating material, covering the first main surface of the SiC semiconductor layer, and having an insulating side surface continuous to the side surface of the SiC semiconductor layer, and a boundary modified layer including a first region that is modified to be of a property differing from the SiC monocrystal and a second region that is modified to be of a property differing from the insulating material, and being formed across the side surface of the SiC semiconductor layer and the insulating side surface of the main surface insulating layer.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yasuhiro Kawakami, Yuki Nakano, Masaya Ueno, Seiya Nakazawa, Sawa Haruyama, Yasunori Kutsuma
  • Patent number: 11916034
    Abstract: A semiconductor device includes a semiconductor layer having a first surface, an insulating layer formed at the first surface of the semiconductor layer, a Cu conductive layer formed on the insulating layer, the Cu conductive layer made of a metal mainly containing Cu, a second insulating layer formed on the insulating layer, the second insulating layer covering the Cu conductive layer, a Cu pillar extending in a thickness direction in the second insulating layer, the Cu pillar made of a metal mainly containing Cu and electrically connected to the Cu conductive layer, and an intermediate layer formed between the Cu conductive layer and the Cu pillar, the intermediate layer made of a material having a linear expansion coefficient smaller than a linear expansion coefficient of the Cu conductive layer and smaller than a linear expansion coefficient of the Cu pillar.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Takei, Yuji Koga
  • Patent number: 11916000
    Abstract: A semiconductor device includes a first die pad, a second die pad, a first semiconductor element, a second semiconductor element, an insulating element, first terminals, second terminals, and a sealing resin. The sealing resin has a top surface, a bottom surface, and a first side surface connected to the top surface and the bottom surface. The first side surface includes a first region connected to the top surface, a second region connected to the bottom surface, and a third region connected to the first region and the second region, the plurality of first terminals being exposed to the third region. A surface roughness of each of the top surface, the bottom surface, the first region, and the second region is larger than a surface roughness of the third region.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Hiroaki Matsubara
  • Patent number: 11916069
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate, a switching element which is defined on the semiconductor substrate, and a temperature sense element which is provided on the surface of the semiconductor substrate independently from the switching element and characterized by being dependent on a temperature.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Yuki Nakano
  • Patent number: 11914439
    Abstract: A synchronous reset signal is generated from an asynchronous reset signal. The synchronous reset signal is output from the final-stage FF among L FFs connected in a cascade arrangement. A first error determination signal is output from the final-stage FF among M FFs connected in a cascade arrangement. Among N FFs connected in a cascade arrangement, the initial-stage FF receives the first error determination signal, and the final-stage FF outputs a second error determination signal. Based on the three outputs, the presence or absence of a fault in the circuit is determined. L, M, and N fulfil M?2, L?M+1, and M+N?L+1.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: February 27, 2024
    Assignee: Rohm Co., Ltd.
    Inventors: Hiromitsu Kimura, Yuji Kurotsuchi
  • Publication number: 20240059554
    Abstract: A MEMS module includes a MEMS element provided with a substrate in which a hollow portion is formed, the MEMS element including a movable portion of the substrate which covers the hollow portion and has a thickness that allows a shape of the movable portion to be deformable, a first gauge resistor arranged on the substrate such that at least a portion of the first gauge resistor overlaps with the hollow portion, and a second gauge resistor arranged on the substrate in a region surrounding the first gauge resistor without overlapping with the hollow portion, and an electronic component configured to correct detection information of the MEMS element by using a first electrical signal detected by the first gauge resistor and a second electrical signal detected by the second gauge resistor and calculate an amount of change in air pressure.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 22, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Toru HIGUCHI, Kosuke YAMASHIRO
  • Publication number: 20240061010
    Abstract: An acceleration detecting portion that detects an acceleration in a predetermined direction and an offset detecting portion that detects an offset amount with respect to the acceleration detecting portion are included. The offset detecting portion includes a second semiconductor substrate with a second cavity formed in its interior, a second fixed structure including a second fixed electrode that is supported, in a state of floating with respect to the second cavity, by the second semiconductor substrate, a second movable structure including a second movable electrode that is supported, in a state of floating with respect to the second cavity, by the second semiconductor substrate, and a disabling structure that disables a function of the second movable electrode displacing with respect to the second fixed electrode.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 22, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Hiroki MIYABUCHI
  • Patent number: 11908868
    Abstract: A semiconductor device (1) is manufactured which includes a SiC epitaxial layer (28), a plurality of transistor cells (18) that are formed in the SiC epitaxial layer (28) and that are subjected to ON/OFF control by a predetermined control voltage, a gate electrode (19) that faces a channel region (32) of the transistor cells (18) in which a channel is formed when the semiconductor device (1) is in an ON state, a gate metal (44) that is exposed at the topmost surface for electrical connection with the outside and that is electrically connected to the gate electrode (19) while being physically separated from the gate electrode (19), and a built-in resistor (21) that is made of polysilicon and that is disposed below the gate metal (44) so as to electrically connect the gate metal (44) and the gate electrode (19) together.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: February 20, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Katsuhisa Nagao, Noriaki Kawamoto