Patents Assigned to ROHM Co., Ltd.
  • Publication number: 20240097008
    Abstract: A semiconductor device includes: an n-type semiconductor layer; a p-type drift region formed in a surface layer of the n-type semiconductor layer; an n-type body region formed in the surface layer of the n-type semiconductor layer so as to be spaced apart from or adjacent to the p-type drift region; a p-type drain region formed in a surface layer of the p-type drift region; a p-type source region formed in a surface layer of the n-type body region; a gate insulating film formed over a surface of the n-type semiconductor layer so as to straddle the p-type drift region and the n-type body region; a gate electrode formed over the gate insulating film; and an n-type region formed in the surface layer of the p-type drift region and arranged between a side edge of the p-type drift region near the n-type body region and the p-type drain region.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 21, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Kazuhiro TAMURA, Naoki IZUMI, Hajime OKUDA
  • Publication number: 20240097028
    Abstract: A semiconductor device includes an n-type semiconductor layer, a p-type drift region formed in a surface layer portion of the semiconductor layer, an n-type body region formed in the surface layer portion of the semiconductor layer, a p-type drain region formed in a surface layer portion of the drift region, a p-type source region formed in a surface layer portion of the body region, a gate insulating film formed on a surface of the semiconductor layer, and a polysilicon gate formed on the gate insulating film, wherein a region extending from the source region to a side edge of the drift region is a channel region, and wherein the polysilicon gate includes a p-type first portion facing at least a portion of the channel region, and an n-type second portion facing at least a portion of the drift region.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 21, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Kazuhiro TAMURA, Naoki IZUMI, Yusuke SHIMIZU
  • Publication number: 20240092632
    Abstract: The present disclosure provides a MEMS device. The MEMS device includes: a substrate; a recess, disposed in the substrate; a movable portion, hollowly supported in the recess; and an isolation joint, inserted into a predetermined position of the movable portion and electrically insulating both sides of the movable portion. A shortest distance between a bottom of the recess and the movable portion is less than a distance between the bottom of the recess and the isolation joint.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 21, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Martin Wilfried HELLER, Daisuke KAMINISHI
  • Publication number: 20240092631
    Abstract: The present disclosure provides a MEMS sensor. The MEMS sensor includes a first substrate having a cavity and a second substrate bonded to the first substrate. The first substrate is provided with an electrode movably disposed in the cavity and a sealed member coupling to the second substrate. The second substrate is provided with a stop member for restricting a movement of the electrode toward the second substrate and a sealing member coupling to the sealed member. The sealed member is formed by a first metal layer on the first substrate. The sealing member is formed by a second metal layer on the second substrate. A polycrystalline layer is formed on the stop member. The polycrystalline layer is disposed between the second substrate and the second metal layer.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 21, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yoshiyuki INUI, Toma FUJITA
  • Patent number: 11933813
    Abstract: Disclosed herein is a wind measuring system including a first flow sensor and plural second flow sensors. The first flow sensor and the plural second flow sensors each include a microheater including a board, an insulating film, and a heater. The board includes a first principal surface and a second principal surface. The board has defined therein an opening portion passing through the board along a direction from the first principal surface toward the second principal surface. The insulating film includes a peripheral portion disposed on the first principal surface, a central portion having the heater disposed thereon, and a connection portion extending from the central portion to be connected to the peripheral portion to support the central portion over the opening portion. The first flow sensor and the plural second flow sensors each output a signal that varies according to a change in electrical resistance value of the heater.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: March 19, 2024
    Assignee: ROHM Co., LTD.
    Inventor: Shunsuke Akasaka
  • Patent number: 11936349
    Abstract: The present disclosure provides an audio circuit capable of inhibiting a current when mute is deactivated. An output terminal of a class D amplifier circuit is connected to an electroacoustic conversion element through a low-pass filter. An output node of a bridge circuit is connected to the output terminal. An integrator integrates and outputs, in a non-mute period in which a mute control signal is negated, a difference between an input signal and a feedback signal corresponding to an output signal generated at the output terminal, and outputs a predetermined bias voltage in a mute period in which the mute control signal is asserted. A PWM comparator compares the output of the integrator with a periodic voltage. A driver switches, in the non-mute period, the bridge circuit according to an output of the PWM comparator, and fixes an output of the bridge circuit in the mute period.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: March 19, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Hideo Araki
  • Patent number: 11933836
    Abstract: For example, a method of measuring a device parameter includes: a step of repeatedly measuring the gate-source voltage (or gate-emitter voltage) of a switching element in its switching transient state while switching the external gate resistance for the switching element among m resistance values (where m is an integer of three or more); and a step of, while representing the internal gate resistance and the plateau voltage of the switching element by Rgin and Vp respectively and using the m resistance values of the external gate resistance and corresponding m voltage values of the gate-source voltage (or gate-emitter voltage) as Rg(k) and Vgs(k) respectively (where k=1, 2 . . . m), performing the fitting of the equation Vgs(k)=Rg(k)/(Rg(k)+Rgin)×Vp, thereby to derive the internal gate resistance Rgin or the plateau voltage Vp of the switching element.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: March 19, 2024
    Assignee: Rohm Co., Ltd.
    Inventor: Tatsuya Yanagi
  • Patent number: 11936369
    Abstract: A switching device 1 includes a SiC semiconductor chip 11 which has a gate pad 14, a source pad 13 and a drain pad 12 and in which on-off control is performed between the source and the drain by applying a drive voltage between the gate and the source in a state where a potential difference is applied between the source and the drain, a sense source terminal 4 electrically connected to the source pad 13 for applying the drive voltage, and an external resistance (source wire 16) that is interposed in a current path between the sense source terminal 4 and the source pad 13, is separated from sense source terminal 4, and has a predetermined size.
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: March 19, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Masashi Hayashiguchi, Kazuhide Ino
  • Patent number: 11936298
    Abstract: The present disclosure relates to a high-side transistor drive circuit, a switching circuit and a controller of a DC/DC converter. A pulse generator generates a first pulse that becomes high level for a certain period of time in response to a first edge of an input signal and a second pulse that becomes high level for a certain period of time in response to a second edge of the input signal. An open drain circuit has a first output node that becomes low level in response to the first pulse and a second output node that becomes low level in response to the second pulse. A first current mirror circuit folds back a first current flowing through the first output node of the open drain circuit. A second current mirror circuit folds back a second current flowing through the second output node of the open drain circuit.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Tsutomu Ishino
  • Publication number: 20240083741
    Abstract: The present disclosure provides a MEMS device having a movable portion. The MEMS device includes: a substrate; a recess, disposed in the substrate; the movable portion, hollowly supported in the recess; and a bump stop, hollowly supported in the recess and configured to restrict a movement of the movable portion by contacting the movable portion. The bump stop includes: a protruding portion, configured to contact the movable portion; and a shock absorbing portion, disposed between the protruding portion and the substrate and configured to absorb at least a part of an impact force applied to the protruding portion by elastic deformation.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 14, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Daisuke NISHINOHARA, Hideaki HASHIMOTO, Toma FUJITA
  • Publication number: 20240087942
    Abstract: A method for processing a semiconductor wafer comprises: preparing a semiconductor wafer including a main body and a rim, the rim having a greater thickness than the main body and including a projection projecting; supporting the semiconductor wafer with a holding tape; preparing a base including a stage and an outer portion; setting the semiconductor wafer on the base so that the main body is supported by a support surface of the stage; and separating the main body and the rim by cutting an edge portion of the main body in a state in which the main body is supported by the stage. The setting the semiconductor wafer on the base includes setting the semiconductor wafer on the base so that the main body is supported by the stage in a state in which the projection is separated from a head surface of the outer portion of the base.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Ryosuke YAMADA, Yuichi NAKAO
  • Publication number: 20240088282
    Abstract: A semiconductor device includes a semiconductor substrate, a transistor formed on the semiconductor substrate, an insulation layer arranged on the semiconductor substrate, a source pad formed on a head surface of the insulation layer and electrically connected to the source electrode, a drain pad formed on the head surface of the insulation layer and electrically connected to the drain electrode, a gate pad formed on the head surface of the insulation layer and connected to the gate electrode, a specified pad formed on the head surface of the insulation layer, and a capacitor. The capacitor includes a source-side electrode, electrically connected to the source electrode, and a specified electrode, electrically connected to the specified pad and arranged facing the source-side electrode.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 14, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Tsuyoshi TACHI
  • Publication number: 20240089667
    Abstract: A transducer includes: a substrate including a main surface and a back surface facing the main surface; a plurality of vibrating films formed in the substrate at a predetermined thickness between the main surface and a plurality of recesses formed in the back surface of the substrate such that the main surface can vibrate in the thickness direction of the substrate; and a plurality of driving layers laminated on the plurality of vibrating films, each being constituted by a pair of electrode layers of a lower electrode layer and an upper electrode layer with a piezoelectric layer therebetween and being disposed on the main surface, in which the plurality of vibrating films include vibrating films arranged at predetermined intervals in each of at least two directions in a plane of the main surface, and the transducer generate sufficient sound volume because the transducer is used as a speaker.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Takashi NAIKI
  • Patent number: 11929394
    Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: March 12, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura
  • Patent number: 11929365
    Abstract: A semiconductor device includes a semiconductor layer that has a first main surface at one side and a second main surface at another side and includes an active region, a plurality of IGBT regions that are formed in the active region, and a plurality of diode regions that are formed in the active region such as to be adjacent to the plurality of IGBT regions, and where when a total extension of boundary lines between the plurality of IGBT regions and the plurality of diode regions is represented by L, a total area of the plurality of diode regions is represented by SD, and a dispersion degree of the plurality of diode regions with respect to the active region is defined by a formula Loge (L2/SD), the dispersion degree is not less than 2 and not more than 15.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 12, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Shinya Umeki
  • Patent number: 11926156
    Abstract: The present disclosure provides a thermal print head and a method of fabricating the thermal print head. The thermal print head includes a substrate made of a semiconductor material and having a main surface and a convex portion, a resistor layer including a plurality of heat generating portions on the convex portion, and a wiring layer conducted to the plurality of heat generating portions and formed to contact the resistor layer. The convex portion has a top surface, a first inclined surface and a second inclined surface. At least one of two ends of the convex portion in the main scanning direction forms a third inclined surface connected to the main surface and the first inclined surface, and a fourth inclined surface connected to the main surface and the second inclined surface.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 12, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Satoshi Kimoto
  • Publication number: 20240079262
    Abstract: A support stage includes a base portion, a support portion that is erected at a peripheral edge portion of the base portion and with which one surface of a wafer is to be come into contact, a suction groove that is provided at the support portion and to which a suction force with respect to the one surface is to be given, an ejecting hole that is provided in an inward portion of the base portion and by which a gas is to be ejected toward the one surface, and an exhaust hole that is provided in at least either one of the base portion and the support portion and by which a gas is to be discharged from a space between the base portion, the support portion, and the one surface.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicants: ROHM CO., LTD., LAPIS Semiconductor Co., Ltd.
    Inventors: Hajime USHIO, Yuta MAKINO, Hirofumi SHIRAGASAWA
  • Publication number: 20240079469
    Abstract: A semiconductor device includes a semiconductor layer, a Schottky electrode that is formed at a first surface of the semiconductor layer and that forms a Schottky junction Sj between the semiconductor layer and the Schottky electrode, and the Schottky electrode has a first portion that is selectively formed near the first surface of the semiconductor layer in a thickness direction of the Schottky electrode and that is made of Ti containing oxygen. The Schottky electrode may have a second portion that is formed on the first portion and that is made of Ti and N.
    Type: Application
    Filed: October 5, 2023
    Publication date: March 7, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Masaya UENO, Sawa HARUYAMA, Masaya SAITO
  • Patent number: 11923278
    Abstract: A semiconductor module includes a semiconductor device and bus bar. The device includes an insulating substrate, conductive member, switching elements, and first/second input terminals. The substrate has main/back surfaces opposite in a thickness direction, with the conductive member disposed on the main surface. The switching elements are connected to the conductive member. The first input terminal, including a first terminal portion, is connected to the conductive member. The second input terminal, including a second terminal portion overlapping with the first terminal portion in the thickness direction, is connected to the switching elements. The second input terminal is separate from the first input terminal and conductive member in the thickness direction. The bus bar includes first/second terminals. The second terminal, separate from the first terminal in the thickness direction, partially overlaps with the first terminal in the thickness direction.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: March 5, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Masashi Hayashiguchi, Takumi Kanda
  • Patent number: 11923860
    Abstract: A DCO is configured such that, during a period in which a selection signal is asserted, a ring oscillator is formed so as to oscillate at a frequency that corresponds to a control code, and such that, during a period in which the selection signal SEL is negated, an injection edge based on a reference clock can be injected. During the startup period of a PLL circuit, a controller repeats a cycle including (i) a process in which the selection signal is asserted so as to oscillate the DCO, and phase comparison is made between an oscillator clock and the reference clock, and (ii) a process in which the selection signal is negated so as to stop the DCO, and the control code is updated by a binary search based on a result of the phase comparison.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: March 5, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Masanobu Tsuji