Abstract: Semiconductor wafers are produced by a process wherein a single-crystal ingot of semiconductor material is pulled and at least one wafer is removed from the ingot, wherein the wafer is subjected to a thermal treatment comprising a heat treatment step in which a radial temperature gradient acts on the wafer, wherein an analysis of the wafer of semiconductor material with respect to the formation of defects in the crystal lattice, so-called stress fields, is carried out.

Abstract: A method produces semiconductor wafers of monocrystalline silicon. The method includes: pulling a cylindrical section of a single silicon crystal from a melt contained in a crucible, wherein the oxygen concentration in the cylindrical section is not more than 5×1017 atoms/cm3; subjecting the melt to a horizontal magnetic field; rotating the crucible at a rotational velocity and in a rotational direction during the pulling of the cylindrical section of the single crystal; and removing the semiconductor wafers of monocrystalline silicon from the cylindrical section of the single crystal. An amount of rotational velocity, averaged over time, is less than 1 rpm and the rotational direction is changed continually and the amplitude of the rotational velocity before and after the change in the rotational direction is not less than 0.5 rpm and not more than 3.0 rpm.

Abstract: A multiplicity of wafers are simultaneously cut from an ingot using a structured sawing wire having indentations and protrusions along its length, wherein the structured sawing wire is guided through grooves of two wire guide rolls, and a bottom of each groove, on which the structured wire bears, has a curved groove bottom with a radius of curvature which, for each groove, is equal to or up to 1.5 times as large as the radius of the envelope of the structured wire which the structured wire has in the respective groove.

Abstract: A heteroepitaxial wafer comprises, in the following order: a silicon substrate having a diameter and a thickness; an AlN nucleation layer; a first strain building layer which is an AlzGal-zN layer having a first average Al content z, wherein 0<z; a first strain preserving block comprising ?5 and ?50 units of a first sequence of layers, the first sequence comprising an AlN layer and at least two AlGaN layers, and having a second average Al content y, wherein y a second strain building layer which is an AlxGal-xN layer having a third average Al content x, wherein 0?x<y; a second strain preserving block comprising ?5 and ?50 units of a second sequence of layers, the sequence comprising an AlN layer and at least one AlGaN layer, and having a fourth average Al content w, wherein x<w<y, and a GaN layer, wherein the layers between the AlN nucleation layer and the GaN layer form an AlGaN buffer.

Abstract: Unknown particles on a surface of a semiconductor wafer are classified by applying a range of particles of known chemical composition and different sizes onto a test wafer, measuring the sizes of a plurality of the particles and spectrally analyzing a makeup of the particles by energy-dispersive x-ray spectroscopy, followed by ascertaining a substantive content therefrom; creating a best-fit curve to the size and substantive content of the particles; measuring the particle size of an unknown particle and recording its spectrum by energy-dispersive x-ray spectroscopy and classifying the unknown particle as the result of a comparison of the size and the substantive content of the unknown particle with the best-fit curve.

Abstract: Single crystal silicon cylindrical portions grown by the CZ method and highly doped with one or more n-type dopants so as to have a resistivity of not more than 2 m?cm are prepared by directing dopant in a gas flow from an external sublimation apparatus into the pulling chamber through or below the heat shield, to the bottom of an annular ring of the heat shield and from there through a plurality of nozzles toward the surface of the melt.

Abstract: Single crystals of semiconductor material are produced by an FZ method, wherein a molten zone is created between a feed rod and a growing single crystal; the method involving melting feed rod material in a high frequency magnetic field of a first induction coil; crystallizing material of the molten zone on top of the growing single crystal; rotating the growing single crystal about an axis of rotation and changing the direction of rotation and the speed of rotation according to a predetermined pattern; and imposing an alternating magnetic field of a second induction coil on the molten zone, wherein the alternating magnetic field is not axisymmetric with respect to the axis of rotation of the growing single crystal.

Abstract: A multiplicity of slices are simultaneously sliced from a workpiece during a slicing operation using a wire saw. A non-linear pitch function dTAR(WP) is selected dependent on a target thickness value function TTAR(WP), a pitch function dINI(WP) and a thickness value function TINI(WP), dTAR(WP) and adjacent grooves in the wire guide rollers are assigned a pitch at a position WP during the slicing operation, TINI(WP) slices which are obtained during a plurality of preceding slicing operations by means of the wire saw at the position WP are assigned a thickness value, dINI(WP), adjacent grooves in the wire guide rollers at the position WP are assigned a pitch during the preceding slicing operations, TTAR(WP) slices which are sliced off during the slicing operation at the position WP are assigned a target thickness value, WP denoting the axial position of the adjacent grooves with respect to the axes of the wire guide rollers.

Abstract: An apparatus for depositing a layer of semiconductor material on a substrate wafer. The apparatus includes a base ring between an upper and a lower dome, a susceptor as carrier of the substrate wafer during the deposition of the layer, a gas inlet and a gas outlet, an outgoing gas line and gas supply lines for passing process gas over an upper side face of the substrate wafer, a slit valve tunnel and a slit valve door, and a lifting and rotating unit for lifting and turning the susceptor and the substrate wafer. The apparatus also including an amorphous layer including silicon and hydrogen disposed over one or more stainless steel components of the apparatus.

Abstract: Contamination of semiconductor wafers during coating and other operations is mitigated by passing the wafer through a tunnel with a slit providing a gas curtain which impinges upon the wafer as the wafer is transported from one station to the next station in the processing apparatus.

Abstract: A vacuum gripper for semiconductor workpieces is produced from at least one base material by means of an additive manufacturing method such as 3D printing. The method may also include printing various other feature of the vacuum gripper such as reinforcing structures and or seals. The gripper may include a plurality of suction openings and corresponding channels for providing a negative pressure when cooperating with a vacuum.

Abstract: An epitaxial layer is deposited on a substrate wafer by a method including measuring an edge geometry of the wafer, placing the wafer at a position in a pocket of a susceptor of a device for depositing the layer based on the edge geometry, heating the wafer, and passing a process gas over the wafer. Thickness characteristic values are assigned to edge portions based on the edge geometry. The position in the pocket is determined as function of an expected change in the thickness characteristic value to an eccentricity E, which is determined by prior testing of the device. The function is a result of the shape of the pocket which has a boundary having a circular circumference. The distance from the wafer to the boundary of the pocket is less at thicker edge portions and greater at thinner edge portion so the layer has thicknesses inverse to the wafer thicknesses.

Abstract: A crystal piece of monocrystalline silicon suitable for the production of semiconductor wafers has a length of not less than 8 cm and not more than 50 cm and a diameter of not less than 280 mm and not greater than 320 mm, wherein the fraction of the semiconductor wafers produced therefrom that are free from pinholes having a size of not more than 30 ?m is greater than 98%.

Abstract: A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 5 × 1016 AT/cm3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200° C. and not more than 1260° C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150° C. and not more than 1190° C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160° C. and not more than 1190° C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.

Abstract: A semiconductor wafer of single-crystal silicon has an oxygen concentration per new ASTM of not less than 5.0×1017 atoms/cm3 and not more than 6.5×1017 atoms/cm3; a nitrogen concentration per new ASTM of not less than 1.0×1013 atoms/cm3 and not more than 1.0×1014 atoms/cm3; a front side having a silicon epitaxial layer wherein the semiconductor wafer has BMDs whose mean size is not more than 10 nm determined by transmission electron microscopy and whose mean density adjacent to the epitaxial layer is not less than 1.0×1011 cm?3, determined by reactive ion etching after having subjected the wafer covered with the epitaxial layer to a heat treatment at a temperature of 780° C. for a period of 3 h and to a heat treatment at a temperature of 600° C. for a period of 10 h.

Abstract: A method and an apparatus for depositing an epitaxial layer on a substrate wafer made of semiconductor material. The method comprises the arrangement of the substrate wafer and a susceptor in a deposition device such that the substrate wafer rests on the susceptor and the susceptor is held by arms of a support shaft; monitoring whether a misalignment of the susceptor exists with respect to its position relative to the position of a pre-heating ring surrounding it; monitoring whether a misalignment of the support shaft exists with respect to its position relative to the position of the pre-heating ring; if at least one of the misalignments is present, elimination of the respective misalignment; and the deposition of the epitaxial layer on the substrate wafer.

Abstract: The invention relates to an epitaxially coated semiconductor wafer, processed by a method in which the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing. The resulting wafer has exceptional geometry, as reflected by low ESFQR values.

Abstract: The invention relates to a method of processing a semiconductor in the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. The invention further relates to a control system for controlling a coating apparatus for processing a semiconductor water, to a plant for processing a semiconductor wafer having a coating apparatus which comprises the control system, and a semiconductor wafer. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing.

Abstract: A method produces a single-crystal silicon semiconductor wafer. A single-crystal silicon substrate wafer is double side polished. A front side of the substrate wafer is chemical mechanical polished (CMP). An epitaxial layer of single-crystal silicon is deposited on the front side of the substrate wafer. A first rapid thermal anneal (RTA) treatment is performed on the coated substrate wafer at 1275-1295° C. for 15-30 seconds in argon and oxygen, having oxygen of 0.5-2.0 vol %. The coated substrate wafer is then cooled at or below 800° C., with 100 vol % argon. A second RTA treatment is performed on the coated substrate wafer at a 1280-1300° C. for 20-35 seconds in argon. An oxide layer is removed from a front side of the coated substrate wafer. The front side of the coated substrate wafer is polished by CMP.

Abstract: A fused quartz crucible for pulling a single crystal of silicon by the Czochralski technique, has an inner side with an inner layer of fused quartz that forms a surface, the inner layer being provided with a crystallization promoter which on heating of the fused quartz crucible during use, in crystal pulling, causes crystallization of fused quartz to form b-cristobalite, wherein the concentration C of synthetically obtained SiO2 at a distance d from the surface is greater than the concentration of synthetically obtained SiO2 at a distance d2 from the surface, where d2 is greater than d. Multiple crystals can be grown while maintaining high crystal quality.