Abstract: A fused quartz crucible for pulling a single crystal of silicon by the Czochralski technique, has an inner side with an inner layer of fused quartz that forms a surface, the inner layer being provided with a crystallization promoter which on heating of the fused quartz crucible during use, in crystal pulling, causes crystallization of fused quartz to form b-cristobalite, wherein the concentration C of synthetically obtained SiO2 at a distance d from the surface is greater than the concentration of synthetically obtained SiO2 at a distance d2 from the surface, where d2 is greater than d. Multiple crystals can be grown while maintaining high crystal quality.

Abstract: Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×1017 atoms/cm3 and not more than 6.0×1017 atoms/cm3; a resistivity of the substrate wafer of not less than 5 m?cm and not more than 10 m?cm; and the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.

Abstract: An apparatus pulls a single crystal of semiconductor material by the Czochralski (CZ) method from a melt. The apparatus includes: a crucible that accommodates the melt; a resistance heater around the crucible; a camera system for observing a phase boundary between the melt and a growing single crystal, the camera system having an optical axis; a heat shield in frustoconical form with a narrowing diameter in a region at its lower end and arranged above the crucible and surrounding the growing single crystal; and an annular element, which is configured to capture particles, that projects inward from an inner side face of the heat shield and has an arrestor edge directed upward at an inner end of the annular element. The optical axis of the camera system runs between the arrestor edge and the growing single crystal. The annular element is releasably connected to the heat shield.

Abstract: A semiconductor wafer comprises a substrate wafer of monocrystalline silicon and a dopant-containing epitaxial layer of monocrystalline silicon atop the substrate wafer, wherein a non-uniformity of the thickness of the epitaxial layer is not more than 0.5% and a non-uniformity of the specific electrical resistance of the epitaxial layer is not more than 2%.

Abstract: A method deposits an epitaxial layer on a front side of a semiconductor wafer having monocrystalline material. The method includes: providing the semiconductor wafer; arranging the semiconductor wafer on a susceptor; heating the semiconductor wafer to a deposition temperature using thermal radiation directed to the front side and to the rear side of the semiconductor wafer; conducting a deposition gas over the front side of the semiconductor wafer; and selectively reducing an intensity of a portion of the thermal radiation that is directed to the rear side of the semiconductor wafer, as a result of which first partial regions at an edge of the semiconductor wafer, in the first partial regions a growth rate of the epitaxial layer is greater than in adjacent second partial regions given uniform temperature of the semiconductor wafer owing to an orientation of the monocrystalline material, are heated more weakly.

Abstract: Silicon single crystals having an oxygen concentration of greater than 2×1017 at/cm3, a concentration of pinholes having a diameter of greater than 100 ?m of less than 1.0×10?5 l/cm3, a carbon concentration of less than 5.5×1014 at/cm3, an iron concentration of less than 5.0×109 at/cm3, a COP concentration of fewer than 1000 defects/cm3, a LPIT concentration of fewer than 1 defect/cm2 and a crystal diameter of greater than 200 mm, are produced by the Czochralski method employing a purge gas at specified pressures and flow rates.

Abstract: A semiconductor wafer of monocrystalline silicon. The semiconductor wafer having: a substrate wafer of monocrystalline silicon; and a layer of monocrystalline silicon that lies on a front side of the substrate wafer. The substrate wafer has a crystal orientation. An averaged front side-based ZDD of the semiconductor wafer, with a division of a surface of an epitaxial layer into 16 sectors and an edge exclusion of 1 mm, is not less than ?30 nm/mm2 and not more than 0 nm/mm2. An ESFQRmax of the semiconductor wafer, with an edge exclusion of 1 mm and 72 sectors each with a length of 30 mm, is at most 10 nm.

Abstract: Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×1017 atoms/cm3 and not more than 6.0×1017 atoms/cm3; a resistivity of the substrate wafer of not less than 5 m?cm and not more than 10 m?cm; and the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.

Abstract: Variations in wafer thickness due to non-uniform CVD depositions at angular positions corresponding to crystallographic orientation of the wafer are reduced by providing a ring below the susceptor having inward projections at azimuthal positions which reduce radiant heat impinging upon the wafer at positions of increased deposition.

Abstract: An installation useful for economically polishing wafers has at least two polishing machines for simultaneous double-sided polishing of semiconductor wafers; one or more carriers lying on a polishing pad of a polishing machine for receiving semiconductor wafers; an overhead-mounted transport system for delivering a cassette containing semiconductor wafers; a vertical transport system for taking cassettes from the transport system, containing comprising an integrated wafer lifter; an autonomous robot having a manipulator for taking a semiconductor wafer from the wafer lifter and for inserting the semiconductor wafer into one of the recesses, and after polishing, for lifting the semiconductor wafer from the recess; an x/y linear unit assigned to each polishing machine, having a wafer gripper for taking a wafer from the manipulator and for depositing the wafer into a wet transport container with integrated wafer receiver; and a driverless transport vehicle for transporting transport container to a cleaning

Abstract: Single silicon crystals having a resistivity of ?20 m?cm are pulled by the Czochralski process from a melt, by a method of pulling a first section of a neck at a first velocity whereby the diameter of a first section of the neck, with respect to the diameter of a seed crystal, tapers at a rate of ?0.3 mm per mm neck length to a diameter of not more than 5 mm; pulling a second section of the neck at a pulling velocity of <0.2 mm/min for not less than 3 min, without the diameter increasing to more than 5.5 mm; and pulling a third section of the neck at a third pulling velocity of >2 mm/min.

Abstract: Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×1017 atoms/cm3 and not more than 6.0×1017 atoms/cm3; a resistivity of the substrate wafer of not less than 5 m?cm and not more than 10 m?cm; and the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.

Abstract: Wafer shape parameters from prior runs of simultaneously slicing a plurality of wafers from a workpiece in a wire saw having a sawing wire tensioned between wire guide rolls are used to alter the temperature profile of fixed and a moveable bearings at the ends of at least one wire guide roll, resulting in wafers with low waviness.

Abstract: Suitability of silicon wafers for use in device processing without generation of fatal defects is assessed by using SIRD to measure stress in a wafer cut from a piece of a crystal ingot after first and second thermal treatments of the water, the second thermal treatment consisting of a heating phase, a holding phase, and a cooling phase. The result is used to consider whether silicon wafers cut from the piece can adequately survive device processing without generating excess defects.

Abstract: Single crystal silicon with <100> orientation is doped with n-type dopant and comprises a starting cone, a cylindrical portion and an end cone, a crystal angle being not less than 20° and not greater than 30° in a middle portion of the starting cone, the length of which is not less than 50% of a length of the starting cone, and edge facets extending from a periphery of the single crystal into the single crystal, the edge facets in the starting cone and in the cylindrical portion of the single crystal in each case having a length which is not more than 700 ?m.

Abstract: A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.

Abstract: A device for handling a semiconductor wafer in an epitaxy reactor has a susceptor; longitudinal holes extending through the susceptor; a wafer lifting shaft; wafer lifting pins guided through the longitudinal holes; a susceptor carrying shaft; susceptor carrying arms; susceptor support pins; guide sleeves anchored in the susceptor carrying arms; and guide elements protruding from the guide sleeves which, at upper ends, have bores into which wafer lifting pins are inserted, and which can be raised and lowered together with the wafer lifting pins by the wafer lifting shaft.

Abstract: A semiconductor wafer made of single-crystal silicon has an oxygen concentration (new ASTM) of not less than 4.9×1017 atoms/cm3 and not more than 6.5×107 atoms/cm3 and a nitrogen concentration (new ASTM) of not less than 8×1012 atoms/cm3 and not more than 5×1013 atoms/cm3, wherein a frontside of the semiconductor wafer is covered with an epitaxial layer made of silicon, wherein the semiconductor wafer comprises BMDs of octahedral shape whose mean size is 13 to 35 nm, and whose mean density is not less than 3×108 cm?3 and not more than 4×109 cm?3, as determined by IR tomography.

Abstract: Semiconductor wafers are polished simultaneously on both the front and the rear sides between an upper polishing plate and a lower polishing plate, each covered with a polishing pad, wherein a polishing gap (x1+x2) corresponding to a difference in the respective distances between facing surfaces of upper polishing pad and lower polishing pad which come into contact with the semiconductor wafer at the inner edge and at the outer edge of the polishing pads is changed incrementally or continuously during the polishing process.

Abstract: Semiconductor wafers are produced from a workpiece by means of a wire saw, by feeding the workpiece through an arrangement of wires tensioned between wire guide rollers and divided into wire groups, the wires moving in a running direction producing kerfs as wires engage the workpiece. For each of the wire groups, a placement error of the kerfs of the wire groups determined, and for each of the wire groups compensating movements of the wires of the wire group are induced as a function of the placement error, in a direction perpendicular to the running direction of the wires during feeding of the workpiece through the arrangement of wires, by activating at least one drive element.