Abstract: A multiplicity of wafers are simultaneously cut from an ingot by means of a structured sawing wire, wherein the structured sawing wire is guided through grooves of two wire guide rolls, and a bottom of each groove, on which the structured wire hears, has a curved groove bottom with a radius of curvature which, for each groove, is equal to or up to 1.5 times as large as the radius of the envelope of the structured wire which the structured wire has in the respective groove.

Abstract: FZ single crystals are pulled by melting a polycrystal with electromagnetic melting apparatus and then recrystallizing. First, a lower end of the polycrystal is melted; second, a monocrystalline seed is attached to the lower end of the polycrystal and melted beginning from an upper end thereof; third, between a lower section of the seed and the polycrystal, a thin neck is formed whose diameter (dD) is smaller than that (dI) of the seed; and fourth, between the thin neck section and the polycrystal, a conical section is formed. Before the conical growth, a switchover position (h?) of the polycrystal, the position at which the rate of polycrystal movement relative to the melting apparatus is to be reduced is determined, and the rate is reduced, in amount when the switchover position (h?) is reached.

Abstract: Epitaxial wafers with a high concentration of BMD nuclei or developed BMDs just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short RTA treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.

Abstract: Single crystal semiconductor ingots are pulled from a melt contained in a crucible by a method of controlling the pulling the single crystal in a phase in which an initial cone of the single crystal is grown until a phase in which the pulling of a cylindrical section of the single crystal is begun, by measuring the diameter Dcr of the initial cone of the single crystal and calculating the change in the diameter dDcr/dt; pulling the initial cone of the single crystal from the melt at a pulling rate vp(t) from a point in time t1 until a point in time t2, starting from which the pulling of the cylindrical section of the single crystal in conjunction with a target diameter Dcrs is begun, wherein the profile of the pulling rate vp(t) from the point in time t1 until the point in time t2 during the pulling of the initial cone is predetermined by means of an iterative computation process.

Abstract: A device for handling a semiconductor wafer in an epitaxy reactor has a susceptor; longitudinal holes extending through the susceptor; a wafer lifting shaft; wafer lifting pins guided through the longitudinal holes; a susceptor carrying shaft; susceptor carrying arms; susceptor support pins; guide sleeves anchored in the susceptor carrying arms; and guide elements protruding from the guide sleeves which, at upper ends, have bores into which wafer lifting pins are inserted, and which can be raised and lowered together with the wafer lifting pins by the wafer lifting shaft.

Abstract: Single crystal semiconductor wafers comprise oxygen and an n-type dopant, and are produced by a process comprising providing a silicon melt containing n-type dopant in a quartz crucible, the melt having an initial height hM; heating the melt from the side by selectively supplying heat to an upper volume of the melt having an initial height hm, wherein hm is smaller than hM; pulling a single crystal of silicon from the melt by the CZ method with a pulling velocity V; heating the melt from above in the region of a phase boundary between the growing single crystal and the melt; heating the melt from above in the region of a surface of the melt; subjecting the melt to a magnetic field; counterdoping the melt with p-type dopant; and separating the semiconductor wafer of single-crystal silicon from the single crystal. An apparatus for accomplishing the process is also disclosed.

Abstract: Problems associated with the mismatch between a silicon substrate and a group-IIIA nitride layer are addressed by employing a silicon substrate processed to have a surface comprising closely spaced tips extending from the surface, depositing a group-IIIB silicide layer on the tips, then depositing a group-IIIB nitride layer, and then depositing a group-IIIA nitride.

Abstract: A susceptor for holding a semiconductor wafer during the deposition of an epitaxial layer on a front side of the semiconductor wafer, has a susceptor ring and a susceptor base, and recesses below the susceptor ring in the susceptor base which are arranged in a manner distributed rotationally symmetrically. Wafers having an epitaxial layer produced using the susceptor have a high local flatness in the edge region.

Abstract: A method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber, involves removing native oxide from a surface of the wafer; and then depositing an epitaxial layer with a thickness of at least 40 ?m on the surface of the wafer by introducing a silicon containing gas and a carrier gas into the process chamber, wherein the flow rate of the silicon containing gas is lower than 10 standard liters per minute and the flow rate of the carrier gas is at least 40 standard liters per minute.

Abstract: A wire guide roll for use in wire saws for simultaneously slicing a multiplicity of wafers from a cylindrical workpiece is provided with a coating having a thickness of at least 2 mm and at most 7.5 mm of a material which has a Shore A hardness of at least 60 and at most 99, and which contains a multiplicity of grooves through which the sawing wire is guided, the grooves each having a curved groove base with a radius of curvature which is 0.25-1.6 times the sawing wire diameter, and an aperture angle of 60-130°. A multiplicity of wafers are simultaneously sliced from a cylindrical workpiece by a wire saw using such wire guide rolls.

Abstract: An apparatus for depositing a material layer originating from process gas on a substrate wafer, contains: a reactor chamber delimited by an upper dome, a lower dome, and a side wall; a susceptor for holding the substrate wafer during the deposition of the material layer; a preheating ring surrounding the susceptor; a liner, on which the preheating ring is supported in a centered position wherein a gap having a uniform width is present between the preheating ring and the susceptor; and a spacer acting between the liner and the preheating ring, the spacer keeping the preheating ring in the centered position and providing a distance ? between the preheating ring and the liner.

Abstract: The surface layer of a semiconductor wafer lying on a rotatable plate within an etching chamber is etched by a process whereby homogeneous etching of the surface is obtained by introducing an etching gas into the etching chamber in such a way that the flow of the etching gas is not directed directly to the wafer but is allowed first to distribute within the etching chamber before coming into contact with the surface of the semiconductor wafer to be etched.

Abstract: A layered semiconductor substrate has a monocrystalline first layer based on silicon, having a first thickness and a first lattice constant a1 determined by a first dopant element and a first dopant concentration, and in direct contact therewith, a monocrystalline second layer based on silicon, having a second thickness and a second lattice constant a2, determined by a second dopant element and a second dopant concentration, and a monocrystalline third layer comprising a group III nitride, the second layer located between the first layer and the third layer, wherein a2>a1, wherein the crystal lattice of the first layer and the second layer are lattice-matched, and wherein the bow of the layered semiconductor substrate is in the range from ?50 ?m to 50 ?m.

Abstract: A method for polishing at least one wafer composed of semiconductor material that has a front side and the rear side includes performing at least one first polishing step including simultaneously polishing both front and rear sides of the at least one wafer at a process temperature between an upper polishing plate and a lower polishing plate. Each of the upper polishing and lower polishing plates is covered with a polishing pad having an inner edge and an outer edge, a hardness of at least 80° Shore A, a compressibility of less than 2.5%, and respective upper and lower surfaces that come into contact with the wafer being polished. The upper and lower surfaces form a polishing gap extending from the inner edge to the outer edge. A height of the polishing gap at the inner edge differs linearly from the height of the polishing gap at the outer edge.

Abstract: FZ silicon which shows no degradation of its minority carrier lifetime after any processing steps at a processing temperature of less than 900° C. is prepared by annealing FZ silicon at an annealing temperature of greater than or equal to 900° C. and processing the annealed FZ silicon at a processing temperature of less than 900° C.

Abstract: A semiconductor wafer comprising single-crystal silicon has defined concentrations of oxygen, nitrogen and hydrogen; the semiconductor wafer further comprises: BMD seeds having a density averaged over the radius of not less than 1×105 cm?3 and not more than 1×107 cm?3; surface defects having a density averaged over the radius of not less than 1100 cm?2; and BMDs, whose density is not lower than a lower limit of 5×108/cm3. The semiconductor wafers are produced by a process which enables obtention of the required ranges of concentrations of oxygen, nitrogen, hydrogen, BMD seeds, and BMD's.

Abstract: The diameter (dK) of a cylindrical section and of an end cone of a single crystal being pulled from a melt in a crucible, is determined by measuring the diameter (dK) of the single crystal at an interface with the melt while taking into account a lowering rate (vS) of a surface of the melt relative to the crucible, a lifting rate (vK) with which the crystal is raised relative to the crucible, and a conservation of mass, wherein a diameter of a cylindrical section of the single crystal, determined by means of observing a bright ring on the surface of the melt, and is used for a correction, a plausibility check or a comparison of the diameter (dK) of the single crystal.

Abstract: Semiconductor wafers are coated with an epitaxially deposited layer in an epitaxy reactor, wherein at least one semiconductor wafer is arranged on a respective susceptor in the epitaxy reactor and a first deposition gas for coating the at least one semiconductor wafer is conducted through the epitaxy reactor, wherein an etching process in which a first etching gas and a carrier gas are conducted through the epitaxy reactor is carried out before the coating process, and wherein a cleaning process in which a second etching gas and subsequently in particular a second deposition gas are conducted through the epitaxy reactor after a predefinable number of coating processes, wherein for two or more etching processes preceding the respective coating process at least one variable which influences the etching process is set individually. Semiconductor wafers processed thereby have distinctly uniform topology.

Abstract: A monocrystalline semiconductor wafers have an average roughness Ra of at most 0.8 nm at a limiting wavelength of 250 ?m, and an ESFQRavg of 8 nm or less given an edge exclusion of 1 mm. The wafers are advantageously produced by a method comprising the following steps in the indicated order: simultaneous double-side polishing of the semiconductor wafer, b) local material-removing processing of at least one part of at least one side of the semiconductor wafer using a fluid jet which contains suspended hard substance particles and which is directed onto a small region of the surface with the aid of a nozzle, wherein the nozzle is moved over that part of the surface which is to be treated in such a way that a predefined geometry parameter of the semiconductor wafer is improved, and c) polishing of the at least one surface of the semiconductor wafer.

Abstract: A cleaning method for cleaning an object involves disposing the object in a cleaning liquid held in a cleaning tank; and ultrasonically vibrating the cleaning liquid via an intermediate medium in contact with the cleaning tank, wherein the ultrasonically vibrating includes: ultrasonically vibrating the cleaning liquid with a first difference between respective sonic velocities allowable in the cleaning liquid and the intermediate medium; and ultrasonically vibrating the cleaning liquid with a second difference between the respective sonic velocities allowable in the cleaning liquid and the intermediate medium, wherein the second difference is different from the first difference.