Patents Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION
  • Patent number: 11961783
    Abstract: To provide a semiconductor apparatus that makes it possible to further improve the efficiency in heat dissipation, and to provide an electronic apparatus that includes the semiconductor apparatus. A semiconductor apparatus is provided that includes a substrate, a plurality of chips each stacked on the substrate, and a plurality of guard rings each formed on an outer peripheral portion of a corresponding one of the plurality of chips to surround the corresponding one of the plurality of chips, in which at least portions of at least two of the plurality of guard rings are connected to each other through a thermally conductive material. Further, an electric apparatus is provided that includes the semiconductor apparatus.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hitoshi Okano
  • Patent number: 11961869
    Abstract: To reduce the influence of generation of after-pulses when a pixel including a SPAD is used. In a SPAD pixel, a PN junction part of a P+ type semiconductor layer and an N+ type semiconductor layer is formed, a P type semiconductor layer having a concentration higher than the concentration of a silicon substrate is formed in a region deeper than the PN junction part and close to a light absorption layer. With no quenching operation generating no after-pulse, electrons generated in the light absorption layer are guided to the PN junction part and subjected to avalanche amplification. When the quenching operation is performed after avalanche amplification, the electrons are guided to the N+ type semiconductor layer by a potential barrier to prevent avalanche amplification. The present disclosure is applicable to an image sensor including a SPAD.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Takahiro Miura
  • Patent number: 11961858
    Abstract: A ripple is suppressed in a solid-state imaging element that obtains a spectral spectrum. The solid-state imaging element includes a surface layer, a filter layer, and a photoelectric conversion layer. In the solid-state imaging element, the surface layer has a thickness exceeding a half of a coherence length of incident light. Furthermore, in the solid-state imaging element, the filter layer transmits predetermined target light of the incident light transmitted through the surface layer and reflects a rest of the incident light transmitted through the surface layer to the surface layer. Furthermore, in the solid-state imaging element, the photoelectric conversion layer photoelectrically converts the predetermined target light transmitted through the filter layer.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Atsushi Toda
  • Patent number: 11961857
    Abstract: The present technology relates to an imaging element, an imaging device, and a manufacturing apparatus and a method that facilitate electric charge transfer. An imaging element of the present technology includes a vertical transistor that has a potential with a gradient in at least part of a charge transfer channel that transfers electric charge of a photoelectric conversion unit. Also, an imaging device of the present technology includes: an imaging element including a vertical transistor that has a potential with a gradient in at least part of a charge transfer channel that transfers electric charge of a photoelectric conversion unit; and an image processing unit that performs image processing on captured image data obtained by the imaging element.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Shinpei Fukuoka
  • Patent number: 11962123
    Abstract: In a semiconductor laser drive device, a wiring inductance in electrically connecting a semiconductor laser and a laser driver is reduced. The semiconductor laser drive device includes a substrate, the laser driver, and the semiconductor laser. The laser driver is built in the substrate. The semiconductor laser is mounted on one surface of the substrate of the semiconductor laser drive device. Connection wiring electrically connects the laser driver and the semiconductor laser by a wiring inductance of 0.5 nanohenries or less.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hirohisa Yasukawa
  • Patent number: 11959999
    Abstract: There is provided an information processing device that processes detection information of an external recognition sensor. The information processing device includes: a recognition unit that performs recognition processing on an object on the basis of a detection signal of the sensor; and a processing unit that performs fusion processing on first data before the recognition by the recognition unit and another data. The information processing device further includes a second recognition unit that performs recognition processing on the object on the basis of a detection signal of a second sensor. The processing unit performs fusion processing on third data before the recognition by the second recognition unit and the first data, fusion processing on fourth data after the recognition by the second recognition unit and the first data, and the like.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Shinji Igarashi
  • Patent number: 11960434
    Abstract: A communication device includes: a communication unit that adds, to a set of data blocks including a serial signal group conforming to SPI transmitted from a master in synchronization with a clock, identification information for identifying the data blocks, and transmits the data blocks to a communication partner device within one frame period of a predetermined communication protocol, or adds, to data blocks each including a part of the serial signal group, identification information for identifying each of the data blocks, and transmits the data blocks to the communication partner device in a plurality of frame periods; and a storage unit that sequentially stores a predetermined number of data blocks transmitted from the master and outputs a data block transmitted from the communication partner device in response to the predetermined number of data blocks from the master and stored, to transmit the data block to the master.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshihisa Hyakudai, Junya Yamada, Satoshi Ota
  • Patent number: 11960139
    Abstract: The present technology relates to a camera module that is enabled to have a lower height. The camera module includes a supporting component that includes an opening through which light from a lens collecting the light passes, the supporting component supporting an optical component between the lens and an imaging element that performs photoelectric conversion of the light, the optical component being placed so as to cover the opening and being supported on a side of the supporting component closer to the imaging element. In addition, around the opening, there is disposed a sloped portion inclined in the thickness direction of the supporting component, and the supporting component is placed such that the slope of the sloped portion and the lens face each other.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Eiichiro Dobashi
  • Patent number: 11962916
    Abstract: An imaging device includes a pixel array part having a plurality of pixels that perform photoelectric conversion, a converter that converts an analog pixel signal output from the pixel array part into digital pixel data, a first signal processing unit that performs first signal processing on the digital pixel data, a second signal processing unit that performs second signal processing that is at least partly shared by the first signal processing on the digital pixel data or data that has been subjected to at least a part of the first signal processing, a recognition processing unit that performs predetermined recognition processing on the basis of output data of the second signal processing unit, and an output interface unit that outputs at least one of output data of the first signal processing unit and the output data of the recognition processing unit.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hitoshi Kai, Hiroyuki Ozawa, Satoshi Yamada
  • Patent number: 11962920
    Abstract: An imaging device of the present disclosure includes: a pixel array section in which pixels including light receiving elements are arranged; a first pixel control section that performs control to read out signals of all the pixels in the pixel array section at a first frame rate; a second pixel control section that performs control to read out signals of the pixels in a specific region in the pixel array section at a second frame rate higher than the first frame rate; and an analog-to-digital conversion section that performs an analog-to-digital conversion on a pixel signal read out by the control performed by the first pixel control section or the second pixel control section.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kazuhiko Muraoka
  • Patent number: 11961862
    Abstract: A solid-state imaging element of an embodiment of the present disclosure includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel transistor provided on one surface of the semiconductor substrate; and an element separation section provided in the semiconductor substrate and including a first element separation section and a second element separation section that have mutually different configurations, the element separation section defining an active region of the pixel transistor, in which the second element separation section has, on a side surface, a first semiconductor region and a second semiconductor region that have mutually different impurity concentrations in a depth direction of the second element separation section.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsushi Masagaki
  • Patent number: 11958358
    Abstract: Configuration, in which images output to a display unit are switched and displayed in accordance with the behavior of a driver, such as movements of the head of the driver, is achieved. Driver information indicating the behavior of the driver of a moving apparatus and images captured by a plurality of cameras that images a situation around the moving apparatus from different viewpoints are input. The images output to the display unit are switched in accordance with the driver information. The plurality of cameras is, for example, a plurality of rear cameras installed in the rear of the moving apparatus. For example, a direction of the face or line-of-sight of the driver is detected. An image in a direction corresponding to the detected direction of the face or line-of-sight of the driver is selected as an output image, and displayed on the display unit. Alternatively, an image in a direction indicated by a gesture of the driver is selected, and displayed on the display unit.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Eiji Oba, Mitsuharu Ohki, Shigeyuki Baba, Yoshikuni Nomura
  • Patent number: 11962927
    Abstract: A solid-state image sensor includes: an input transistor configured to output, from a drain, a drain voltage according to an input voltage input to a source in a case where the input voltage substantially coincides with a predetermined reference voltage input to a gate; and an output transistor configured to output a signal indicating whether or not a difference between the input voltage input to a source and the drain voltage input to a gate exceeds a predetermined threshold voltage as a comparison result between the input voltage and the reference voltage.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Takashi Moue, Yosuke Ueno
  • Patent number: 11962124
    Abstract: A detection circuit (20) according to the present disclosure includes a multiple-input one-output operational amplifier (30). The operational amplifier (30) includes a first transistor group (31) and a second transistor (32). The first transistor group (31) includes plural transistors connected in parallel such that operating voltages for plural light emitting elements (5) are inputted individually to gates of the plural transistors, the gates being non-negated input terminals of the operational amplifier. The second transistor (32) cooperates with the first transistor group (31) to form a differential configuration and has a gate which is a negated input terminal of the operational amplifier and to which an output from an output terminal is negatively fed back.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Takeshi Yuwaki, Mitsushi Tabata
  • Patent number: 11962329
    Abstract: The technology relates to an encoding device, an encoding method, a decoding device, a decoding method, and a program enabling encoding with favorable transmission efficiency with a controlled running disparity. A calculation section divides inputted data into N or M bits to calculate a first running disparity of an N or M bit data string. A determination section determines whether the data string is inverted based on the first running disparity calculated by the calculation section and a second running disparity calculated therebefore. An addition section inverts or non-inverts the data string based on a determination result by the determination section to add a flag indicating the determination result for outputting. The determination section determines not to perform inversion when the data string is a control code. The addition section adds the flag assigned to the control code. The technology is applicable to a device communicating in an SLVS-EC specification.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tatsuya Sugioka, Toshihisa Hyakudai, Masayuki Unuma, Daisuke Okazawa, Aritoshi Kimura, Hiroshi Shiroshita
  • Patent number: 11961885
    Abstract: A semiconductor device includes a base, a first FET that includes at least two channel structure portions laminated, the channel structure portions each including a channel portion having a nanowire structure, a gate insulation film, and a gate electrode, and a second FET that includes a channel forming layer, a gate insulation layer, and a gate electrode. The first FET and the second FET are provided above the base. The channel portions of the first FET are disposed apart from each other in a laminating direction of the channel structure portions. Assuming that each of a distance between the channel portions of the first FET is a distance L1 and that a thickness of the gate insulation layer of the second FET is a thickness T2, T2?(L1/2) is satisfied.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: April 16, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tetsuo Gocho, Yuzo Fukuzaki, Shinichi Miyake, Kazuyuki Tomida
  • Patent number: 11961932
    Abstract: A photodetector comprising: a separation region that is provided in a semiconductor substrate and defines a pixel region; a hole accumulation region that is provided in the semiconductor substrate of the pixel region along a side surface of the separation region; a multiplication region that is provided in the semiconductor substrate of the pixel region and is configured by joining a first conductivity type region and a second conductivity type region from the surface side of the semiconductor substrate in the thickness direction of the semiconductor substrate; and an insulating region provided in the semiconductor substrate in a region between the multiplication region and the hole accumulation region, wherein a formation depth of the insulating region is larger than a formation depth of the first conductivity type region.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenji Kurata, Yusuke Otake, Yuji Isogai
  • Publication number: 20240120359
    Abstract: The present disclosure relates to a photodetection device and an electronic apparatus that allow for reducing surface reflection from an on-chip microlens and suppressing deterioration of image quality. Provided is a photodetection device including: a plurality of pixels that have photoelectric conversion units; on-chip microlenses that are formed in such a way as to correspond to the individual pixels; and an antireflection film that is formed on a surface of the on-chip microlens, in which the antireflection film is constituted by a stacking of: a first inorganic film that is formed by a metal oxide film; and a second inorganic film that is formed on a surface of the first inorganic film and has a lower refractive index than the first inorganic film. The present disclosure can be applied to, for example, a CMOS solid-state imaging device.
    Type: Application
    Filed: February 21, 2022
    Publication date: April 11, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke MORIYA, Atsushi YAMAMOTO, Tomiyuki YUKAWA, Kotaro NISHIMURA, Shigehiro IKEHARA, Shogo OTANI, Hiroshi KATO
  • Publication number: 20240121532
    Abstract: To provide an imaging apparatus which enables sophisticated calculations to be realized at lower power. An imaging apparatus according to an embodiment of the present disclosure includes: a first substrate group in which is arranged a light source cell array portion configured to generate a light signal; and a second substrate group in which is arranged a pixel array portion configured to photoelectrically convert the light signal and output a pixel signal representing a result of a sum-of-product computation. The first substrate group and the second substrate group are stacked so that at least a part of the light source cell array portion overlaps with the pixel array portion.
    Type: Application
    Filed: February 22, 2022
    Publication date: April 11, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Daisuke SAITO
  • Patent number: 11955494
    Abstract: An imaging device includes a first pixel including a first photoelectric conversion region and a first amplification transistor, a second pixel adjacent the first pixel and including a second photoelectric conversion region and a second amplification transistor, and a first contact coupled to the first amplification transistor and the second amplification transistor, and that receives a power supply signal for the first amplification transistor and the second amplification transistor.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 9, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Adarsh Basavalingappa, Taisuke Suwa, Michiel Timmermans, Frederick Brady, Jeongsoo Han