Abstract: In accordance with the objectives of the invention a new method and apparatus is provide for assuring contact balls coplanarity. The process and apparatus for coplanarity inspection is integrated with the current processing step of BGA device singulation and pick-and-place, thereby eliminating the need for a separate processing step that is typically required for the coplanarity inspection.

Abstract: A new method is provided for the establishment of a low resistivity connection between a wire bonded IC chip that is mounted on a heatsink and the heatsink of the package. A copper trace connection is allocated for this purpose on the surface of the substrate layer to which the IC chip is connected. An opening is provided in the substrate layer of the package, this opening aligns with the copper trace that has been allocated for establishing a ground connection and penetrates the substrate layer down to the surface of the underlying heatsink. The opening is filled with a conductive epoxy or an equivalent low-resistivity material thereby establishing a direct electrical connection or short between the allocated copper trace and the underlying heatsink. By connecting the ground point of the IC chip to the allocated copper trace, a direct electrical low resistivity connection is made between the ground point of the IC chip and the heatsink into which the IC chip is mounted.

Abstract: In a first embodiment of the invention, a copper foil is attached to a substrate, in the second embodiment of the invention a adhesive film is attached to a substrate. Processing then continues by attaching the die to the copper foil/adhesive film. After this the processing continues identically for the two embodiments of the invention, interrupted by, for the second embodiment of the invention, detaching the film and replacing the film with a copper foil.

Abstract: A method and apparatus for handling small semiconductor devices in the testing of these devices. Multiple devices are mounted within a device strip carrier and are positioned in the testing position. This positioning of the device strip carriers is performed using device strip carrier alignment tools; the device strip carrier can readily be repositioned with respect to the test head/probe card for testing of multiple devices contained within the device strip carrier.

Abstract: A new method and package is provided for face-up packaging of semiconductor devices. The semiconductor device is mounted over the surface of a semiconductor device support surface using conventional methods of device packaging up through device bond wire interconnect to electrical traces on the surface of the semiconductor device support surface over which the device is mounted. An internal mold cap is formed over the device, the internal mold cap has an opening exposing the surface of the device. An external mold cap is formed surrounding the internal mold cap with a cavity separating the external mold cap from the internal mold cap. Thermally conductive epoxy is deposited in the opening of the internal mold cap and in the cavity between the internal and the external mold cap. The heat spreader is placed and attached after which a thermal epoxy and mold cure is applied to the package.

Abstract: A new ground pin is provided for the testing of BGA devices. This ground pin can be provided in a area of the BGA package that does not interfere with critical regions of the surface of the BGA package. The method and apparatus of the invention are not limited to providing one ground pin but can be extended to use a multiplicity of ground pins.

Abstract: Leaded semiconductor packages and a method (80) of trimming and singulating such packages are described. The method (80) uses a panel (10) with lead frames (22) arrayed in a plurality of frame strips (24) for mounting a plurality of semiconductor dies (36). The panel (10) has a peripheral frame (26), a plurality of dam bars (28) disposed within the peripheral frame (26), a plurality of leads (30) extending transversely from portions of the plurality of dam bars (28) and a plurality of support bars (32) extending transversely from other portions of the plurality of dam bars (28). Primary tie bars (34) are formed at opposite ends of each of the plurality of frame strips (24). Slots (44) are disposed between lateral sides of the peripheral frame (26) and the plurality of frame strips (24).

Abstract: Leaded semiconductor packages and a method (80) of trimming and singulating such packages are described. The method (80) uses a panel (10) with lead frames (22) arrayed in a plurality of frame strips (24) for mounting a plurality of semiconductor dies (36). The panel (10) has a peripheral frame (26), a plurality of dam bars (28) disposed within the peripheral frame (26), a plurality of leads (30) extending transversely from portions of the plurality of dam bars (28) and a plurality of support bars (32) extending transversely from other portions of the plurality of dam bars (28). Primary tie bars (34) are formed at opposite ends of each of the plurality of frame strips (24). Slots (44) are disposed between lateral sides of the peripheral frame (26) and the plurality of frame strips (24).

Abstract: A new method is provided for the conduction of heat between a flip-chip and the motherboard and heatsink onto which the flip-chip is mounted. In a flip-chip package of the invention the heatsink is in direct contact with the flex circuit, the contact balls of the flip chip make contact with the flex circuit. The flip-chip is attached and reflow is performed thereby attaching the contact balls to the flex circuit. The flip chip is encased in a molding compound in a one step process procedure that is in accordance with assigned to a common assignee. The flip-chip is now placed on the motherboard with the contact balls and the underfill facing upwards. The underfill provides direct contact between the flip-chip and the flex circuit/heatsink. This direct contact significantly increases the heat flow between the flip-chip and the heatsink.

Abstract: A new method is provided to clean melamine deposits from tools and components that are used to form molds around and to therewith encapsulate BGA devices. The cleaning process applies a dummy BGA substrate as part of and during the cleaning procedure. This dummy BGA substrate replaces the conventionally used copper strips that shield areas of the molding tools during the cleaning cycle. The dummy copper strips require, during and as part of the melamine cleaning process, frequent cleaning, which adds considerable to the time and expense of the melamine cleaning process.

Abstract: An embodiment of the invention in a quad flat no-lead package is described. The package is produced by encapsulating an integrated circuit chip, a die pad to which the chip is affixed, and leads which are connected to the chip in a molding compound. Leads are positioned on all four sides of the package, the exposed (bottom) portions of the leads are coplanar with the bottom of the package, and the leads do not extend, or extend only slightly, beyond the area of the package. The package includes a die pad also having an exposed (bottom) portion that is coplanar with the bottom of the package. The top portions of the leads are coplanar with the top surface of the die pad, and are flat.