Patents Assigned to Sumco Corporation
  • Publication number: 20240025008
    Abstract: A method of polishing a silicon wafer, including a final polishing step including a pre-stage polishing step and a subsequent finish polishing step. The finish polishing step in the final polishing step includes a finish slurry polishing step using a polishing solution having an abrasive grain density of 1×1013/cm3 or more as the second polishing solution; and a pre-polishing step using a polishing solution having an abrasive grain density of 1×1010/cm3 or less as the second polishing solution, the pre-polishing step being performed prior to the finish slurry polishing step. A method of producing a silicon wafer, including the steps of: forming a notch portion on a periphery of a single crystal silicon ingot grown by the Czochralski process; slicing the ingot to obtain a silicon wafer; and subjecting the resulting silicon wafer to the above method of polishing a silicon wafer.
    Type: Application
    Filed: August 25, 2021
    Publication date: January 25, 2024
    Applicant: SUMCO CORPORATION
    Inventors: Masahiro MURAKAMI, Ryoya TERAKAWA
  • Publication number: 20240026564
    Abstract: A production method of monocrystalline silicon includes: growing the monocrystalline silicon having a straight-body diameter in a range from 301 mm to 330 mm that is pulled up through a Czochralski process from a silicon melt including a dopant in a form of arsenic; controlling a resistivity of the monocrystalline silicon at the straight-body start point to fall within a range from 2.50 m?cm to 2.90 m?cm; and subsequently sequentially decreasing the resistivity of the monocrystalline silicon to fall within a range from 1.6 m?cm to 2.0 m?cm at a part of the monocrystalline silicon.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Applicant: SUMCO CORPORATION
    Inventors: Yasufumi KAWAKAMI, Koichi MAEGAWA
  • Publication number: 20240019397
    Abstract: To provide a method of estimating an oxygen concentration in a silicon single crystal, a method of manufacturing a silicon single crystal, and a silicon single crystal manufacturing apparatus capable of manufacturing silicon single crystals having constant quality by preventing polarization of the oxygen concentration in the silicon single crystal. A method of estimating an oxygen concentration in a silicon single crystal according to the present invention is provided with measuring a height (gap) of a melt surface of a silicon melt in a quartz crucible when pulling up a silicon single crystal while applying a lateral magnetic field to the silicon melt and estimating an oxygen concentration in the silicon single crystal from a minute variation in the height of the melt surface.
    Type: Application
    Filed: December 6, 2021
    Publication date: January 18, 2024
    Applicant: SUMCO Corporation
    Inventors: Ippei SHIMOZAKI, Keiichi TAKANASHI
  • Patent number: 11873577
    Abstract: For correction of a source gas supply time and a dopant gas flow rate, a calculation unit in an epitaxial wafer production system performs not only correction based on a result of comparing measured thickness and resistivity of an epitaxial film respectively with a target thickness range and a target resistivity range, but also correction based on a variation in total output value of upper and lower lamps.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: January 16, 2024
    Assignee: SUMCO CORPORATION
    Inventor: Naoyuki Wada
  • Publication number: 20240011183
    Abstract: A quartz glass crucible has, from an inner surface side toward an outer surface side of the crucible, an inner transparent layer, a bubble layer, an outer transparent layer, and a crystallization accelerator-containing layer. An outer transition layer where a bubble content decreases from the bubble layer toward the outer transparent layer is provided at a boundary between the bubble layer and the outer transparent layer, and a thickness of the outer transition layer is 0.1 mm or more and 8 mm or less.
    Type: Application
    Filed: December 6, 2021
    Publication date: January 11, 2024
    Applicant: SUMCO Corporation
    Inventors: Eriko KITAHARA, Hiroshi KISHI, Hideki FUJIWARA
  • Publication number: 20240003044
    Abstract: There is provided a growing method of monocrystalline silicon including: pulling up monocrystalline silicon from a dopant-added melt in which a dopant is added to a silicon melt and growing the monocrystalline silicon according to Czochralski process, in which the monocrystalline silicon is grown by calculating a critical CV value, which is a product of a dopant concentration C and a pull-up speed V at a point of time when an abnormal growth occurred in the monocrystalline silicon; and controlling at least one of the dopant concentration C or the pull-up speed V to make a CV value, which is a product of the dopant concentration C and the pull-up speed V at the point of time, below the critical CV value.
    Type: Application
    Filed: December 2, 2021
    Publication date: January 4, 2024
    Applicant: SUMCO CORPORATION
    Inventors: Takashi IZEKI, Yasuhito NARUSHIMA
  • Publication number: 20240003049
    Abstract: A method of growing monocrystalline silicon through a Czochralski process uses a monocrystalline silicon growth device, the device including: a chamber; a crucible; a heater configured to heat a silicon melt contained in the crucible, in which the heater includes: an upper heater configured to heat an upper portion of the crucible; and a lower heater configured to heat a lower portion of the crucible; and a pull-up unit configured to pull up a seed crystal after bringing the seed crystal into contact with the silicon melt. The method includes: adding a volatile dopant to the silicon melt; and subsequently to the step, pulling up the monocrystalline silicon. In the step, the crucible is heated in a manner that no solidified layer is formed on a liquid surface of the silicon melt and heat generation amounts Qd, Qu of the lower heater and the upper heater satisfy Qd>Qu.
    Type: Application
    Filed: July 30, 2021
    Publication date: January 4, 2024
    Applicant: SUMCO CORPORATION
    Inventors: Yasufumi KAWAKAMI, Kazuyoshi SAKATANI
  • Publication number: 20230408356
    Abstract: A differential pressure measuring device and a differential pressure measurement method that can measure the difference between the pressure in an on-floor area and the pressure in an under-floor area even when the differential pressure is small. The device includes a differential pressure measuring unit, a first pipe of which one end is connected to a first port, and a second pipe of which one end is connected to a second port; and a cup to which the other end of the second pipe is connected and which forms a space for measuring the pressure in the under-floor area on the grating floor plate. The distance in a device height direction between the other end of the first pipe and the other end of the second pipe is fixed.
    Type: Application
    Filed: October 19, 2021
    Publication date: December 21, 2023
    Applicant: SUMCO CORPORATION
    Inventor: Kenji OKITA
  • Publication number: 20230407523
    Abstract: Provided a single crystal manufacturing method, a magnetic field generator, and a single crystal manufacturing apparatus, which allow the in-plane distribution of oxygen concentration in a single crystal to be uniform. A single crystal manufacturing method includes pulling-up a single crystal while applying a lateral magnetic field to a melt in a crucible. During a crystal pull-up process, the crucible is raised to meet the decrease in the melt, and a magnetic field distribution is controlled to meet the decrease in the melt in such a manner that the direction of the magnetic field at the melt surface and the direction of the magnetic field at the inner surface of a curved bottom portion of the crucible are constant from the beginning to the end of a body section growing step.
    Type: Application
    Filed: September 22, 2021
    Publication date: December 21, 2023
    Applicant: SUMCO Corporation
    Inventors: Naoki MATSUSHIMA, Ryusuke YOKOYAMA
  • Patent number: 11846039
    Abstract: A vapor deposition apparatus includes a disc-shaped susceptor and a susceptor support member that supports and rotates the susceptor. The susceptor has a plurality of fitting grooves. The susceptor support member is provided with a plurality of support pins to be fitted in the respective plurality of fitting grooves. The fitting grooves each have an inclined portion that relatively moves the support pin with respect to the fitting groove in a circumferential direction of the susceptor with the support pin kept in contact by virtue of a self-weight of the susceptor and a positioning portion that positions the support pin relatively moved by the inclined portion at a specific position in the circumferential direction. The inclined portion and the positioning portion are formed continuously in a radial direction of the susceptor.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: December 19, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Kazuhiro Narahara, Masayuki Tsuji, Haku Komori
  • Publication number: 20230395423
    Abstract: A producing method of a handle wafer for a bonded wafer produced by bonding an active wafer and the handle wafer through an insulation film includes: preparing a handle wafer body made from a monocrystalline silicon wafer; forming an oxide film on the handle wafer body; depositing a polycrystalline silicon layer on the oxide film; forming a protective oxide film on a surface of the polycrystalline silicon layer; and polishing to remove the protective oxide film and polishing the polycrystalline silicon layer.
    Type: Application
    Filed: October 18, 2021
    Publication date: December 7, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Naoya NONAKA, Daisuke HIEDA, Hiroaki ISHIZAKI, Toshiyuki ISAMI, Koudai MOROIWA
  • Publication number: 20230384077
    Abstract: A carrier measuring device includes a rotary table, a table drive motor, an upper thickness sensor, a lower thickness sensor and a slide unit. The rotary table includes a carrier receiver configured to horizontally house a carrier formed with a hole in which a semiconductor wafer is held, the hole being eccentric with respect to the carrier. The table drive motor rotates the rotary table around a center axis thereof as a rotation axis. The upper thickness sensor and the lower thickness sensor are positioned above and below the carrier, respectively, and measure a thickness of the carrier in a non-contact manner. The slide unit slides the rotary table in a horizontal direction. The carrier receiver is formed to be capable of housing the carrier in a manner that a center of the hole coincides with a center of the rotary table.
    Type: Application
    Filed: October 4, 2021
    Publication date: November 30, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Hiroshi TAKAI, Takeshi KUROIWA, Ryosuke KIDO
  • Publication number: 20230381834
    Abstract: Provided is a method of preventing a sudden increase in the number of particles detected on wafer surfaces even when cleaning of a wafer is performed repeatedly using a single-wafer processing wafer cleaning apparatus. The method uses a single-wafer processing wafer cleaning apparatus including a rotatable stage; chemical solution supply nozzles; pure water supply nozzles; a chemical solution supply line for supplying chemical solutions to the chemical solution supply nozzles; a pure water supply line for supplying pure water to the pure water supply nozzles; and a waste liquid line. The method includes a pipe cleaning step of introducing pure water containing micro-nano bubbles into the pure water supply line, and cleaning the pipe of the pure water supply line.
    Type: Application
    Filed: October 4, 2021
    Publication date: November 30, 2023
    Applicant: SUMCO Corporation
    Inventor: Ryoichi YANAI
  • Patent number: 11826870
    Abstract: Provided is a double-side polishing apparatus and a double-side polishing method for a work which make it possible to terminate double-side polishing with timing allowing a work having been polished to have a target shape. A computing unit performs a step of grouping the data of thicknesses on a work basis; a step of extracting shape components of each work; a step of identifying a position of each of the shape components in the work radial direction; a step of computing a shape distribution of the work; a step of obtaining a shape index of the work; and a step of determining timing at which the obtained shape index becomes a set value of the shape index, determined based on a difference between a target value and an actual value of the shape index in the previous batch, as timing of termination of the double-side polishing.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: November 28, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Mami Kubota, Keiichi Takanashi
  • Publication number: 20230369416
    Abstract: To provide a silicon wafer with extremely low resistivity by containing an ultra-high concentration of boron, the silicon wafer having a high gettering ability by enabling formation of oxygen precipitates at a high concentration, and making it possible to suppress the occurrence of epitaxial defects originating from oxygen precipitates when an epitaxial layer is formed. Disclosed is a silicon wafer made of monocrystalline silicon, the silicon wafer containing boron as a dopant and having a resistivity of 1 m?·cm or more and 10 m?·cm or less, the silicon wafer having an oxygen concentration of 14.5×1017 atoms/cm3 or more and 16×1017 atoms/cm3 or less, and a carbon concentration of 2×1016 atoms/cm3 or more and 5×1017 atoms/cm3 or less, and the silicon wafer being free from COPs and dislocation clusters.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 16, 2023
    Applicant: SUMCO Corporation
    Inventor: Keiichiro HIRAKI
  • Patent number: 11814745
    Abstract: A production method of monocrystalline silicon includes: growing the monocrystalline silicon having a straight-body diameter in a range from 301 mm to 330 mm that is pulled up through a Czochralski process from a silicon melt including a dopant in a form of red phosphorus; controlling a resistivity of the monocrystalline silicon at a straight-body start point to fall within a range from 1.20 m?cm to 1.35 m?cm; and subsequently sequentially decreasing the resistivity of the monocrystalline silicon to fall within a range from 0.7 m?cm to 1.0 m?cm at a part of the monocrystalline silicon.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: November 14, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Yasufumi Kawakami, Koichi Maegawa
  • Publication number: 20230357950
    Abstract: Please replace the Abstract contained in the application with the following replacement Provided is a process of measuring a space between a melt surface and a seed crystal provided above a melt, a process of lowering the seed crystal based on the space and bringing the seed crystal into contact with the melt, and a process of growing a single crystal by pulling the seed crystal while maintaining contact with the melt. Images of the seed crystal and the melt surface are captured by a camera installed diagonally above the melt surface, a real-image edge approximation circle is generated by approximating a circle from an edge pattern at a lower end of a straight-trunk portion of a real image of the seed crystal, and a mirror-image edge approximation circle is generated by approximating the circle from an edge pattern at the straight-trunk portion of a mirror image of the seed crystal reflected on the melt surface.
    Type: Application
    Filed: September 22, 2021
    Publication date: November 9, 2023
    Applicant: SUMCO Corporation
    Inventors: Yasunobu SHIMIZU, Susumu TAMAOKI, Ippei SHIMOZAKI, Keiichi TAKANASHI, Ken HAMADA
  • Publication number: 20230340691
    Abstract: Provided is a manufacturing method of a silicon single crystal according to the present invention includes a melting process for generating a silicon melt containing a primary dopant, and a crystal pulling-up process that pulls up a silicon single crystal from the silicon melt. The crystal pulling-up process includes at least one additional doping process for adding a dopant raw material containing a secondary dopant into the silicon melt. A flow rate of Ar gas during a first period in which the secondary dopant is not added is set as a first flow rate, and the flow rate of Ar gas during a second period that includes a period in which the secondary dopant is added is set as a second flow rate that is greater than the first flow rate..
    Type: Application
    Filed: September 21, 2021
    Publication date: October 26, 2023
    Applicant: SUMCO Corporation
    Inventors: Shogo KOBAYASHI, Norihito FUKATSU, Takahiro KANEHARA, Hitomi YAMAMOTO
  • Publication number: 20230330809
    Abstract: A wafer polishing method includes acquiring in-plane thickness distribution information regarding a wafer to be polished or a wafer subjected to the same processing treatment, determining a difference in pressure between a pressure Pc to be applied to the central part of the wafer by introducing a gas into the central region and a pressure Pe to be applied to the outer peripheral part of the wafer by introducing a gas into the outer peripheral region, determining any one pressure of Pc and Pe, and determining the other pressure, determining the pressure Pg to be applied, based on a set value Pr of a contact pressure to be applied to the lower surface of the second ring-shaped member due to contact with the polishing pad at the time of polishing, and bringing the lower surface of the wafer into contact with the polishing pad to conduct polishing.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 19, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Hiroki OTA, Yuki NAKANO
  • Publication number: 20230326752
    Abstract: An epitaxial wafer includes a silicon substrate having a top surface and an epitaxial layer on said top surface, wherein the epitaxial layer has a thickness in a range of 0.3 ?m to 1.0 ?m, and a thickness variation of 1% or less. A method of preparing such epitaxial wafer includes placing a silicon substrate on a susceptor in an epitaxial reactor; rotating the susceptor at a rotation rate (D); and applying a source gas in the epitaxial reactor to grow an epitaxial layer of a desired thickness (B) at a growth rate (A) on the silicon substrate; wherein the source gas is applied for a growth time (C) that satisfies C=B/A and the rotation rate (D) is selected from a range of 22 to 70 rpm that allows the susceptor to rotate to an exact integer number of turns (E) based on a relationship D=E/C.
    Type: Application
    Filed: January 31, 2023
    Publication date: October 12, 2023
    Applicant: SUMCO CORPORATION
    Inventor: Naoyuki WADA