Abstract: A convection pattern control method includes: heating a silicon melt in a quartz crucible using a heating portion; and applying a horizontal magnetic field to the silicon melt in the quartz crucible being rotated. In the heating of the silicon, the silicon melt is heated with the heating portion whose heating capacity differs on both sides across an imaginary line passing through a center axis of the quartz crucible and being in parallel to a central magnetic field line of the horizontal magnetic field when the quartz crucible is viewed from vertically above. In the applying of the horizontal magnetic field, the horizontal magnetic field of 0.2 tesla or more is applied to fix a direction of a convection flow in a single direction in a plane orthogonal to an application direction of the horizontal magnetic field in the silicon melt.

Abstract: A method of producing an epitaxial silicon wafer includes irradiating a surface of a silicon wafer with a beam of cluster ions containing SiHx ions (at least one of the integers 1 to 3 is selected as x of the SiHx ions) and C2Hy ions (at least one of the integers 2 to 5 is selected as y of the C2Hy ions) to form a modified layer that is located in a surface layer portion of the silicon wafer and that contains as a solid solution of the constituent elements of the cluster ion beam, and further includes forming a silicon epitaxial layer on the modified layer of the silicon wafer. The dose of the SiHx ions is 1.5×1014 ions/cm2 or more.

Abstract: Provided is a double-sided polishing method of a wafer in which the wafer, which has been set in a wafer loading hole of the carrier, is compressed and held along with the carrier with an upper platen and a lower platen and the upper platen and the lower platen are rotated while supplying slurry to the wafer. The method includes: previously measuring an inclination value of a main surface of each of a plurality of carriers in the vicinity of the edge of the wafer loading hole; selecting, from among the plurality of carriers, those for which the inclination value is equal to or smaller than a threshold based on the measurement results of the inclination value; and applying the double-sided polishing to a wafer using the selected carrier.

Abstract: A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.

Abstract: A method for producing an n-type monocrystalline silicon that includes pulling up a monocrystalline silicon from a silicon melt containing a main dopant in a form of red phosphorus to grow the monocrystalline silicon. The monocrystalline silicon exhibits an electrical resistivity ranging from 1.7 m?cm to 2.0 m?cm, and is pulled up using a quartz crucible whose inner diameter ranges from 1.7-fold to 2.0-fold relative to a straight-body diameter of the monocrystalline silicon.

Abstract: A method and a system for cleaning a work, the sum A of the areas (mm2), the sum B of the areas (mm2) and the determined supply flow rate Q (L/min) or the supply flow rate Q (L/min) and one or both of the determined sum A of the areas (mm2) and the determined sum B of the areas (mm2) satisfy the predetermined relations.

Abstract: Provided is a method of double-side polishing a semiconductor wafer, which can suppress variation in the polishing quality by providing for changes in the polishing environment during polishing.

Abstract: A wafer manufacturing system includes a wafer manufacturing device provided with a sensor; a host PC that is connected to the wafer manufacturing device via a data communication line; a logic controller that samples and stores an analog output signal of the sensor; and a relay PC that extracts tracking information transmitted on the data communication line for a wafer or a single crystal that is being processed by the wafer manufacturing device and sends the tracking information to the logic controller, and the logic controller stores a digital value of the analog output signal of the sensor in association with the tracking information that is sent from the relay PC.

Abstract: Provided is a double-side polishing apparatus and a double-side polishing method which make it possible to terminate double-side polishing with timing allowing a work having been polished to have a target shape. A computing unit 13 performs a step of grouping the data of thicknesses measured using work thickness measuring devices 11 on a work basis; a step of extracting shape components of each work from the thickness data; a step of identifying a position of each of the shape components in the work radial direction; a step of computing a shape distribution of the work from the identified position ; a step of obtaining a shape index of the work from the computed shape distribution; and a step of determining timing of termination of the double-side polishing based on the obtained shape index, thus timing of termination of the double-side polishing is determined.

Abstract: A semiconductor wafer including a single crystal doped with a dopant, wherein a resistivity of the wafer is 0.7 m?-cm or less, and wherein a striation height of the wafer is 6 mm or more. The resistivity of the wafer may be 0.8 m?-cm or less, and the striation height may be 13 mm or more. The resistivity of the wafer may be 0.7 m?-cm or less, and the striation may be 22 mm or more. Example features relate to a method of making a semiconductor wafer that includes adding a dopant to a silicon melt, rotationally pulling a crystal from the silicon melt, and applying a magnetic field of 3000 G or more such that the semiconductor wafer has a resistivity that is equal to or less than 0.8 m?-cm and a striation height that is equal to or more than 13 mm.

Abstract: A handle wafer used for a bonded wafer that is produced by bonding an active wafer and the handle wafer through an insulation film is provided. The handle wafer includes a handle wafer body and a polycrystalline silicon layer deposited on a side close to a bonding surface of the handle wafer body. The polycrystalline silicon layer has a polycrystalline silicon grain size of 0.419 ?m or less.

Abstract: In a producing method of an n-type monocrystalline silicon by pulling up a monocrystalline silicon from a silicon melt containing a main dopant in a form of red phosphorus to grow the monocrystalline silicon, the monocrystalline silicon exhibiting an electrical resistivity ranging from 0.5 m?cm to 1.0 m?cm is pulled up using a quartz crucible whose inner diameter ranges from 1.7-fold to 2.3-fold relative to a straight-body diameter of the monocrystalline silicon.

Abstract: A measurement method and a measurement apparatus are capable of measuring the transmittance of a quartz crucible accurately. A measurement method includes: emitting a parallel light from a light source disposed on a side of one wall surface of a quartz crucible toward a predetermined measurement point of the quartz crucible; measuring reception levels of light transmitted through the quartz crucible at a plurality of positions by disposing a detector at the plurality of positions on a circle centered around an exit point of the parallel light on the other wall surface of the quartz crucible; and calculating a transmittance of the quartz crucible at the predetermined measurement point based on a plurality of the reception levels of the transmitted light measured at the plurality of positions.

Abstract: A single crystal manufacturing apparatus 10 according to the present invention is provided with a single crystal puller pulling up a single crystal 15 from a melt 13, a camera 18 photographing a fusion ring generated at the boundary between the melt 13 and the single crystal 15 and an computer 24 processing a photographed image taken by the camera 18. The computer 24 projects and converts the fusion ring appearing in the photographed image taken by the camera 18 on a reference plane corresponding to the liquid level position of the melt based on an installation angle and a focal length of the camera and calculates a diameter of the single crystal 15 from a shape of the fusion ring on the reference plane.

Abstract: An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×1017 atoms/cm3.

Abstract: A polishing apparatus for an outer peripheral portion of a wafer includes: a stage for horizontally holding a disc-shaped wafer; a rotation drive unit for rotating the stage around its center axis as a rotation axis; polishing heads having an inner circumferential surface mounted with polishing pads; and a polishing-head drive mechanism for bringing the polishing pads into contact with the outer peripheral portion of the wafer and sliding the polishing heads in a direction slanted relative to a center axis of the wafer or a vertical direction thereof under application of a predetermined polishing pressure to the outer peripheral portion of the wafer. The inner circumferential surface of each of the polishing heads is mounted with two or more types of the polishing pads having different physical property values in the vertical direction.

Abstract: A method of heat-treating a silicon wafer using a lateral heat treatment furnace that can improve the product yield by restricting reduction in the lifetime value of silicon wafers placed in the vicinity of dummy blocks placed to equalize the temperature of the region where the wafers are placed. In a method of heat-treating a silicon wafer using a lateral heat treatment furnace, a boat is placed in a hollow cylindrical furnace core tube, and on the boat, at least one of a first additional block between a first dummy block and a wafer group and a second additional block between a second dummy block and the wafer group is placed.

Abstract: A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.

Abstract: The sum of torques: the torque of the sun gear and the torque of the internal gear, and the ratio of the torques are controlled within predetermined ranges.

Abstract: Provided is an epitaxial wafer having an excellent gettering capability and a suppressed formation of epitaxial defects. The epitaxial wafer has a specified resistivity, and includes a modifying layer formed on a surface portion of the silicon wafer and composed of a predetermined element including at least carbon, in the form of a solid solution in the silicon wafer; and an epitaxial layer having a resistivity that is higher than the resistivity of the silicon wafer, wherein a concentration profile of the predetermined element in the modifying layer in a depth direction thereof meets a specified full width half maximum and a specified peak concentration.