Abstract: A voltage generator circuitry includes first to third bipolar transistors having commonly-connected base electrodes, first and second current mirror circuitries, first and second differential amplifiers; a first resistor; and a current-voltage conversion circuitry. The first current mirror circuitry supplies currents to the first to third bipolar transistors and to the current-voltage conversion circuitry. The second current mirror circuitry supplies currents to the first to third bipolar transistors, and s to the current-voltage conversion circuitry. The first and second differential amplifiers control the first and second current mirror. The current-voltage conversion circuitry converts a sum current of the first and second currents into an output voltage.

Abstract: A display driver comprises a touch controller configured to perform touch sensing on a display panel during a vertical sync period. A first field of the vertical sync period comprises a display period and a touch sensing period following the display period. A start timing of the touch sensing period is controlled by an internal clock signal. A first counter is configured to, responsive to completion of the touch sensing, start a counting operation in synchronization with the internal clock signal. Gate control signal generator circuitry is configured to control a gate driver that is configured to drive a plurality of gate lines of the display panel. A gate line that is to be driven first to a high level during a second field following the first field is driven to the high level responsive to a count value of the first counter during the first field.

Abstract: A voltage generator circuitry includes first to third bipolar transistors having commonly-connected base electrodes, first and second current mirror circuitries, first and second differential amplifiers; a first resistor; and a current-voltage conversion circuitry. The first current mirror circuitry supplies currents to the first to third bipolar transistors and to the current-voltage conversion circuitry. The second current mirror circuitry supplies currents to the first to third bipolar transistors, and s to the current-voltage conversion circuitry. The first and second differential amplifiers control the first and second current mirror. The current-voltage conversion circuitry converts a sum current of the first and second currents into an output voltage.

Abstract: A voltage generator circuitry includes first to third bipolar transistors having commonly-connected base electrodes, first and second current mirror circuitries, first and second differential amplifiers; a first resistor; and a current-voltage conversion circuitry. The first current mirror circuitry supplies currents to the first to third bipolar transistors and to the current-voltage conversion circuitry. The second current mirror circuitry supplies currents to the first to third bipolar transistors, and s to the current-voltage conversion circuitry. The first and second differential amplifiers control the first and second current mirror. The current-voltage conversion circuitry converts a sum current of the first and second currents into an output voltage.

Abstract: A display driver is disclosed that includes: an external interface circuit having input modes as interface modes to input display data. The display driver keeps the scan driving of a display panel stopped during a predetermined period until the driving of the display panel by display data input in the interface mode after switching is enabled in case that the interface mode of the external interface circuit is switched in the middle of driving the display panel based on display data input through the external interface circuit.

Abstract: A system and method for controlling the screen brightness of a display comprising calculating a brightness data which specifies a screen brightness level of a self-luminous display panel, determining, based on the brightness data, correction control points, calculating an output value from the input grayscale value with input-output characteristics specified by the correction control points.

Abstract: A display control and touch detection device is capable of controlling display and non-display terms in start timing depending on a result of touch detection, and includes a nonvolatile memory and a control logic which selectively uses data stored in the memory according to a display mode. The control logic changes the display and non-display terms in start timing in display frame periods, whereby the phenomenon of appearance of an undesired brightness difference at a fixed location in a display frame with no display, and the phenomenon of occurrence of flicker owing to the undesired brightness difference can be suppressed. Based on the result of touch detection, the control logic changes the way to use data which decide start timings of display and no display. The start timings of display and non-display terms in a display frame period can be changed depending on the result of touch detection readily.

Abstract: A display driver includes a plurality of source amplifiers configured to drive a plurality of source lines of a display panel, and an amplifier control system configured to control the source amplifiers. Each of the source amplifiers is configured to drive a source line with a drive voltage corresponding to a grayscale value specified by an image data associated with each of the source amplifiers. The amplifier control system is configured to control execution and stopping of an amplifying operation of each of the source amplifiers based on the image data associated with each of the source amplifiers is a grayscale value corresponding to black portions of the display panel.

Abstract: A circuit apparatus is provided for driving source electrodes of a display panel based on image data and to control a backlight of the display panel. For example, the circuit apparatus includes a display drive (DD) circuit having a parameter generation (PG) part and an image data conversion (IDC) part. The PG part is operable to generate an image data-conversion parameter and a backlight control parameter based on a brightness distribution of the image data of one frame. The IDC part is operable to convert the image data based on the image data-conversion parameter. The DD circuit is operable to output source signals generated based on the converted image data and output, control the backlight based on the backlight control parameter, and stop an action of the parameter generation part in response to no change in the image data of one frame from image data of a preceding frame being detected.

Abstract: A display driver comprises a touch controller configured to perform touch sensing on a display panel during a vertical sync period. A first field of the vertical sync period comprises a display period and a touch sensing period following the display period. A start timing of the touch sensing period is controlled by an internal clock signal. A first counter is configured to, responsive to completion of the touch sensing, start a counting operation in synchronization with the internal clock signal. Gate control signal generator circuitry is configured to control a gate driver that is configured to drive a plurality of gate lines of the display panel. A gate line that is to be driven first to a high level during a second field following the first field is driven to the high level responsive to a count value of the first counter during the first field.

Abstract: A system and method for rendering subpixels comprising performing an eight-color halftoning process on the second image data to generate third image data which describe a grayscale value of each of an R subpixel, a G subpixel and a B subpixel of each pixel with one bit, generating the third image data by performing a dithering process on the second image data using a dither value selected from elements of the dither table, when the third image data associated with a pixel of interest of the display panel is generated, and driving the display panel in response to the third image data.

Abstract: A system and method for rendering subpixels comprising performing an eight-color halftoning process on the second image data to generate third image data which describe a grayscale value of each of an R subpixel, a G subpixel and a B subpixel of each pixel with one bit, generating the third image data by performing a dithering process on the second image data using a dither value selected from elements of the dither table, when the third image data associated with a pixel of interest of the display panel is generated, and driving the display panel in response to the third image data.

Abstract: An image processing apparatus includes: a first circuit which calculates values f(RPi), f(GPi) and f(BPi) by applying a function f(x) to an R grayscale value RPi, a G grayscale value GPi and a B grayscale value BPi of each pixel i of a first image; a second circuit which calculates values f(RQi), f(GQi) and f(BQi) by applying the function f(x) to an R grayscale value RQi, a G grayscale value GQi and a B grayscale value BQi of each pixel i of a second image; and a similarity calculation circuit which calculates a degree of similarity between the first and second images depending on |f(RPi)?f(RQi)|, |f(GPi)?f(GQi)| and |f(BPi)?f(BQi)| associated with each pixel i of the first and second images. The function f(x) is a convex function monotonically non-decreasing in the domain of definition.

Abstract: Provided is a color adjustment method for a display apparatus. The color adjustment method includes: measuring first luminance coordinate data indicating a luminance and color coordinates of a color displayed on a display device when image data corresponding to a white point is supplied to a drive circuitry; measuring second luminance coordinate data indicating luminances and color coordinates of colors displayed on the display device when image data corresponding to the white color of intermediate grayscale values are supplied to the drive circuitry; measuring third luminance coordinate data indicating a luminance and color coordinates of a color displayed on the display device for each of R, G and B elementary color points when image data corresponding to each of the R, G and B elementary color points is supplied to the drive circuitry; and calculating correction parameters based on the first to third luminance coordinate data.

Abstract: The drive control device includes a display control part and a touch control part. The display control part includes a control circuit operable to control first and second frame modes, and a clock pulse generator operable to produce a display line clock signal in synchronization with a display line switching cycle. The control circuit changes display and non-display drive terms in start timing on an individual display frame period basis in the first frame mode. In the second frame mode, each display frame period includes only one display drive term; the display drive term is not interrupted by a non-display drive term halfway. The second frame mode is arranged so that the cycle of the display line clock signal in synchronization with the display line switching cycle is made longer than that in the first frame mode.

Abstract: A display driver includes: a memory comprising a plurality of memory regions each configured to store image data for one line of an image displayed in a frame; and control circuitry configured to adjust a number of in-use memory regions of the plurality of memory regions used to store the image data. The control circuitry is further configured to control the memory so that image data for respective lines of the image are cyclically stored in the in-use memory regions in a fixed order.

Abstract: An image compression device includes: a first compression processing circuit configured to generate a first compressed image data by performing a first block compression process on an image data and a dither value generator circuit. When the first compressed image data associated with a compression target block is generated, the dither value generator circuit is configured to generate at least one dither value in response to block coordinates indicating a position of the compression target block in an image and the first compression processing circuit is configured to perform a quantization process using the at least one dither value in the first block compression process.

Abstract: In a semiconductor device in which a reference voltage is generated by a reference voltage generation circuit, and the same reference voltage generated is used in a plurality of circuit units for the purpose of generating a voltage, a sampling and holding circuit of the reference voltage is provided in order to provide a standard voltage to the circuit units. A sampling and holding control circuit that controls the sampling and holding circuit instructs the sampling and holding circuit to perform a sampling operation of the reference voltage in case that the semiconductor device operates in a state where power supply noise of the reference voltage generation circuit falls within a predetermined range, and instructs the sampling and holding circuit to perform a holding operation of the reference voltage in case that the semiconductor device operates in a state where the power supply noise exceeds the predetermined range.

Abstract: Provided is a display driver which can be used in common in any of COF mounting and COG mounting. In the display driver, a position (or write/output position) of display data output by an output circuit can be changed along a direction of an array of external output terminals S1 to S540 according to mode data, whereby an array of external output terminals to use for output can be selected from more than one kind of arrays different in layout pitch. Therefore, the display driver can be used in display panels with signals lines having different pitches serving to receive drive signals from the display driver and in addition, used in common in any of COF mounting and COG mounting which are different from each other in the pitch of mounting wiring lines.

Abstract: A driver IC is described by which disconnection can be readily prevented from being falsely determined even on condition that an input voltage fed back as a result of output of a detecting voltage by a driver IC is affected by noise on a driven device. The driver IC is arranged so that the latch timing of latching a result of the comparison between an input voltage fed back as a result of a detecting voltage output by the driver IC and the detecting voltage is shift-controlled in each predetermined cycle of synchronizing signals with a predetermined shift and even if noise is generated in a driven device at any time in each cycle of the synchronizing signals, determination signals affected by the noise are never latched in each cycle of the synchronizing signals.