Patents Assigned to Synaptics Japan GK
  • Patent number: 9721524
    Abstract: A semiconductor integrated circuit includes a power line and a power supply circuitry. The power supply circuitry includes: a first power supply circuit operating on a first power supply voltage and having an output connected with the power line; and a second power supply circuit operating on a second power supply voltage higher than the first power supply voltage and having an output connected with the power line. The first power supply circuit is configured to drive the power line to a first preset, voltage. The second power supply circuit is configured to drive the power line to a second preset voltage lower than the first preset voltage. The second power supply circuit is configured not to decrease a third power supply voltage generated on the power line when the third power supply voltage is higher than the second preset voltage.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: August 1, 2017
    Assignee: Synaptics Japan GK
    Inventor: Teru Yoneyama
  • Patent number: 9704450
    Abstract: For each display line cycle, inputs to a pair of differential input terminals of a driving circuit are alternately switched in a cycle shorter than the display line cycle between a gradation voltage and a reference voltage. According to this, a chopping operation of switching polarities of offset appearing at the output of the driving circuit within one display line is performed for a plurality of times, and accordingly, a pixel of each display line maintains brightness information in which the chopping operation is already performed. As a result, although a frame cycle is lengthened, it is difficult to visually recognize a brightness difference caused by the offset.
    Type: Grant
    Filed: March 1, 2014
    Date of Patent: July 11, 2017
    Assignee: Synaptics Japan GK
    Inventors: Toshiyuki Takani, Toshikazu Tachibana, Shinobu Notomi, Takesada Akiba
  • Patent number: 9692374
    Abstract: A differential amplifier circuit and display drive circuit having the same are disclosed herein. In one example, a differential amplifier circuit includes a differential pair transistor configure to receive a differential input signal. A current source is connected in series to the differential pair transistor and an output transistor that drives an output terminal on the basis of the differential input signal. The output transistor is configured to increase a current value of a current source on the basis of a timing at which a voltage level of the output terminal is caused to transition. The output transistor is configured to drive the output terminal only during a period in which the output terminal is caused to transition, and thus a slew rate is improved by increasing a bias current of the differential pair transistor in the period.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: June 27, 2017
    Assignee: Synaptics Japan GK
    Inventor: Yutaka Saeki
  • Patent number: 9691347
    Abstract: An image processing apparatus includes a reference value calculating section configured to generate a value that is a weighted average of values of R data, G data, and B data of original RGB data as a reference value. Regarding each of color data such as the R data, the G data, and the B data, a value is calculated that is coincident with a value obtained by adding the value of the color data of the original RGB data to a product of a difference obtained by subtracting the reference value from the value of the color data of the original RGB data and a predetermined coefficient, as a value of the color data of RGB data after saturation expansion.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: June 27, 2017
    Assignee: Synaptics Japan GK
    Inventors: Masaaki Okawa, Takashi Nose, Hirobumi Furihata, Akio Sugiyama, Yoshiki Kurokawa
  • Patent number: 9640121
    Abstract: One display frame period is divided into one or a plurality of display driving periods and non-display driving periods, and immediately before transition from the non-display driving period to the display driving period, a dummy driving period is inserted. During the dummy driving period, using dummy data changed from display data at the time of driving stop of a signal electrode during the non-display driving period, driving of the signal electrode starts. Thereafter, a display line is selected, and, using the display data corresponding to each display line selected, the signal electrode is driven.
    Type: Grant
    Filed: March 1, 2014
    Date of Patent: May 2, 2017
    Assignee: Synaptics Japan GK
    Inventor: Isao Munechika
  • Patent number: 9639198
    Abstract: A semiconductor device connected to the display panel including the in-cell type touch sensor is configured as follows. The semiconductor device includes a driving circuit of the display panel, a touch sensing circuit of the touch sensor, a power supply circuit that supplies a power source to these circuits, and a bias control circuit that controls a bias current flowing through these circuits. The semiconductor device is able to perform a time-division operation in which one frame period of display is divided into a plurality of display driving periods and sensing periods. In the display driving periods, the supply of power to the touch sensing circuit is suppressed, and/or a bias current is reduced. In the sensing periods, the supply of power to the driving circuit is suppressed, and/or a bias current is reduced.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: May 2, 2017
    Assignee: Synaptics Japan GK
    Inventor: Isao Munechika
  • Patent number: 9640130
    Abstract: A display driver is connectable with and serves to activate an active matrix type display panel having a plurality of source lines wired to run in an up-and-down direction and a plurality of gate lines wired to run in left and right directions when viewed from a direction perpendicular to a substrate, and a plurality of pixels respectively arranged at intersections where the source and gate lines intersect with one another; electric charges corresponding to display data are transmitted from the source lines to the pixels selected by the driven gate line. The display driver includes a circuit capable of adjusting, in amplitude, first gate drive circuits operable to drive, of the plurality of gate lines, gate lines wired from the left, and second gate drive circuits operable to drive gate lines wired from the right independently of one another.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: May 2, 2017
    Assignee: Synaptics Japan GK
    Inventor: Kimihiko Sugiyama
  • Patent number: 9626916
    Abstract: In a display driver, a first backlight control unit using a histogram and a second backlight control unit using an optical sensor can be used in combination. The display driver includes a PWM generating unit setting a control signal value consisting of a product of a luminance rate of X % and a luminance rate of Y % as a luminance rate of a control signal for controlling a backlight with respect to maximum backlight luminance when a luminance rate of a control signal obtained by first backlight control with respect to the maximum backlight luminance is X % and a luminance rate of a control signal obtained by second backlight control with respect to the maximum backlight luminance is Y %.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: April 18, 2017
    Assignee: SYNAPTICS JAPAN GK
    Inventors: Naoki Takada, Yasuyuki Kudo, Yoshiki Kurokawa, Goro Sakamaki
  • Patent number: 9619007
    Abstract: An integrated circuit device includes first and second integrated circuits and a power supply line. The first integrated circuit includes a first power supply circuit, a timing generation circuit generating a synchronization signal, and a first power supply control section. The second integrated circuit includes a second power supply circuit and a second power supply control section. The power supply line electrically connects the outputs of the first and second power supply circuit. The first and second power supply control sections are each configured to start the operations of the first and second power supply circuits, respectively, in response to a start of a supply of the synchronization signal after a sleep-out command is supplied thereto. The timing generation circuit starts supplying the synchronization signal after a predetermined waiting time elapses after the sleep-out command is supplied to the first integrated circuit.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: April 11, 2017
    Assignee: SYNAPTICS JAPAN GK
    Inventors: Toshio Mizuno, Miho Kobayashi, Junpei Sakurai
  • Patent number: 9619067
    Abstract: A display signal drive circuit is configured to output a display signal having a signal level based on a common voltage to a display panel. A touch detection signal drive circuit is configured to output a touch detection signal having a signal level based on the common voltage to a touch panel in case that a composite panel is an in-cell type, and is configured to output a touch detection signal having a signal level based on a voltage level other than the common voltage to the touch panel in case that the composite panel is an on-cell type.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: April 11, 2017
    Assignee: Synaptics Japan GK
    Inventor: Kazuhiro Okamura
  • Patent number: 9607566
    Abstract: A liquid crystal display apparatus includes a liquid crystal display panel having gate lines and source lines, a GIP circuit which drives the gate lines and a source driver IC3 which drives the source lines. The source driver IC3 includes a gate control signal generator which generates gate control signals SOUT1-SOUTn which control the GIP circuit. The gate control signal generator is configured so that it is possible to control the waveforms of the gate control signals SOUT1-SOUTn in software.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 28, 2017
    Assignee: SYNAPTICS JAPAN GK
    Inventors: Satoshi Saito, Kota Kitamura, Hajime Tanabe
  • Patent number: 9607568
    Abstract: A display panel driver includes: a grayscale amplifier receiving an input grayscale reference voltage and generating an output grayscale reference voltage corresponding to the input grayscale reference voltage; a voltage dividing resistor receiving the output grayscale reference voltage and generating a plurality of grayscale voltages by using the received output grayscale reference voltage; a decoder circuit selecting grayscale voltages from among the plurality of grayscale voltages in response to image data and outputting the selected grayscale voltages; and an output circuit outputting drive voltages corresponding to the selected grayscale voltages to output terminals to be connected to source lines of a display panel. The grayscale amplifier is configured such that the output grayscale reference voltage is adjustable by adjusting an offset voltage of the grayscale amplifier.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: March 28, 2017
    Assignee: SYNAPTICS JAPAN GK
    Inventor: Takao Kinsho
  • Patent number: 9601043
    Abstract: The display device includes display drivers including first and second ones operable to output, based on display data, gradation signals to source lines of display panel regions. The display device is arranged to be able to suppress the variation in output voltage between display drivers while minimizing the increases in chip area of the display drivers and in wiring area of a display panel and keeping high noise resistance. Each display driver can generate gray scale reference voltages for producing gradation signals corresponding to display data. The first display driver can sequentially transmit gray scale reference voltages generated by itself to the second display driver. Based on the transmitted gray scale reference voltages, the second display driver makes the first display driver execute calibration for decreasing the absolute value of difference between gray scale reference voltages generated by the first and second display drivers, or executes the calibration by itself.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: March 21, 2017
    Assignee: Synaptics Japan GK
    Inventors: Toshiyuki Hikichi, Yasuhito Kurokawa, Shutaro Ichikawa, Masashi Takata
  • Patent number: 9588612
    Abstract: Provided is a display drive circuit which is connected to a display panel including a gate drive circuit that scans gate electrodes, a source driver that drives source electrodes of the display panel, and a gate control driver that supplies a clock signal to the gate drive circuit. The display drive circuit performs an intermittent operation which is alternately provided with a display period in which the source electrodes are driven and an interruption period during which the display panel is not updated. During a start of the display period following the interruption period, the gate control driver extends a pulse width of the clock signal which is supplied to the gate drive circuit, or preliminarily outputs the clock signal before the start of the display period.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: March 7, 2017
    Assignee: Synaptics Japan GK
    Inventor: Kazuhiro Okamura
  • Patent number: 9583030
    Abstract: A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: February 28, 2017
    Assignee: SYNAPTICS JAPAN GK
    Inventors: Yoshiki Kurokawa, Yasuyuki Kudo, Hiroyuki Nitta, Kazuki Homma, Junya Takeda
  • Patent number: 9568976
    Abstract: The semiconductor device has a touch panel controller, a processor and a display driver. The semiconductor device is arranged so as to reduce an electric power uselessly consumed while the action of the display driver is stopped or suspended and further, and an electric power uselessly consumed by the touch-detecting action for recovery of the display driver from the state of the action being stopped or suspended. The processor built in the semiconductor device together with the touch panel controller and the display driver returns to its workable state from Sleep state each time a given length of time elapses, and then causes the touch panel to perform a touch-detecting action. When the processor cannot acquire a result of judgment as “being touched”, it returns to Sleep state again, and waits for the given length of time to elapse.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: February 14, 2017
    Assignee: Synaptics Japan GK
    Inventors: Akihito Akai, Tsuyoshi Kuroiwa, Tatsuya Ishii
  • Patent number: 9570049
    Abstract: The semiconductor device includes: a select circuit which selects, from output signals of tiding generators, timing signals formed by one timing generator; another select circuit which is disposed in a stage after the select circuit, and selects the tiding signals selected by the first select circuit or signals regulated in polarity, and outputs the selected signals outward; and a control register provided for variably setting the polarities of the signals regulated in polarity in units of the signals. If abnormal power supply cutoff of the semiconductor device is detected, the second select circuit is switched from the state of selecting the timing signals to the state of selecting the signals regulated in polarity in response to the detection.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: February 14, 2017
    Assignee: Synaptics Japan GK
    Inventors: Satoshi Saito, Takeshi Naruse
  • Patent number: 9558708
    Abstract: A display drive circuit includes: source amplifiers capable of driving source lines of a display panel connected thereto; preamplifiers capable of outputting first gradation voltages; source circuits each including a division of the source amplifiers, provided that the source amplifiers are divided equally; and resistance arrays. Each source circuit is provided with one of the resistance arrays. Each resistance array divides input first gradation voltages to generate second gradation voltages and provides them to the corresponding source circuit. The worsening of the capability of converging of gradation lines for supplying second gradation voltages to the source circuits can be suppressed without providing gradation-voltage-generation circuits even with a display driver IC having an increased long side length, or more than one display driver IC provided.
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: January 31, 2017
    Assignee: Synaptics Japan GK
    Inventors: Yoshinori Ura, Kiichi Makuta, Toshikazu Arai, Jun Uchida, Keita Tsubakino
  • Patent number: 9557853
    Abstract: A touch detecting circuit includes a discharging circuit, a detecting circuit, and a calibration circuit that is configured with a calibration capacitor connected to a terminal and a current source which is connected to the terminal and can be controlled so as to be on and off, that can be connected via the terminal to a sensing capacitor which is disposed on a touch panel, is provided. In the beginning, the sensing capacitor is charged to a predetermined voltage by the charging circuit, thereafter, in a process of discharging, a portion of charge amount that is discharged is used to charge the calibration capacitor, and another portion is discharged via the current source, and the rest is input to the detecting circuit. The detecting circuit measures the charge amount that is input.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: January 31, 2017
    Assignee: Synaptics Japan GK
    Inventors: Takayuki Noto, Akihito Akai
  • Patent number: 9552786
    Abstract: In case that a terminal gradation signal output terminal in a pre-stage display driver and an initial gradation signal output terminal in a next-stage display driver of a plurality of display drivers which are arranged in parallel are used in driving the same gradation signal electrode of a display panel, an output of dummy data from the other gradation signal output terminal which mutually competes with an output timing of a gradation signal from one gradation signal output terminal between both the gradation signal output terminals is suppressed by high impedance control of a corresponding gradation signal output terminal.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: January 24, 2017
    Assignee: Synaptics Japan GK
    Inventor: Atsushi Shikata