Abstract: Embodiments of a circuit, system, and method are disclosed. In an embodiment, a circuit includes first and second microstrip transmission lines. The first and second microstrip transmission lines include linearly arranged conductive strips on the circuit and a slotline formation extends between the first microstrip transmission line and the second microstrip transmission line so that the slotline formation is configured to electromagnetically couple the first microstrip transmission line to the second microstrip transmission line during operation of the circuit. In addition, the circuit includes at least one controllable capacitance circuit electrically connected to at least one of the first microstrip transmission line and the second microstrip transmission line, where a magnitude of a capacitance value of the at least one controllable capacitance circuit (e.g., including a barium strontium titanate (BST) capacitor) is controllable (e.g.

Abstract: A filter device includes a first filter connected between a common terminal and a first individual terminal, and a second filter connected between the common terminal and a second individual terminal. A pass band of the second filter is in a frequency range lower than a pass band of the first filter. The first filter includes SAW resonators, at least one of which includes divided resonators connected in parallel with each other. Each of the divided resonators includes an IDT. A pitch of the IDT of one of the divided resonators is different from that of another of the divided resonators.

Abstract: The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.

Abstract: An acoustic resonator assembly and a filter are disclosed. The acoustic resonator assembly includes at least two acoustic resonators vertically connected to each other. The acoustic resonator includes: an acoustic mirror, a bottom electrode layer, a piezoelectric layer, and a top electrode layer that are arranged on a substrate. An active area of the acoustic resonator is defined by an overlapping area of the acoustic mirror, the bottom electrode layer, the piezoelectric layer, and the top electrode layer. The acoustic resonator further includes a support layer arranged on the substrate or the piezoelectric layer on a periphery of a projection of the acoustic mirror on the substrate. The at least two acoustic resonators are vertically connected to each other through the support layer. The filter significantly reduces the volume and the area of a device, improves design freedom and reduces design difficulty, enhances product performance and greatly reduces costs.

Abstract: An acoustic wave filter includes a series-arm resonator, a first parallel-arm resonator, and a second parallel-arm resonator. The series-arm resonator is disposed on a path connecting first and second input/output terminals. The first parallel-arm resonator is disposed on a path that connects ground with a node, which is located on a path connecting the series-arm resonator with the first input/output terminal. The second parallel-arm resonator is disposed on a path that connects ground with a node, which is located on a path connecting the series-arm resonator with the second input/output terminal. The parallel-arm resonator has a resonant frequency lower than the resonant frequency of the second parallel-arm resonator. The first parallel-arm resonator has an anti-resonant frequency higher than the anti-resonant frequency of the second parallel-arm resonator. The second parallel-arm resonator has the highest resonant frequency of all the parallel-arm resonators.

Abstract: Differential input circuits employ protection transistors and feedback paths to limit the differential voltage applied to input transistors. In an example arrangement, a differential input voltage is applied to terminals of the protection transistors, and current paths couple the respective protection transistors to control terminals of the input transistors, respectively. A control terminal drive voltage source is coupled to the control terminals of the input protection transistors to control the drive voltage applied to those terminals. Feedback paths, one for each of the input transistors, control voltages applied to the control terminals of the input transistors, maintaining the input differential voltage at a relatively low level and defined by the product of a specified current value and a specified resistance value.

Abstract: Aspects of this disclosure relate to a surface acoustic wave resonator. The surface acoustic wave resonator includes a piezoelectric substrate, interdigital transducer electrodes disposed on an upper surface of the piezoelectric substrate, a dielectric temperature compensation layer disposed on the piezoelectric substrate to cover the interdigital transducer electrodes, and a dielectric passivation layer over the temperature compensation layer. The passivation layer may include an oxide layer configured to have a sound velocity greater than that of the temperature compensation layer to suppress a transverse signal transmission.

Abstract: There are disclosed acoustic diplexers and radios incorporating the acoustic diplexers. A diplexer includes common port, a low band port, a high band port, n low band sub-filters, and n high band sub-filters, where n is an integer greater than one. Each low band sub-filter has a first sub-filter port connected to the common port and a second sub-filter port connected to the low band port. Each high band sub-filter has a first sub-filter port connected to the common port and a second sub-filter port connected to the high band port. A first acoustic resonator is connected from the common port to ground and a second acoustic resonator is connected from the low band port to ground. The first and second acoustic resonators are configured to create respective transmission zeros adjacent to a lower edge of a passband of the diplexer.

Abstract: Techniques are described for using valley detection for supply voltage modulation in power amplifier circuits. Embodiments operate in context of a power amplifier circuit configured to be driven by a supply voltage generated by a supply modulator and to receive an amplitude-modulated (AM) signal at its input. The output of the power amplifier circuit can be fed to a valley detector that can detect a valley level corresponding to the bottom of the envelope of the AM signal. The detected valley level can be fed back to the supply modulator and compared to a constant reference. In response to the comparison, the supply modulator can vary the supply voltage to the power amplifier circuit in a manner that effectively tracking the envelope of the power amplifier circuit's output signal, thereby effectively seeking a flat valley for the output signal's envelope.

Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Abstract: A receiver for cancelling common mode offset and crosstalk that amplifies a voltage difference between an input signal and a reference voltage to generate first and second output signals and an internal signal, that generates the same third and fourth output signals as the first and second output signals, generates average voltage levels of the third and fourth output signals by using first and second switching elements and low pass filters to output the average voltage levels as first and second feedback signals, and cancels a common mode offset between the first output signal and the second output signal based on a voltage difference between the first feedback signal and the second feedback signal, and that generates a control signal to cancel crosstalk of the internal signal by turning on/off the first and second switching elements connected to the low pass filters.

Abstract: The electronic circuits and semiconductor device having the same are provided. The electronic circuit includes: a first transistor including a first electrode coupled with an input voltage; a second transistor including a first electrode coupled with a second electrode of the first transistor; a first capacitor coupled between the first transistor and the second transistor; a first diode including a first terminal coupled with the first electrode of the first transistor; a second diode including a first terminal coupled with a second terminal of the first diode and a second terminal coupled with a second electrode of the second transistor; a second capacitor coupled between the first transistor and the first diode; and a third capacitor coupled between the first diode and the second transistor.

Abstract: A bias circuit includes first to sixth transistors and first to fifth resistors. The collector of the fifth transistor is coupled to a node in a path connecting the collector of the fourth transistor and one end of the third resistor. The collector of the sixth transistor Tr6 is coupled to one end of the fifth resistor.

Abstract: An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.

Abstract: An acoustic wave resonator includes an IDT electrode that is on or above a piezoelectric plate and includes a periodic withdrawal weighted portion in each of a plurality of regions for at least two or more periods in an acoustic wave propagation direction. A periodic withdrawal weighted portion in at least one of the regions is different from a periodic withdrawal weighted portion in at least one of the other regions.

Abstract: An example transconductance circuit includes a first portion that includes a first degeneration transistor, configured to receive a first input voltage, and a second portion that includes a second degeneration transistor, coupled to the first degeneration transistor and configured to receive a second input voltage. The first portion further includes a first input transistor, coupled to the first degeneration transistor and configured to provide a first output current, while the second portion further includes a second input transistor, coupled to the second degeneration transistor and configured to provide a second output current. Such a transconductance circuit may be used as an input stage capable of reliably operating within drain-source breakdown voltage of the transistors employed therein even in absence of any other protection devices, and may be significantly faster, consume lower power, and occupy smaller die area compared to conventional transconductance circuits.

Abstract: In some embodiments, an apparatus includes a first layer having a first plurality of electrically conductive traces comprising a first portion of a plurality of hierarchical networks; a second layer having a second plurality of electrically conductive traces comprising a second portion of the plurality of hierarchical networks; and a plurality of vias electrically connecting the first plurality of electrically conductive traces of the first layer to the respective second plurality of electrically conductive traces of the second layer to define the plurality of hierarchical networks. The first plurality of electrically conductive traces is orientated in a first direction and the second plurality of electrically conductive traces is orientated in a second direction different from the first direction.

Abstract: A radio frequency filter includes at least a first sub-filter and a second sub-filter connected in parallel between a first port and a second port. Each of the sub-filters has a piezoelectric plate having front and back surfaces, the back surface attached to a substrate, and portions of the piezoelectric plate forming diaphragms spanning respective cavities in the substrate. A conductor pattern is formed on the front surface of the plate, the conductor pattern includes interdigital transducers (IDTs) of a respective plurality of resonators, with interleaved fingers of each IDT disposed on a respective diaphragm of the plurality of diaphragms. A thickness of the portions of the piezoelectric plate of the first sub-filter is different from a thickness of the portions of the piezoelectric plate of the second sub-filter.

Abstract: A circuit is disclosed, in accordance with some embodiments. The circuit includes a transistor stage, a resistive element, a first tunable capacitive element and a second tunable capacitive element. The transistor stage includes a first input/output terminal and a second input/output terminal. The resistive element is connected to the transistor stage. The first tunable capacitive element is connected in parallel with the resistive element. The second tunable capacitive element is connected to the second input/output terminal of the transistor stage. The first tunable capacitive element and the second tunable capacitive element are configured to be selectively turned on and off to provide different frequency responses.

Abstract: A variable gain amplifier includes input terminals configured to receive a differential input of the variable gain amplifier, output terminals configured to generate a differential output of the variable gain amplifier, the differential output having a gain applied by the variable gain amplifier to the differential input, and an impedance ladder circuit coupled to the input terminals, the impedance ladder circuit comprising a plurality of semiconductor switches configured to receive respective control signals based on a control voltage. The plurality of semiconductors switches are responsive to the respective control signals to adjust the gain of the variable gain amplifier and configured with a predetermined exponential scale such that the impedance ladder circuit causes a slope of the gain of the variable gain amplifier relative to the control voltage to be generally linear.