Abstract: The present disclosure provides a MEMS phase shifter and a manufacturing method thereof. The MEMS phase shifter includes a first substrate having a first surface, a coplanar waveguide on the first surface of the first substrate and including a first conductive wire and two second conductive wires on two sides of the first conductive wire and insulated from the first conductive wire, and a plurality of capacitance bridges on a side of the coplanar waveguide away from the first substrate. The plurality of capacitance bridges are arranged at intervals and insulated from the first conductive wire and the second conductive wire, and each of the plurality of capacitance bridges intersects the first conductive wire. The first surface of the first substrate includes a first groove, and the first conductive wire is suspended above the first groove.

Abstract: A Docsis-MoCA coupled line directional coupler includes an input port, an output port, a coupled port, and a termination port. A first track connects the input port to the output port and a second track, which may be substantially parallel to the first track, connects the termination port to the coupled port. The first track and the second track are configured to form a variable coupling length so as to control, for instance, an isolation level between the output port and the coupled port to be less than a predetermined isolation level in a MoCA frequency band.

Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration.

Abstract: A power divider includes an input capacitor, and first and second transmission lines (TLs). The first TL includes an input portion (IP), a transmission portion (TP) and an output portion (OP). The second TL includes a TP and an OP. The IP is for receiving an input signal, and is connected to the TPs of the first and second TLs. For each of the first and second TLs, the TP has a length that is one-twelfth of a target wavelength, and is connected to the OP. The OPs of the first and second TLs are for cooperatively outputting a pair of output signals which are in-phase and each of which has a frequency equal to that of the input signal. The input capacitor is connected between ground and the IP.

Abstract: The present invention relates to use of an enhanced performance ultraconductive copper composite cylindrical conduit. The ultraconductive copper composite cylindrical conduit has enhanced RF conductivity.

Abstract: An elastic wave filter device includes a ladder filter that includes series arm resonators and parallel arm resonators. In one series arm resonator in which the acoustic velocity in a first and second edge area is lower than in a central area, each first electrode finger includes a large-width portion having a width larger than in remaining portions in the second edge area, and each second electrode finger includes a large-width portion having a width larger than in remaining portions in the first edge area. In at least one of remaining series arm resonators and the parallel arm resonators, each first and second electrode finger includes a large-width portion having a width larger than in remaining portions in both of the first and second edge areas.

Abstract: The present invention relates to circuitry comprising: interpolation filter circuitry configured to receive a digital input signal and to output an interpolated digital signal; amplifier circuitry configured to generate an output signal based on the interpolated digital signal; and protection circuitry. The protection circuitry is configured to activate in response to detection of a fault condition at an output of the amplifier circuitry. The circuitry further comprises first detection circuitry configured to output a control signal to disable the protection circuitry on detection of a transient signal at an output of the interpolation filter circuitry that is unrelated to a fault.

Abstract: A power combiner/divider circuit can be structured having a base structure with the addition of an odd-mode capacitor and a low pass network at an end of the base structure or structured having a base structure with the addition of an inductor and a high pass network at an end of the base structure. The power combiner/divider circuit can be implemented as a port coupled to multiple ports with low pass networks or high pass networks arranged at the ends of paths to the multiple ports. In embodiments using low pass base structures or low pass networks coupled to the base structures, inductors in such low pass sections can be positively coupled on a pair-wise basis.

Abstract: An acoustic wave device includes a piezoelectric substrate including a piezoelectric layer made of lithium tantalate, an IDT electrode on the piezoelectric substrate, and a pair of reflectors on both sides of the IDT electrode on the piezoelectric substrate in an acoustic wave propagation direction. SH waves are used as a principal mode. The IDT electrode includes electrode fingers and the pair of reflectors each including electrode fingers. When a length along a direction orthogonal to a direction in which the electrode fingers extend is a width, each of the reflectors includes first and second electrode fingers having different widths. Four consecutive electrode fingers, which are any four of the electrode fingers of each of the reflectors, include both of the first and second electrode fingers and distances between centers of the four consecutive electrode fingers are equal or substantially equal.

Abstract: In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

Abstract: A high frequency package includes a package having an input terminal and an output terminal. A substrate housed in the package, has a first side, a second side facing the input terminal, and a third side facing the output terminal. The first side extends in a first direction and connects the second side and the third side, and the second side and the third side extend in a second direction intersecting the first direction. A coupling circuit on the substrate is electrically connected to the input terminal and the output terminal to input an input signal from the input terminal disposed at the second side of the substrate and output an output signal to the output terminal disposed at the third side of the substrate. A filter circuit on the substrate is electrically connected to the coupling circuit, an is configured to reduce third-order IMD (Inter Modulation Distortion) included in the output signal.

Abstract: A filter device includes a common connection terminal, a first bandpass filter connected to the common connection terminal and including an inductor, and a second bandpass filter connected to the common connection terminal and having a pass band lower in frequency than a pass band of the first bandpass filter. The filter device uses SH waves. The first bandpass filter is a ladder filter. Each of series arm resonators and parallel arm resonators includes an interdigital transducer electrode. Of the parallel arm resonators of the first bandpass filter, the inductor is connected in series to the parallel arm resonator with a shortest electrode finger pitch of the interdigital transducer electrode.

Abstract: A semiconductor integrated circuit is capable of electrically connecting to a capacitance variable capacitor whose electrostatic capacitance changes corresponding to an environmental change between a first and a second capacitances and determines whether the electrostatic capacitance of the capacitance variable capacitor has changed to exceed a reference capacitance value.

Abstract: An elastic wave filter apparatus includes at least one excitation electrode, a first electrode land, and second electrode lands provided on a first main surface of a device substrate including a piezoelectric layer. A signal terminal and metal members are provided on a second main surface of the device substrate. The first electrode land and the signal terminal are connected to a signal potential, and the second electrode lands and the metal members are connected to a ground potential. A first connection electrode connects the first electrode land and the signal terminal, and a second connection electrode connects at least one of the second electrode lands and at least one of the metal members. The at least one metal member connected to the second connection electrode overlaps at least a portion of the at least one excitation electrode across the device substrate.

Abstract: A shielded bridge for a coplanar waveguide (CPW) includes a signal bridge extending from a first terminal of the CPW to a second terminal of the CPW. The signal bridge has a raised central portion that extends over a separate signal conductor. The shielded bridge for the CPW also includes a ground bridge extending from a first ground plane on a first side of the separate signal conductor to a second ground plane on a second side of the separate signal conductor. The ground bridge is positioned between the signal bridge and the separate signal conductor.

Abstract: A power amplifier circuit includes a first amplifier that amplifies a first signal, and a second amplifier arranged subsequent to the first amplifier. The second amplifier amplifies a second signal that is based on an output signal of the first amplifier. The first amplifier performs class inverse-F operation, and the second amplifier performs class F operation.

Abstract: Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.

Abstract: Radio frequency filters. A radio frequency filter includes a substrate attached to a piezoelectric plate, portions of the piezoelectric plate forming a plurality of diaphragms spanning respective cavities in the substrate. A conductor pattern formed on the piezoelectric plate includes a plurality of interdigital transducers (IDTs) of a respective plurality of resonators, interleaved fingers of each IDT disposed on a respective diaphragm of the plurality of diaphragms. The conductor pattern connects the plurality of resonators in a matrix filter circuit including a first sub-filter and a second sub-filter, each sub-filter comprising two or more resonators from the plurality of resonators.

Abstract: Aspects of this disclosure relate to a surface acoustic wave resonator that may include a piezoelectric substrate, interdigital transducer (IDT) electrodes disposed on an upper surface of the piezoelectric substrate, and a dielectric film covering the piezoelectric substrate and the IDT electrode for temperature compensation. The IDT electrodes may include bus bar electrode regions spaced apart from each other in a transverse direction perpendicular to a propagation direction of a surface acoustic wave to be excited, an overlapping region sandwiched between the bus bar regions, and gap regions defined between respective bus bar electrode regions and the overlapping region in the transverse direction. Each of the gap regions may include a dummy electrode in a dummy electrode region extending from the bus bar electrode region in the transverse direction. The dielectric film may include an open region exposing a respective bus bar electrode region and dummy electrode region.

Abstract: A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.