Abstract: A shielded bridge for a coplanar waveguide (CPW) includes a signal bridge extending from a first terminal of the CPW to a second terminal of the CPW. The signal bridge has a raised central portion that extends over a separate signal conductor. The shielded bridge for the CPW also includes a ground bridge extending from a first ground plane on a first side of the separate signal conductor to a second ground plane on a second side of the separate signal conductor. The ground bridge is positioned between the signal bridge and the separate signal conductor.

Abstract: A power amplifier circuit includes a first amplifier that amplifies a first signal, and a second amplifier arranged subsequent to the first amplifier. The second amplifier amplifies a second signal that is based on an output signal of the first amplifier. The first amplifier performs class inverse-F operation, and the second amplifier performs class F operation.

Abstract: Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.

Abstract: Radio frequency filters. A radio frequency filter includes a substrate attached to a piezoelectric plate, portions of the piezoelectric plate forming a plurality of diaphragms spanning respective cavities in the substrate. A conductor pattern formed on the piezoelectric plate includes a plurality of interdigital transducers (IDTs) of a respective plurality of resonators, interleaved fingers of each IDT disposed on a respective diaphragm of the plurality of diaphragms. The conductor pattern connects the plurality of resonators in a matrix filter circuit including a first sub-filter and a second sub-filter, each sub-filter comprising two or more resonators from the plurality of resonators.

Abstract: Aspects of this disclosure relate to a surface acoustic wave resonator that may include a piezoelectric substrate, interdigital transducer (IDT) electrodes disposed on an upper surface of the piezoelectric substrate, and a dielectric film covering the piezoelectric substrate and the IDT electrode for temperature compensation. The IDT electrodes may include bus bar electrode regions spaced apart from each other in a transverse direction perpendicular to a propagation direction of a surface acoustic wave to be excited, an overlapping region sandwiched between the bus bar regions, and gap regions defined between respective bus bar electrode regions and the overlapping region in the transverse direction. Each of the gap regions may include a dummy electrode in a dummy electrode region extending from the bus bar electrode region in the transverse direction. The dielectric film may include an open region exposing a respective bus bar electrode region and dummy electrode region.

Abstract: A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.

Abstract: Aspects of this disclosure relate to a surface acoustic wave resonator. The surface acoustic wave resonator includes a piezoelectric substrate, interdigital transducer electrodes formed on an upper surface of the piezoelectric substrate, a dielectric temperature compensation layer formed on the piezoelectric substrate to cover the interdigital transducer electrodes, and a dielectric passivation layer over the temperature compensation layer. The passivation layer may include an oxide layer configured to have a sound velocity greater than that of the temperature compensation layer to suppress a transverse signal transmission.

Abstract: Certain aspects of the present disclosure provide a filter. The filter generally includes a series resonator coupled between a first port of the filter and a second port of the filter, and a shunt resonator coupled between a node of the filter and a reference potential node of the filter, the node being coupled between the first port and the second port. The shunt resonator typically includes a first piezoelectric substrate, a first plurality of reflectors disposed above the first piezoelectric substrate, and a first plurality of interdigital transducers (IDTs) disposed above the first piezoelectric substrate and between the first plurality of reflectors, wherein the shunt resonator is configured as a dual mode structure (DMS).

Abstract: A wideband power amplifier (PA) linearization technique is proposed. A current interpolation technique is proposed to linearize power amplifiers over a wide bandwidth. The wideband power amplifier linearization technique employs a novel transconductance Gm linearizer using a current interpolation technique that achieves improvement in the third order intermodulation over wide bandwidth for a sub-micron CMOS differential power amplifier. By using a small amount of compensating bias into an opposite phase differential pair, linearization over wide bandwidth is achieved and can be optimized by adjusting the compensating bias.

Abstract: A waveguide power divider device comprises four two-port orthomode junctions arranged with their common waveguides extending in parallel, wherein the two ports of each orthomode junction extend in orthogonal directions, four E-plane T-junctions, each T-junction coupling two of the four orthomode junctions to each other via respective ones of their ports, a four-port turnstile junction, wherein waveguides of the four ports are bent to extend in parallel to an extension direction of a common waveguide of the turnstile junction, and four waveguide twists, each waveguide twist coupling a common waveguide of a respective one of the T-junctions to the waveguide of a respective one of the ports of the turnstile junction, with broad walls of the common waveguide of the T-junction and of the waveguide of the port of the turnstile junction being orthogonal to each other. An array antenna may include one or more such waveguide power divider devices.

Abstract: According to various embodiments, an array of elements forms an artificially-structured material. The artificially-structured material can also include an array of tuning mechanisms included as part of the array of elements that are configured to change material properties of the artificially-structured material on a per-element basis. The tuning mechanisms can change the material properties of the artificially-structured material by changing operational properties of the elements in the array of elements on a per-element basis based on one or a combination of stimuli detected by sensors included in the array of tuning mechanisms, programmable circuit modules included as part of the array of tuning mechanisms, data stored at individual data stores included as part of the array of tuning mechanisms, and communications transmitted through interconnects included as part of the array of elements.

Abstract: A transmission-line network includes first, second, third, and fourth transmission lines. Signal conductors of the first and third transmission lines are connected in series and the signal conductors of the second and fourth transmission lines are connected in series. Signal-return conductors of the first and fourth transmission lines are connected in series. The signal-return conductors of the second and third transmission lines are connected in series. A first resistor may be connected between a junction between the signal conductors of the first and third transmission lines and a junction between the signal conductors of the second and fourth transmission lines. A second resistor may be connected between a junction between the signal-return conductors of the first and fourth transmission lines and a junction between the signal-return conductors of the second and third transmission lines.

Abstract: An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce the footprint and improve heat dissipation of the ET power amplifier apparatus.

Abstract: A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor.

Abstract: Methods and systems are provided for controlling rail-voltages for amplifier output stages. In some examples, a method may include receiving sets of data values (e.g., at a power-supply control circuitry) for control of a rail voltage of an amplifier output stage. The method may also include determining that the receipt of a pending set of data values has been interrupted. Then, upon the determination that the receipt of the pending plurality of data values has been interrupted, the method may include decreasing the rail voltage to a non-boosted rail-voltage level.

Abstract: A hybrid mechanical-lens array antenna is described that can be configured with different orientations and arrangements of the plurality of lenses within the array to control and enhance the performance at different regions of scan. This can include the addition of a secondary array (a skirt) at a large tilt angle, tilting the primary array, tilting the individual lenses within the primary array, or any combination. These design choices, when holding the number of lens modules (and, therefore, cost and power consumption) constant, have the effect of changing the system height, reducing the boresight gain and increasing the gain at scan, with each option showing different trades of height and scan and boresight performance.

Abstract: An amplifier circuit includes a multistage amplifier, a first feedback circuit and a second feedback circuit. The multistage amplifier includes a first-staged amplifier, a last-staged amplifier and at least one middle-staged amplifier cascaded between the first-staged amplifier and the last-staged amplifier. The first feedback circuit is configured to couple a positive output end of the last-staged amplifier to a positive input end of the at least one middle-staged amplifier, or is configured to couple a negative output end of the last-staged amplifier to a negative input end of the at least one middle-staged amplifier. The second feedback circuit is configured to couple the positive output end of the last-staged amplifier to a positive input end of the last-staged amplifier, or is configured to couple the negative output end of the last-staged amplifier to a negative input end of the last-staged amplifier.

Abstract: Large intelligent surfaces (LISs) with sparse channel sensors are provided. Embodiments described herein provide efficient solutions for these problems by leveraging tools from compressive sensing and deep learning. Consequently, an LIS architecture based on sparse channel sensors is provided where all LIS elements are passive reconfigurable elements except for a few elements that are active (e.g., connected to baseband). Two solutions are developed that design LIS reflection matrices with negligible training overhead. First, compressive sensing tools are leveraged to construct channels at all the LIS elements from the channels seen only at the active elements. These full channels can then be used to design the LIS reflection matrices with no training overhead.

Abstract: A twistarray reflector includes: a reflector having front reflecting surface comprising wires and a back reflecting surface, the front reflecting surface fabricated from the wires and composites where the wires are placed having an orientation at each point on the front surface to decompose an incident field into orthogonal components so that an electromagnetic reflected from the front surface when superposed with a phase-inverted electromagnetic field reflected from the back reflecting surface produces a net reflected electromagnetic field that is polarized in a specific vector direction with consistent phase.

Abstract: A thin, flexible antenna module is provided for use in a smartphone. When the antenna module is assembled in the smartphone, the antenna module provides an MST antenna and an NEC antenna. For this, the antenna module includes a flexible PCB containing coils and further includes a magnetic sheet engaged with flexible PCB. The flexible PCB and the magnetic sheet are attached to each other to form a single body.