Patents Examined by Andrew J Cheong
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Patent number: 11803325Abstract: Systems and methods for specifying storage media types in write commands executable by storage devices are disclosed. An example system comprises: a plurality of memory devices and a controller operatively coupled to the memory devices, the controller configured to: receive a write command specifying a data item and an identifier of a data stream comprising the data item; determine, by parsing the identifier of the data stream, a data stream attribute shared by data items comprised by the data stream; identify, based on the data stream attribute, a memory device managed by the controller; and transmit, to the memory device, an instruction specifying the data item.Type: GrantFiled: March 27, 2018Date of Patent: October 31, 2023Assignee: Micron Technology, Inc.Inventor: Daniel J. Hubbard
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Patent number: 11797202Abstract: A storage device may include a memory device including a memory block coupled to physical word lines each including pages, and a memory controller configured to control the memory device such that, in response to a power off event occurring during a program operation on a selected page, fine program operations are performed on to-be completed pages, which precede the selected page, on which foggy program operations have been completed and on which the fine program operations have not yet been performed. The program operation may include a foggy program operation of programming memory cells included in the pages so that each memory cell has a threshold voltage corresponding to any one of intermediate states corresponding to states, and a fine program operation of programming the memory cells having the threshold voltages corresponding to the intermediate states so that each memory cell has a threshold voltage corresponding to any one state.Type: GrantFiled: July 1, 2020Date of Patent: October 24, 2023Assignee: SK hynix Inc.Inventors: Seung Gu Ji, Jun Rye Rho
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Patent number: 11782605Abstract: A memory system has a controller (e.g., CPU, FPGA, or GPU) and recording segments in a non-volatile memory (e.g., a flash memory device) used by the controller to store data. The controller is configured to: maintain data write counters for the recording segments; select a first segment of the recording segments for recording data from a host system, wherein selecting the first segment comprises scanning the data write counters to identify a first data write counter corresponding to the first segment; receive, from the host system, data to be recorded by the non-volatile memory; and write the received data to the selected first segment.Type: GrantFiled: November 29, 2018Date of Patent: October 10, 2023Assignee: Micron Technology, Inc.Inventor: Gil Golov
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Patent number: 11782829Abstract: Technologies for cryptographic separation of MMIO operations with an accelerator device include a computing device having a processor and an accelerator. The processor establishes a trusted execution environment. The accelerator determines, based on a target memory address, a first memory address range associated with the memory-mapped I/O transaction, generates a second authentication tag using a first cryptographic key from a set of cryptographic keys, wherein the first key is uniquely associated with the first memory address range. An accelerator validator determines whether the first authentication tag matches the second authentication tag, and a memory mapper commits the memory-mapped I/O transaction in response to a determination that the first authentication tag matches the second authentication tag. Other embodiments are described and claimed.Type: GrantFiled: March 4, 2022Date of Patent: October 10, 2023Assignee: INTEL CORPORATIONInventors: Luis S. Kida, Reshma Lal, Soham Jayesh Desai
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Patent number: 11768777Abstract: Methods, apparatus, and processor-readable storage media for application aware cache management are provided herein. An example computer-implemented method includes maintaining a data structure comprising at least one entry indicative of an importance of at least one of a plurality of applications associated with a storage system; and controlling whether or not a particular data item requested by one of the plurality of applications is cached in a cache memory of the storage system based at least in part on the at least one entry of the data structure.Type: GrantFiled: January 22, 2020Date of Patent: September 26, 2023Assignee: EMC IP Holding Company LLCInventors: Jai P. Gahlot, Shiv S. Kumar
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Patent number: 11768737Abstract: An application may store data to a dataset comprising a plurality of volumes stored on a plurality of storage systems. The application may request a dataset image of the dataset, the dataset image comprising a volume image of each volume of the dataset. A dataset image manager operates with a plurality of volume image managers in parallel to produce the dataset image, each volume image manager executing on a storage system. The plurality of volume image managers respond by performing requested operations and sending responses to the dataset image manager in parallel. Each volume image manager on a storage system may manage and produce a volume image for each volume of the dataset stored to the storage system. If a volume image for any volume of the dataset fails, or a timeout period expires, a cleanup procedure is performed to delete any successful volume images.Type: GrantFiled: November 14, 2019Date of Patent: September 26, 2023Assignee: NetApp, Inc.Inventors: Stephen Wu, Prathamesh Deshpande, Manan Patel
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Patent number: 11755419Abstract: Method, apparatus, and computer program product utilizing a hot-spare node in a storage network having a deduplication fingerprints database. A plurality of nodes is provided in the storage network including at least one active node and at least one hot-spare node. A portion of the deduplication fingerprints database is stored on each active node and on each hot-spare node. Data from the deduplication fingerprints database is provided from at least one of said at least one hot-spare node during normal operation. Responsive to a failure of one of said at least one active node, a portion of the deduplication fingerprints database associated with data stored on the failed one of said at least one active node is retained on one of the at least one hot-spare node. The failed one active node is replaced with one of the at least one hot-spare node.Type: GrantFiled: September 6, 2018Date of Patent: September 12, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Alexander H. Ainscow, Ben Sasson, Gordon Hutchison, Miles Mulholland, Lee J. Sanders
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Patent number: 11704192Abstract: A storage system has zones in solid-state storage memory, with power loss protection. The system identifies portions of data for processes that utilize power loss protection. The system determines to activate or deactivate power loss protection for the portions of data for the processes. The system tracks activation and deactivation of power loss protection in zones in the solid-state storage memory, in accordance with the portions of data having power loss protection activated or deactivated.Type: GrantFiled: April 21, 2021Date of Patent: July 18, 2023Assignee: PURE STORAGE, INC.Inventors: Andrew R. Bernat, Matthew Paul Fay, Ronald Karr
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Patent number: 11704040Abstract: A computer-implemented method includes initiating a copy request for a data storage cartridge. The data storage cartridge includes data storage media having host data thereon. The method also includes transparently loading the data storage cartridge into a first data storage drive of a data storage library and establishing drive-to-drive communication for copying data from the data storage media in the first data storage drive to data storage media in a second data storage drive. The method includes copying data from the data storage media in the first data storage drive to the data storage media in the second data storage drive. A system includes a processor and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to perform the foregoing method.Type: GrantFiled: December 9, 2019Date of Patent: July 18, 2023Assignee: International Business Machines CorporationInventors: Lee Jesionowski, Brian Gerard Goodman, Ronald Faye Hill, Jr., Jason L. Peipelman
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Patent number: 11662929Abstract: A method includes: storing a first data extent on a physical medium, wherein the physical medium is divided into a plurality of storage blocks, wherein each of the storage blocks has a size that is different than a size of the first data extent, further wherein the first data extent is stored to a first block of the plurality of storage blocks; generating a descriptor for the first data extent, wherein the descriptor indicates that the first data extent starts within the first block of the plurality of blocks and indicates an offset from the beginning of the first block at which the first data extent starts; and storing the descriptor within the first block.Type: GrantFiled: September 1, 2020Date of Patent: May 30, 2023Assignee: NETAPP, INC.Inventors: Randolph Sterns, Charles Binford, William P. Delaney, Joseph Blount, Reid Kaufmann, Joseph Moore
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Patent number: 11663144Abstract: A method for improving cache hit ratios for selected storage elements within a storage system includes storing, in a cache of a storage system, non-favored storage elements and favored storage elements. The favored storage elements are retained in the cache longer than the non-favored storage elements. The method maintains a first LRU list containing entries associated with non-favored storage elements and designating an order in which the non-favored storage elements are evicted from the cache, and a second LRU list containing entries associated with favored storage elements and designating an order in which the favored storage elements are evicted from the cache. The method periodically scans the first LRU list for non-favored storage elements that have changed to favored storage elements, and the second LRU list for favored storage elements that have changed to non-favored storage elements. A corresponding system and computer program product are also disclosed.Type: GrantFiled: January 20, 2020Date of Patent: May 30, 2023Assignee: International Business Machines CorporationInventors: Lokesh M. Gupta, Kevin J. Ash, Matthew G. Borlick, Beth A. Peterson
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Patent number: 11620219Abstract: In one embodiment, storage drive dependent track removal processing logic performs destage tasks for tracks cached in a cache as a function of whether the storage drive is classified as a fast class or as slow class of storage drives, for example. In one embodiment, a destage task configured for a slow class storage drive, transfers an entry for a track selected for destaging from a main cache list to a wait cache list to await destaging to the slow class drive. A destage task configured for a fast class storage drive allows the cache list entry for the selected track to remain on the main cache list while the selected track is being destaged to the fast class storage drive, thereby bypassing the transfer of the entry to a wait cache list. Other features and aspects may be realized, depending upon the particular application.Type: GrantFiled: November 19, 2020Date of Patent: April 4, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen
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Patent number: 11620224Abstract: Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.Type: GrantFiled: December 10, 2019Date of Patent: April 4, 2023Assignee: Advanced Micro Devices, Inc.Inventors: Aparna Thyagarajan, Ashok Tirupathy Venkatachar, Marius Evers, Angelo Wong, William E. Jones
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Patent number: 11620220Abstract: A cache memory system including a primary cache and an overflow cache that are searched together using a search address. The overflow cache operates as an eviction array for the primary cache. The primary cache is addressed using bits of the search address, and the overflow cache is addressed by a hash index generated by a hash function applied to bits of the search address. The hash function operates to distribute victims evicted from the primary cache to different sets of the overflow cache to improve overall cache utilization. A hash generator may be included to perform the hash function. A hash table may be included to store hash indexes of valid entries in the primary cache. The cache memory system may be used to implement a translation lookaside buffer for a microprocessor.Type: GrantFiled: December 12, 2014Date of Patent: April 4, 2023Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.Inventors: Colin Eddy, Rodney E. Hooker
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Patent number: 11610147Abstract: An entangled quantum cache includes a quantum store that receives a plurality of quantum states and is configured to store and order the plurality of quantum states and to provide select ones of the stored and ordered plurality of quantum states to a quantum data output at a first desired time. A fidelity system is configured to determine a fidelity of at least some of the plurality of quantum states. A classical store is coupled to the fidelity system and configured to store classical data comprising the determined fidelity information and an index that associates particular ones of classical data with particular ones of the plurality of quantum states and to supply at least some of the classical data to a classical data output at a second desired time. A processor is connected to the classical store and determines the first time based on the index.Type: GrantFiled: May 19, 2022Date of Patent: March 21, 2023Assignee: Qubit Moving and Storage, LLCInventors: Gary Vacon, Kristin A. Rauschenbach
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Patent number: 11579789Abstract: Disclosed herein are techniques for managing context information for data stored within a non-volatile memory of a computing device. According to some embodiments, the method can include (1) loading, into a volatile memory of the computing device, the context information from the non-volatile memory, where the context information is separated into a plurality of silos, (2) writing transactions into a log stored within the non-volatile memory, and (3) each time a condition is satisfied: (i) identifying a next silo of the plurality of silos to be written into the non-volatile memory, (ii) updating the next silo to reflect the transactions that apply to the next silo, and (iii) writing the next silo into the non-volatile memory. In turn, when an inadvertent shutdown of the computing device occurs, the silos of which the context information is comprised can be sequentially accessed and restored in an efficient manner.Type: GrantFiled: September 29, 2017Date of Patent: February 14, 2023Assignee: Apple Inc.Inventors: Alexander Paley, Andrew W. Vogan
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Patent number: 11580015Abstract: Systems and methods for performing data protection operations including garbage collection operations and copy forward operations. For deduplicated data stored in a cloud-based storage or in a cloud tier that stores containers containing dead and live segments or dead and live regions such as compression regions, the dead compression regions are deleted by copying the live compression regions into new containers and then deleting the old containers. The copy forward is based on a recipe from a data protection system and is performed using a serverless approach.Type: GrantFiled: May 3, 2019Date of Patent: February 14, 2023Assignee: EMC IP HOLDING COMPANY LLCInventors: Ramprasad Chinthekindi, Philip Shilane, Abhinav Duggal
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Patent number: 11573892Abstract: Systems and methods for performing data protection operations including garbage collection operations and copy forward operations. For deduplicated data stored in a cloud-based storage or in a cloud tier that stores containers containing dead and live regions such as compression regions, the dead segments in the dead compression regions are deleted by copying the live compression regions into new containers and then deleting the old containers. The copy forward is based on a recipe from a data protection system and is performed using a microservices based approach.Type: GrantFiled: April 26, 2019Date of Patent: February 7, 2023Assignee: EMC IP HOLDING COMPANY LLCInventors: Abhinav Duggal, Ramprasad Chinthekindi, Philip Shilane
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Patent number: 11561713Abstract: Aspects of a storage device including a memory and a controller are provided which simplify controller management of logical and physical meta-dies and meta-blocks by allowing a logical meta-die to be mapped to multiple physical meta-dies. The memory includes first dies grouped in a first physical meta-die and second dies grouped in a second physical meta-die. The physical meta-dies each include physical meta-blocks. The controller maps a logical meta-die to the first physical meta-die and the second physical meta-die. The controller may also map logical meta-blocks of the logical meta-die to the physical meta-blocks. For instance, the controller may associate a first logical metablock of the logical meta-die to the first physical meta-die and a second logical metablock of the logical meta-die to the second physical meta-die. As a result, firmware complexity in managing meta-dies and meta-blocks may be reduced compared to one-to-one logical-to-physical meta-die mapping approaches.Type: GrantFiled: March 11, 2021Date of Patent: January 24, 2023Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Hiep Tran, Dhayanithi Rajendiran, Christopher Dinh
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Patent number: 11550472Abstract: An approach for improving the writing an index file on tape storage by switching, via a tape drive, write sequences in an index partition, in which the tape drive switches between a normal wrap sequence and a reverse wrap sequence. Further, embodiments write the index information by the normal wrap sequence during initialization of the tape media, in which the tape media is being mounted for the first time. Additionally, embodiments write the index information by the reverse wrap sequence during an unmounting the tape media for the first time, and wherein the tape media is mounted based on index information written at a rearmost end of one or more data partitions during second and subsequent mounting.Type: GrantFiled: March 23, 2021Date of Patent: January 10, 2023Assignee: International Business Machines CorporationInventors: Hiroshi Itagaki, Tsuyoshi Miyamura, Noriko Yamamoto, Tohru Hasegawa, Atsushi Abe, Shinsuke Mitsuma