Patents Examined by Andrew J Cheong
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Patent number: 10956078Abstract: A storage system in one embodiment comprises a plurality of storage devices and a storage controller. The storage system is configured to implement a loopback replication process in which one or more source storage objects are replicated to one or more corresponding target storage objects within the storage system. The storage system is further configured to divide a storage space provided by at least portions of the storage devices of the storage system into slices, to subdivide the slices into source slices and target slices, and to replicate a source storage object associated with at least one of the source slices to a target storage object associated with at least one of the target slices. The source storage object may be associated with at least one of the source slices by, for example, storing the source storage object across portions of the storage devices in designated ones of the source slices.Type: GrantFiled: March 27, 2018Date of Patent: March 23, 2021Assignee: EMC IP Holding Company LLCInventors: David Meiri, Xiangping Chen
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Patent number: 10956083Abstract: A non-volatile memory (NVM) system receives host requests that each specify a memory operation to be performed by the NVM system, the specified memory operations including read operations and write operations, and performs a set of operations for each memory operation specified by a received host request. The set of operations performed for each such memory operation include: initiating performance the memory operation; determining a throttle interval for the memory operation in accordance with at least a first factor, corresponding to available space in a write cache of the non-volatile memory system, and a second factor, corresponding to a metric corresponding to prevalence of write operations in the memory operations specified by the received host requests; and returning to the host system a response associated with the memory operation at a time no earlier than a start time associated with the memory operation plus the determined throttle interval.Type: GrantFiled: August 31, 2017Date of Patent: March 23, 2021Assignee: Western Digital Technologies, Inc.Inventors: Mervyn Wongso, Rushang Karia, Edoardo Daelli, Jacob Schmier, Kevin Corbin, Lakshmana Rao Chintada
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Patent number: 10956335Abstract: Data blocks are cached in a persistent cache (“NV cache”) allocated from as non-volatile RAM (“NVRAM”). The data blocks may be accessed in place in the NV cache of a “source” computing element by another “remote” computing element over a network using remote direct memory access (“RMDA”). In order for a remote computing element to access the data block in NV cache on a source computing element, the remote computing element needs the memory address of the data block within the NV cache. For this purpose, a hash table is stored and maintained in RAM on the source computing element. The hash table identifies the data blocks in the NV cache and specifies a location of the cached data block within the NV cache.Type: GrantFiled: September 29, 2017Date of Patent: March 23, 2021Assignee: Oracle International CorporationInventors: Zuoyu Tao, Jia Shi, Kothanda Umamageswaran, Juan R. Loaiza
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Patent number: 10956047Abstract: The instant disclosure provides an accelerated computer system and an accelerated method for writing data into discrete pages. The accelerated method includes executing write commands, with each write command including write data and a write address such that the write address corresponds to a write page of the first pages in a sector of a hard drive, identifying whether the write pages are successive according to the write addresses, acquiring stored data by reading the sector according to the write addresses if the write pages are discrete, writing the data stored in the first pages into the second pages of a memory, writing write data bit by bit into the second pages according to the write addresses, and writing the data stored in the second pages into the first pages.Type: GrantFiled: January 29, 2016Date of Patent: March 23, 2021Assignee: ACCELSTOR TECHNOLOGIES LTDInventors: Shih-Chiang Tsao, Ting-Fang Chien, An-Nan Chang
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Patent number: 10956216Abstract: Systems and methods for memory page hints that account for multiple page sizes. An example method may comprise: determining, by a processing device executing a guest operating system, that a memory page size of the guest operating system is different from a memory page size of a hypervisor; adding, by the guest operating system, a guest memory page released by the guest operating system to a set of guest memory pages; determining in view of the memory page size of the hypervisor that the set of guest memory pages fills a hypervisor memory page; and providing an indication to the hypervisor that the hypervisor memory page is available for reuse.Type: GrantFiled: August 31, 2017Date of Patent: March 23, 2021Assignee: Red Hat, Inc.Inventors: Henri Han van Riel, Michael Tsirkin
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Patent number: 10802740Abstract: A method includes: storing a first data extent on a physical medium, wherein the physical medium is divided into a plurality of storage blocks, wherein each of the storage blocks has a size that is different than a size of the first data extent, further wherein the first data extent is stored to a first block of the plurality of storage blocks; generating a descriptor for the first data extent, wherein the descriptor indicates that the first data extent starts within the first block of the plurality of blocks and indicates an offset from the beginning of the first block at which the first data extent starts; and storing the descriptor within the first block.Type: GrantFiled: April 21, 2016Date of Patent: October 13, 2020Assignee: NETAPP, INC.Inventors: Randolph Sterns, Charles Binford, William P. Delaney, Joseph Blount, Reid Kaufmann, Joseph Moore
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Patent number: 10754556Abstract: Prioritizing virtual volumes to take offline in a thin provisioning system with garbage collection. The method categorizes virtual volumes based on garbage collection properties of their write behavior and adds metadata indicating a category of a virtual volume. The method schedules virtual volumes to be taken offline by predicting virtual volume space utilization of active virtual volumes for a defined time period in combination with estimated garbage collection in that period to determine a need to take virtual volumes offline. The method selects virtual volumes to take offline by their category to ensure that the virtual volumes producing the most garbage collection unfriendly workloads are taken offline first.Type: GrantFiled: June 27, 2017Date of Patent: August 25, 2020Assignee: International Business Machines CorporationInventors: Miles Mulholland, Ben Sasson, Gordon Hutchison, Lee J. Sanders
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Patent number: 10719403Abstract: Recovery support techniques for storage virtualization environments are described. In one embodiment, for example, a method may be performed that comprises defining, by processing circuitry, a storage container comprising one or more logical storage volumes of a logical storage array of a storage system, associating the storage container with a virtual volume (vvol) datastore, identifying metadata for a vvol of the vvol datastore, and writing the metadata for the vvol to the storage system. Other embodiments are described and claimed.Type: GrantFiled: January 31, 2016Date of Patent: July 21, 2020Assignee: NetApp Inc.Inventors: Deepak Thomas, Dan Sarisky, Nagender Somavarapu, Santosh Lolayekar
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Patent number: 10671419Abstract: A system and method of emulated input-output memory management units includes a management software associating a first device with a first input-output memory management unit having a first security designation, and associating a second device with a second input-output memory management unit having a second security designation different from the first security designation. A hypervisor constructs a table that describes associations between the plurality of devices and the plurality of input-output memory management units. The hypervisor provides the table to a guest virtual machine having a plurality of guest addresses including a first guest address and a second guest address. The first device accesses the first guest address through the first input-output memory management unit and the second device accesses the second guest address through the second input-output memory management unit.Type: GrantFiled: February 29, 2016Date of Patent: June 2, 2020Assignee: Red Hat Israel, Ltd.Inventors: Marcel Apfelbaum, Gal Hammer
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Patent number: 10664406Abstract: A method for utilizing parallel paths of differing performance to improve efficiency is disclosed. In one embodiment, such a method includes transmitting, over a faster path, a first command to perform first actions intended to improve efficiency of second actions associated with a second command. The method transmits, over a slower path in parallel with the faster path, the second command. Alternatively, a method for utilizing parallel paths of differing performance to improve efficiency includes receiving, over a faster path, a first command to perform first actions intended to improve efficiency of second actions associated with a second command. The method executes the first command to perform the first actions. The method receives, over a slower path in parallel with the faster path, the second command and executes the second command to perform the second actions. Corresponding systems and computer program products are also disclosed.Type: GrantFiled: March 21, 2017Date of Patent: May 26, 2020Assignee: International Business Machines CorporationInventors: Dale F. Riedy, Peter G. Sutton, Harry M. Yudenfriend
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Patent number: 10642496Abstract: A storage device may utilize a host memory buffer for re-ordering commands in a submission queue. Out of order commands in a submission queue that uses host virtual buffers that are not the same size may be difficult to search. Accordingly, commands in a submission queue may be correctly ordered in a host memory buffer before being put into the host virtual buffers. When the commands are in order, the search operation for specific data is improved.Type: GrantFiled: April 1, 2016Date of Patent: May 5, 2020Assignee: SanDisk Technologies Inc.Inventors: Shay Benisty, Tal Sharifie
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Patent number: 10635335Abstract: A storage system and method for adaptive scheduling of background operations are provided. In one embodiment, after a storage system completes a host operation in the memory, the storage system remains in a high power mode for a period of time, after which the storage system enters a low-power mode. The storage system estimates whether there will be enough time to perform a background operation in the memory during the period of time without the background operation being interrupted by another host operation. In response to estimating that there will be enough time to perform the background operation in the memory without the background operation being interrupted by another host operation, the storage system performs the background operation in the memory.Type: GrantFiled: June 21, 2018Date of Patent: April 28, 2020Assignee: Western Digital Technologies, Inc.Inventors: Yuval Grossman, Alexander Bazarsky, Tomer Eliash
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Patent number: 10628331Abstract: Provided are a computer program product, system, and method demote scan processing to demote tracks from cache. Tracks in the storage stored in the cache are indicated in a cache list. The cache list is scanned to determine unmodified tracks to initiate to demote. In response to processing an indicated modified track in the cache list while scanning the cache list, a destage is initiated for the processed indicated modified track and continuing to scan the cache list to determine unmodified tracks. In response to processing a number of modified tracks indicted in the cache list, a determination is made of an unmodified track in the cache list and continuing to scan, from the determined unmodified track, for unmodified tracks to initiate to demote.Type: GrantFiled: June 1, 2016Date of Patent: April 21, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin J. Ash, Lokesh M. Gupta, Sonny E. Williams
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Patent number: 10628320Abstract: Embodiments of the present disclosure support implementation of a Level-1 (L1) cache in a microprocessor based on independently accessed data and tag arrays. Presented implementations of L1 cache do not require any stall pipeline mechanism for stalling execution of instructions, leading to improved microprocessor performance. A data array in the cache is interfaced with one or more data index queues that comprise, upon occurrence of a conflict between at least one instruction requesting access to the data array and at least one other instruction that accessed the data array, at least one data index for accessing the data array associated with the at least one instruction. A tag array in the cache is interfaced with a tag queue that stores one or more tag entries associated with one or more data outputs read from the data array based on accessing the data array.Type: GrantFiled: June 3, 2016Date of Patent: April 21, 2020Assignee: Synopsys, Inc.Inventor: Thang Tran
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Patent number: 10579540Abstract: A system and method for improving storage system operation is disclosed. A storage system includes a first tier with high-performance redundancy and a second tier with capacity efficient redundancy. The first tier and the second tier are built from the same storage devices in a storage pool so each storage device includes both the first and second tiers. The storage system stores write data initially to the first tier. When demand for the data falls below a threshold, the storage system migrates the write data to the second tier. This is done by changing the mapping of underlying physical locations on the storage devices where the write data is stored so that the underlying physical locations are logically associated with the second tier instead of the first tier. After remapping, the storage system also computes parity information for the migrated write data and stores it in the second tier.Type: GrantFiled: January 29, 2016Date of Patent: March 3, 2020Assignee: NETAPP, INC.Inventors: Brian D. McKean, Arindam Banerjee, Kevin Kidney
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Patent number: 10579281Abstract: A method for storing a data segment in a storage tier of a storage unit comprising at least two storage tiers includes receiving the data segment to be stored including metadata; receiving metadata of data segments stored in the storage unit; and determining the storage tier to store the received data segment to and a protection level dependent on the metadata received and dependent on the metadata of the received data segment.Type: GrantFiled: August 18, 2015Date of Patent: March 3, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Giovanni Cherubini, Ilias Iliadis, Jens Jelitto, Vinodh Venkatesan
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Patent number: 10521118Abstract: A method for write aggregation using a host memory buffer includes fetching write commands and data specified by the write commands from a host over a bus to a non-volatile memory system coupled to the host. Writing the data specified by the write commands from the non-volatile memory system over the bus to the host. The method further includes aggregating the data specified by the write commands in a host memory buffer maintained in memory of the host. The method further includes determining whether the data in the host memory buffer has aggregated to a threshold amount. The method further includes, in response to determining that the data has aggregated to the threshold amount, reading the data from the host memory buffer to the non-volatile memory system and writing the data to non-volatile memory in the non-volatile memory system.Type: GrantFiled: July 13, 2016Date of Patent: December 31, 2019Assignee: SANDISK TECHNOLOGIES LLCInventors: Shay Benisty, Tal Sharifie
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Patent number: 10482010Abstract: An embodiment of a memory apparatus may include a persistent host memory buffer, and a memory controller communicatively coupled to the persistent host memory buffer to control communication between the persistent host memory buffer and a persistent storage media device. Other embodiments are disclosed and claimed.Type: GrantFiled: June 29, 2017Date of Patent: November 19, 2019Assignee: Intel CorporationInventors: James A. Boyd, John W. Carroll, Sanjeev N. Trika
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Patent number: 10482008Abstract: In one example, reclaiming obsolete regions includes a memory organized in aligned memory blocks and storing valid variables in valid regions and obsolete variables in the obsolete regions. A memory includes a buffer region to cache the memory. A controller can search the buffer region for the obsolete regions and pair with respective valid regions and determine if start addresses of the obsolete regions are memory aligned and if not aligned, to write a small portion content of a first valid region to the start address of the aligned memory block, and to write any remaining respective valid region beginning at the start address of the aligned memory block and in multiples of the aligned memory block. Upon completion of a writing, moved respective valid regions begin at the starting address of the obsolete regions and new obsolete regions begin at end addresses of the moved respective valid regions.Type: GrantFiled: January 23, 2015Date of Patent: November 19, 2019Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventors: Terry Ping-Chung Lee, XinLai Yu, Yi Liu
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Patent number: 10379965Abstract: There is provided a data distribution storing method including: recognizing, by a cluster manager managing a cluster of a plurality of nodes, a vehicle storage installed in a vehicle; transmitting, by the cluster manager, a vehicle index request including identification information about the vehicle storage to an index server; receiving, by the cluster manager, a first vehicle index including information about a first time section during which first vehicle data is recorded in the vehicle storage from the index server; selecting, by the cluster manager, a node from the cluster; transmitting, by the vehicle storage, second vehicle data recorded in the vehicle storage during a second time section which is after the first time section, to the node; generating, by the cluster manager, a second vehicle index based on the first vehicle index and information about the second time section and the node.Type: GrantFiled: October 11, 2016Date of Patent: August 13, 2019Assignee: HANWHA TECHWIN CO., LTD.Inventors: Durga Prasad Jujjuru, Joon Young Kim, Sek Rai Hong, Eun Min Kim