Abstract: A method, system, and apparatus for reestablishing communications between a host and a service processor after the service processor has ceased to function correctly is provided. In one embodiment, the host exchanges heartbeat signals with the service processor. The heartbeat signals indicate that the service processor is active and functioning. In response to a failure to receive a heartbeat signal or in response to some other indication that the service processor is not performing correctly, the host causes a hard reset of the service processor. In addition, the service processor can detect a failure within itself and initiate a hard reset to itself. After the hard reset, the service processor returns to a monitoring mode without performing initial tests of the data processing system. Furthermore, the data processing system remains active and is not shut down during the hard reset of the service processor.

Abstract: A system and method for enhancing the functionality of a dual opposing ISA/PCI bus alarm card of an industrial computer where the alarm card includes a microserver for communicating with web-enabled information on the host computer.

Abstract: A system and method for self-diagnosing a likely cause of a system crash is disclosed. A mechanism within an operating system checks for the existence of a stop code at startup of the machine. The existence of the stop code indicates that the system crashed during the previous session, and the type of system crash. The mechanism may read the stop code and implement a self-diagnostic procedure that corresponds to that stop code. In this manner, the mechanism may automate many of the tasks normally performed by humans, such as a system administrator, to self-diagnose the likely cause of the crash. If the crash occurs again, the mechanism, through the tracking procedures automatically implemented, may identify and report to a system administrator the likely cause of the crash, e.g. the particular faulty driver or configuration error.

Abstract: A method and apparatus for providing fault detection in an Advanced Process Control (APC) framework. A first interface receives operational state data of a processing tool related to the manufacture of a processing piece. The state data is sent from the first interface to a fault detection unit. A fault detection unit determines if a fault condition exists with the processing tool based upon the state data. A predetermined action is performed on the processing tool in response to the presence of a fault condition. In accordance with one embodiment, the predetermined action is to shutdown the processing tool so as to prevent further production of faulty wafers.

Abstract: A system and method are disclosed for aiding a field engineer in the field such as at a remote service facility in analyzing a fault log of a malfunctioning machine such as a locomotive. The method includes obtaining data associated with operation of the malfunctioning machine from a user at a second computing unit coupled via a communications network such as the Internet to a first computing unit such as a centrally located server operable to provide data associated with analysis of the malfunctioning machine, and providing at the second computing unit at least one of a diagnosis of and a repair for the malfunctioning machine based on the data associated with the operation of the malfunctioning machine and the data associated with analysis of the malfunctioning machine.

Abstract: A method for preserving data resident in a volatile memory of a data storage unit having at least one rotatable disk platter in the event of an interruption of a primary supply power. The method includes monitoring the status of the primary supply power to the data storage unit. Following the detection of a loss of the primary supply power, kinetic energy inherent in the spinning disk platter is converted into electrical energy. Electrical energy derived from the kinetic energy of the disk platter is then utilized to power the data storage unit to write the data in the volatile memory to an outer-most track of the rotatable disk platter.

Abstract: In a novel method for controlling a disk apparatus having an interface, command storage, and data storage, one or more commands are received from an external apparatus via the interface, and the one or more commands are held in the command storage. A command to be next executed is selected from among the one or more commands and dispatched for execution. It is determined whether an error relating to accessing the data storage has arisen during execution of the selected command. If so, the selected command is restored to the command storage. A subsequent command to be next executed may then be selected. In one described embodiment, an estimated seek time for the selected command is determined, and it is judged that an error has arisen if actual seek time of the selected command exceeds the estimated seek time.

Abstract: One embodiment is a method of detecting BIOS corruption that does not require reprogramming of the boot block or calculation of cyclic redundancy (“CRC”) codes. A simple check is performed using only the first byte or bytes of BIOS to be erased (“First Byte”) and the last byte or bytes of BIOS to be programmed (“Last Byte”) during reprogramming. Specifically, if both the First and Last Bytes are programmed, indicating either that erasure did not occur or that reprogramming was successful, the BIOS is not corrupt and no remedial action need be taken. If the First Byte is erased and the Last Byte is programmed, indicating that a failure occurred during erasure, the BIOS is corrupt and remedial action must be taken. Similarly, if the First Byte is programmed and the Last Byte is erased, indicating that a failure occurred during reprogramming, the BIOS is corrupt and remedial action must be taken.

Abstract: A test method and apparatus allows simultaneous loading of multiple scan chains via a single common scan-in port (SDI) and a scan clock signal SCAN CLOCK. Data is scanned into one or more scanpaths from a scan data in (SDI) port under the control of a clock signal, either directly or indirectly through a linear feedback shift register (LFSR). Scan-out data output from the scanpaths may be read at the scan data out (SDO) port, either directly or indirectly through a signature register with optional masking functionality.

Abstract: The method defines steps and sequences for dealing with peripheral units reported as defective in a communications system. A repetition counter for counting a number of start-up attempts is provided for a restarting procedure. During a locked phase, the peripheral unit that is affected is temporarily taken out of service. After that, a monitoring phase with a temporary start-up is initiated during which tests for faults are carried out. If the unit is determined to be free from faults, a final start-up takes place following the monitoring phase. In the case of a fault during the monitoring phase, the count of the repetition counter is compared with a threshold value. A final taking-out-of-service takes place if the count of the repetition counter exceeds the threshold value. Otherwise, the repetition counter is incremented and another transition into the locked phase takes place. The duration of the locked phase is dependent on the count of the repetition counter.

Abstract: A system and method for performing a data backup with a stochastic scheduler in a distributed computing environment are described. A data set on a client is tracked. The data set is to be maintained with a backup data set on a centralized server within the distributed computing environment. A time period during which to initiate a data backup session for the tracked data set is selected. An instance of a backup session application on the client is periodically executed. The client attempts to initiate a connection with the centralized server beginning at a random start time during the selected time period. The client regularly reattempts the connection initiation following each failed connection initiation attempt. The tracked data set is selectively copied into the backup data set upon a successful connection initiation. Upon each successful data backup session for the tracked data set, a new random start time within the selected time slice for a next data backup session is generated.

Abstract: When a data update request is sent from a host computer, a main controller determines one of a plurality of disk cache units, which is used, in accordance with a striping group to which a stripe corresponding to the requested update data belongs. The main controller loads the block data, required for generating updated parity data for the stripe in units of blocks, in a parity generator in the corresponding disk cache unit via a cache memory in the determined disk cache unit. The corresponding parity generator generates corresponding parity data.

Abstract: A program development support system scans a program beforehand, extracts an essential process specification that should be actualized by an individual program and automatically extracts a part of the program that is not coincident with the process specification. A method of verifying an execution program executed by a computer for generating the execution program into blocks each including one or more processes and defined as a part of the program, which correspond to a verifying specification for verifying the program, generating a plurality of combinations of the two or more blocks as check route corresponding to the verifying the specification, and extracting the process corresponding to the verifying specification executed in a predetermined number or greater number of check routes, as a process specification that should be executed also in other check route.

Abstract: One embodiment of the invention is directed to a data processing system that includes an electrical detection circuit to determine whether the electrical power is going from “on” to “off,” or changing from “off” to “on;” a peripheral device, including a processor to calculate the amount of electrical energy required for the peripheral device to perform a task; a task queue for the peripheral device that can be read to find a task if the electrical power is going from “on” to “off;” and a non-volatile memory, including a task queue to store data describing the task if insufficient electrical energy remains available to the peripheral device to complete the task.

Abstract: The present invention incorporates built-in self test and self repair functionality into a semiconductor memory device in which reconfiguration data used to replace faulty memory is stored at the same time testing to identify other faulty memory cells continues. To avoid access contention conflicts to a content addressable memory used to identify rows or groups of rows having faulty memory cells, the built in test function writes test data to each cell at least twice before reading the stored data. By writing twice before reading, contention problems caused by simultaneous updating of the content addressable memory are avoided. That is, even if the content addressable memory is initially unavailable to process address information used to access a memory cell to be tested, repetition of the write process ensure that the data will be properly stored when the memory again becomes available after being updated.

Abstract: New failure detector mechanisms particularly suitable for use in asynchronous distributed computing systems in which processes may crash and recover, and two crash-recovery consensus mechanisms, one requiring stable storage and the other not requiring it. Both consensus mechanisms tolerate link failures and are particularly efficient in the common runs with no failures or failure detector mistakes. Consensus is achieved in such runs within 3□ time and with 4n messages, where □ is the maximum message delay and n is the number of processes in the system.

Abstract: A method for testing a keyboard complied with a language code table comprises the steps of reading an embedded language code of the keyboard to be tested through a central processing unit (CPU), comparing the read language code with the language code table stored in memory in order to determine whether there is a matched one, reading an application program interface (API) function from the keyboard to be tested by the CPU, identifying a type of the keyboard to be tested by a “Get Keyboard Type” of the API function, reading exchange codes of special keys from the keyboard to be tested by the CPU, identifying a model of the keyboard to be tested, selecting a keyboard test software corresponding to the language code, the type, and the model of the keyboard to be tested from a test software database stored in memory, and performing a test on each key on the keyboard by the selected keyboard test software.

Abstract: A unified policy management system for an organization including a central policy server and remotely situated policy enforcers. A central database and policy enforcer databases storing policy settings are configured as LDAP databases adhering to a hierarchical object oriented structure. Such structure allows the policy settings to be defined in an intuitive and extensible fashion. Changes in the policy settings made at the central policy server are automatically transferred to the policy enforcers for updating their respective databases. Each policy enforcer collects and transmits health and status information in a predefined log format and transmits it to the policy server for efficient monitoring by the policy server. For further efficiencies, the policy enforcement functionalities of the policy enforcers are effectively partitioned so as to be readily implemented in hardware.

Abstract: One aspect of the present invention concerns an apparatus comprising a circuit that may be configured to present a connection signal. The connection signal may be configured to automatically disconnect and reconnect a peripheral device from a host in response to one or more errors. In another aspect of the present invention the connection signal may be configured to shift a configuration of a peripheral device in response to one or more errors.

Abstract: A protocol analyzer for a test system has a control system coupled to a first interface and a second interface. The first interface receives a packet from a packet network. The control system receives the packet from the first interface and either deletes the packet or transfers the packet to the second interface based on a destination address in the packet. The second interface transfers the packet to another protocol analyzer. The destination address could be a MAC address.