Patents Examined by Anne L. Damiano
  • Patent number: 6658603
    Abstract: A method and apparatus for efficiently generating engine error codes is disclosed. An error processing system according to the present invention includes an error table describing error states for use in generating error codes based upon the an error even, an engine for providing an error event and an error processor, coupled to the engine and the error table, the error processor including a general run time error generator for generating a list of errors according to the error table. Accordingly, modifications may be made to the error table for changes to the product error specification and for new products that do not necessitate a re-coding of the error processing system.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventor: David Ward
  • Patent number: 6654905
    Abstract: A method for detecting a fault condition in a computer processor operating a main control program, comprising the steps of sequentially performing a plurality of functions on an initial input value so as to compute a final value, the input value to each of the second and subsequent functions being provided by the output value from the preceding function in the sequence; loading at least one self-test module onto the computer processor for detecting whether a fault condition has occurred in the computer processor, wherein at least one of the functions is carried out within a self-test module; and comparing the computed final value with a predetermined value to provide an indication of whether a fault condition has occurred in the computer processor. The invention also relates to an apparatus for detecting a fault condition in a computer processor.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: November 25, 2003
    Assignee: Lucas Industries Limited
    Inventor: Francis B Dickens
  • Patent number: 6636985
    Abstract: A disk storage device is disclosed for avoiding the instantaneous performance degradation as much as possible, and a method for processing a defective sector in such a disk storage device. There is executed a predetermined check related to a function of the disk storage device, preferably at least one of a read test, a write servo test, or a write test, when the disk storage device is in a waiting state where the disk storage device has no access from a host. The read test and write servo test are used to search for a defective sector on a disk and reassign the defective sector. The write test is used to indicate an abnormal condition of a head. Furthermore, the disk storage device includes a detector for detecting the waiting state, and a check logic for executing a predetermined check.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: October 21, 2003
    Assignee: International Business Machines Corporation
    Inventors: Hiroyuki Ono, Hideo Asano, Atsushi Kanamaru
  • Patent number: 6633999
    Abstract: An integrated circuit with on-chip resources to support the testing of data stored on the integrated circuit includes logic to compute a check code using data, or a combination of data and addresses, of a particular data set stored on the device. The check code produced using the stored version of the data set is compared with a test code produced using a correct version of the data set, to indicate whether the correct data set was successfully stored on the device. An on-chip store holds the code produced using the correct version, and an on-chip comparator is used to produce a flag indicating the success or failure of the test. During manufacturing of the device, the memory tester simply tests the flag.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: October 14, 2003
    Assignee: Macronix International Co., Ltd.
    Inventor: Wen-Chieh Lee
  • Patent number: 6629265
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to precisely generate a reset when the apparatus is in a first operational mode. The second circuit may be configured to generate the reset when the apparatus is in a second operational mode.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: September 30, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventor: Timothy J. Williams
  • Patent number: 6629270
    Abstract: A method and device for initializing a plurality of fail silent computer nodes, coupled to a communication media; the plurality of fail silent computer nodes are adapted to exchange data frames via the communication media. The initialization is based upon sending an initialization word for synchronizing the plurality fail silent computer nodes. The transmission of an initialization word depends upon the state of the computer system and especially the status of the communication media.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: September 30, 2003
    Assignee: Motorola, Inc.
    Inventors: Einat Ophir, Izak Goldfarb, Itzhaki Barak
  • Patent number: 6625761
    Abstract: One aspect of the present invention concerns an apparatus comprising a circuit that may be configured to present a connection signal. The connection signal may be configured to automatically disconnect and reconnect a peripheral device from a host in response to one or more errors. In another aspect of the present invention the connection signal may be configured to shift a configuration of a peripheral device in response to one or more errors.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: September 23, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: Ronald H. Sartore, Steven P. Larky
  • Patent number: 6622266
    Abstract: A user interface is provided to receive electronic mail addresses for printer alert notification recipients. The alert notifications to be received by each individual recipient are designated based on the underlying alert condition prompting the alert. Once all desired recipients and corresponding alert notifications have been specified, this alert notification configuration is implemented for one or more printers within a group of monitored printers.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: September 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Joan Stagaman Goddard, Thomas Michael Ruehle, Susan Ruth Scruggs
  • Patent number: 6615368
    Abstract: There is disclosed a data processor having improved debugging features that output from the data processor selected instructions, data, or addresses in response to the occurrence of one or more of events in the data processor. The events include execution of a branch instruction, detection of a trigger value on an internal bus, or execution of a unique spray instruction.
    Type: Grant
    Filed: January 4, 2000
    Date of Patent: September 2, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Frederick S. Dunlap
  • Patent number: 6611925
    Abstract: A method and system for on-access virus scanning within an enterprise or in a workgroup, where all users are authenticated against a trusted certificate authority. The first time an item, such as an executable file or document, is accessed, it is scanned for viruses, worms, trojan horses, or other malicious code, and, after the item is determined to be free from threats or is corrected, a certificate noting this information is generated. At the same time a Globally Unique Identifier (“GUID”) is generated and appended to the item. The certificate contains various information, including the identity of the scanner that performed the virus check, as well as a means for determining if the original item has been altered since it was scanned, and is stored in a certificate database. The GUID is used as a pointer for locating the certificate. A subsequent user who accesses the item will detect the GUID and can use the GUID to locate the certificate for the item.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: August 26, 2003
    Assignee: Networks Associates Technology, Inc.
    Inventor: Paul Spear
  • Patent number: 6606714
    Abstract: A disk drive is disclosed for receiving a write command from a host computer, the write command comprising a plurality of logical block addresses (LBAs) and a plurality of data blocks. The plurality of data blocks comprises at least one non-relocated data block (NRDB) and at least one relocated data block (RDB), and at least one of the LBAs corresponds to the NRDB and at least one of the LBAs corresponds to the RDB. The disk drive comprises a disk comprising a plurality of first disk locations each having a defect, a plurality of second disk locations for storing NRDBs, and a plurality of spare disk locations for storing RDBs. A defect list is used to map LBAs from the plurality of first disk locations to the plurality of spare disk locations. A cache is logically partitioned into a first set of memory locations managed using a first cache data structure, and a second set of memory locations managed using a second cache data structure.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: August 12, 2003
    Assignee: Western Digital Technologies, Inc.
    Inventor: Gregory B. Thelin
  • Patent number: 6606717
    Abstract: The present invention may be embodied in a cache control method for caching disk data in a disk drive configured to receive commands for both streaming and non-streaming data from a host. A lossy state record is provided for memory segments in a cache memory. The lossy state record allows hosts commands to be mixed for streaming and non-streaming data without flushing of cache data for a command mode change.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: August 12, 2003
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sharon H. Yu, Gary K. Laatsch, Quoc N. Dang