Abstract: The invention relates to a circuit arrangement and to a method for testing same. A circuit arrangement is provided that includes a plurality of functional units which are coupled by at least one streaming data bus. Each of the functional units includes a plurality of hardware modules and a switch matrix. At least one of the streaming data busses is provided with a data width of at least that of the widest hardware module of any of the functional units of the circuit arrangement. The switch matrices are configurable to establish a streaming data path between and through the plurality of functional units which is used as a test link for any of the hardware modules of the circuit arrangement. The invention provides for non-intrusive real-time tracing in SoCs with a minimum of additional hardware resources and at low cost in terms of die size and power consumption.

Abstract: A computer-implemented method of handling a current email messaging campaign to be broadcast to increase a deliverability parameter regarding a percentage of the campaign which has been successfully delivered is described. The email messaging campaign comprises a plurality of email messages with the same message content and a plurality of different email addresses to send the message content to.

Abstract: Enabling remote debugging of virtual machines, in one aspect, may comprise attaching a debug virtual machine to a target virtual machine deployed in a virtualized environment. Interactions and/or access to the target virtual machine may be performed via the attached debug virtual machine. The debug virtual machine may be created and attached to the target virtual machine in response to receiving a request to debug the target machine, for example, from a remote user of the target virtual machine.

Abstract: A method begins by a dispersed storage (DS) processing module detecting, in accordance with a rebuilding process, a storage error of an encoded data slice stored in a storage node of a dispersed storage network (DSN) and identifying the encoded data slice for rebuilding. The method continues with the DS processing module identifying one or more storage traits associated with the encoded data slice and identifying encoded data slices having at least one storage trait in common with the one or more storage traits of the encoded data slice to produce identified encoded data slices. The method continues with the DS processing module prioritizing storage error detection analysis of the identified encoded data slices over other encoded data slices stored in the DSN and when a storage error is detected for one of the identified encoded data slices, identifying the one of the identified encoded data slices for rebuilding.

Abstract: The present invention relates generally to networking, and more particularly to techniques and products for verifying, qualifying and/or quantifying the performance of networking devices and infrastructure. According to certain aspects, test equipment according to embodiments of the invention performs stress tests using both client and server emulation with very low overhead, providing a virtually unlimited number of servers and/or clients. According to further aspects, tests include the transfer of real files between clients and servers, not just test patterns. According to further aspects, test equipment includes an easy to use Web GUI interface. According to further aspects, tests are performed using TCP protocol, which is the predominant form of network traffic.

Abstract: Described herein is a technology for a dashboard used for visualizing data. In some implementations, a dashboard with one or more dashboard item is provided. Performance of the dashboard is evaluated to determine a load time of the dashboard. Possible suggestions for improving performance of the dashboard are provided if performance issues are determined from evaluating performance of the dashboard.

Abstract: An apparatus includes a processing unit including a configuration memory and self-scrubber logic coupled to read the configuration memory to detect compromised data stored in the configuration memory. The apparatus also includes a watchdog unit external to the processing unit and coupled to the self-scrubber logic to detect a failure in the self-scrubber logic. The watchdog unit is coupled to the processing unit to selectively reset the processing unit in response to detecting the failure in the self-scrubber logic. The apparatus also includes an external memory external to the processing unit and coupled to send configuration data to the configuration memory in response to a data feed signal outputted by the self-scrubber logic.

Abstract: Techniques are disclosed that include a computer-implemented method, including storing information related to an initial state of a process upon being initialized, wherein execution of the process includes executing at least one execution phase and upon completion of the executing of the execution phase storing information representative of an end state of the execution phase; aborting execution of the process in response to a predetermined event; and resuming execution of the process from one of the saved initial and end states without needing to shut down the process.

Abstract: A data processing apparatus for generating running performance information indicative of a running state of at least one device, has a data storage process section that obtains device state information indicative of a result of detection of a state of the at least one device, and obtains operational activity performer information indicative of a result of detection of whether an operational activity performer that performs an operational activity to the at least one device or an operational activity with the at least one device is present at a predetermined position for the operational activity performer to do the operational activity on the at least one device or the operational activity with the at least one device, and causes the device state information and the operational activity performer information to be stored in a result-of-detection storage.

Abstract: Provided are a system and a method for monitoring a web service. The web service monitoring system includes a management module configured to provide an interface for receiving an test scenario and a policy for a simulation test of a target system from an administrator and outputting the simulation test result of the target system to the administrator, a database configured to store the received policy and test scenario, and an agent configured to access the target system according to the test scenario and the policy stored in the database and carry out the simulation test of the target system.

Abstract: An information processing device, including: a memory; a processing unit which operates a virtual machine, an operating system which is executed on the virtual machine, and a hypervisor which controls the virtual machine; and a control unit which controls a system including the memory and the processor. The processing unit stops the operating system when detecting an error of the hypervisor, notifies the control unit of a first memory area used by the hypervisor, stops the hypervisor, changes a memory area used by the hypervisor into a second memory area different from the first memory area notified by the control unit, starts the hypervisor using the second memory area as an available area, starts the operating system, and reads data in the first memory area, and writes the data to a file as a dump file of the hypervisor.

Abstract: An apparatus, system, and method are disclosed for configuring a plurality of storage devices for a RAID and setting a time-out value for the plurality of storage devices, determining whether a response time for a storage device of the plurality of storage devices exceeds the time-out value, and recovering data from the RAID in response to the storage device exceeding the time-out value.

Abstract: A method and computer-readable storage media are provided for managing resources of a first node. The method may include detecting a failure in a first node. The first node may include one or more cores and supporting resources. The method may further include determining that one or more cores in the first node survived the failure. The method may further include determining that any supporting resources survived the failure. The method may also include reconfiguring a second node to add the surviving supporting resources of the first node using communication interface between the first and second node if the determinations found a surviving core and surviving supporting resource in the first node.

Abstract: An information processing apparatus manages activation of a program by a task which is a unit of execution, and executes a task for each sequence in units of process block. The information processing apparatus has a nonvolatile memory which keeps an execution state management table. The execution state of the process block is stored in the execution state management table. The control unit performs a first activation procedure which initializes the execution state management table and, while updating the execution state in the execution state management table, executes the task. When activation by the first activation procedure has failed, the control unit performs activation by a second activation procedure and identifies a suspicious sequence. When activation by the second activation procedure has failed, the control unit performs activation by a third activation procedure and identifies a suspicious task.

Abstract: A functional simulator with watchpoint support includes a CPU having a first-level DMI cache, a watchpoint manager having a second-level DMI cache, an interconnect module, and a memory controller. The simulator is operated by a front-end tool. Watchpoints corresponding to a predetermined memory addresses are set by the front-end tool and stored as a watchpoint address list in the watchpoint manager. When a memory access request is received by the first-level DMI cache, after a failure to complete the memory access request, the CPU transmits the request to the watchpoint manager. The watchpoint manager searches for a memory address associated with the memory access request in the watchpoint address list. If a match is found, the watchpoint manager generates a watchpoint hit signal and notifies the front-end tool.

Abstract: Techniques and mechanisms detect deviations from a protocol being used to communicate between devices, for example, in hard logic (e.g., implemented as an ASIC or fixed circuitry) and soft logic (e.g., implemented in configurable logic of an FPGA). Techniques and mechanisms are described for detecting a variety of deviations from a protocol.

Abstract: Aspects of the invention may involve systems, methods, and computer readable medium. In an embodiment, a telecommunications network may contain telecommunications probes capable of generating detailed records describing network events. The telecommunications probes may be coupled to computer processors and/or memory. The memory may store detailed records created by the probes and instructions executable by the processors.

Abstract: The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more methods can include, for example: receiving a number of sectors of data to be written to a number of memory devices; appending first metadata corresponding to the number of sectors and including first integrity data to the number of sectors, the first metadata has a particular format; generating second integrity data to be provided in second metadata, the second integrity data corresponding to at least one of the number of sectors (wherein the second metadata has a second format); and generating third integrity data to be provided in the second metadata, the third integrity data including error data corresponding to the second integrity data and the at least one of the number of sectors.

Abstract: In a method for processing system events of a computing device, the computing device includes a basic input and output system (BIOS) and a baseboard management controller (BMC). The method allocates revised storage blocks in the BMC, for storing normal system events of the computing device, and a backup storage block in the BMC for storing error system events of the computing device. The method detects a error system event via the BMC, and records the error system event into the backup storage block of the BMC. The method obtains the error system event from the backup storage block of the BMC via the BIOS when the computing device is rebooted, and processes the error system event to reboot the computing device using a normal system event stored in the revised storage blocks of the BMC.

Abstract: A mechanism is provided for identifying failed components during data collection. For each data source combination in a plurality of data sources, a determination is made as to whether a standard deviation (?) for an estimated collection interval of the data source is above a predetermined standard deviation threshold (?th). Responsive to the standard deviation (?) for the estimated collection interval of the data source being above the predetermined standard deviation threshold (?th), an error signal is generated indicating an error in data collection with the data source.