Patents Examined by Chae Ko
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Patent number: 9037925Abstract: A hardware device detects change messages broadcast within a system. The system includes the hardware device, one or more controller devices, one or more expander devices, and one or more target devices interconnected among one another. The hardware device determines whether the change messages were broadcast within the system every first period of time or less for at least a second period of time, the first period of time less than the second period of time. In response to determining that the change messages were broadcast within the system every first period of time or less for at least the second period of time, the hardware devices signals that an error has been detected.Type: GrantFiled: November 30, 2010Date of Patent: May 19, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael G. Myrah, Balaji Natrajan
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Patent number: 9037927Abstract: Events which have occurred in storage systems can be managed easily regardless of complexity of a storage configuration. An event notification system 1 includes: an event notifying client 133 for detecting the occurrence of an event(s) in volumes of a storage system 10; a management application server 20 for storing information about the occurred event as setting/failure information 21; and an event information aggregation server 30 for creating and managing event information 31 including an event key 311 for associating the occurred event with the setting/failure information 21. When the event information aggregation server 30 in such an event notification system 1 notifies an administrator terminal 50 of the event key 311 and an administrator selects the event key 311, the management application server 20 has the administrator terminal 50 display an event browse screen 52 indicating the relativity of a volume, in which the event occurred, to a volume in which a related event occurred.Type: GrantFiled: October 4, 2012Date of Patent: May 19, 2015Assignee: Hitachi, Ltd.Inventors: Toshimichi Kishimoto, Shinichiro Kanno
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Patent number: 9032240Abstract: A method and system for providing high availability services to SCTP applications is disclosed. In one embodiment, a high availability (HA) server system includes an active server and a standby server with a primary redundancy module and a secondary redundancy module, respectively, which are operable for performing a method including forming a control channel between the active server and the standby server, forwarding IP addresses of the active server and the standby server to a client device when an association between the client device and the active server is established, synchronously mirroring a state of a SCTP stack and a state of an application of the active server to the standby server using the control channel, and servicing the client device using the standby server based on the state of the SCTP stack and the state of the application if a failure of the active server is detected.Type: GrantFiled: April 23, 2009Date of Patent: May 12, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Anil Kumar Reddy Sirigiri, Chaitra Maraliga Ramaiah
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Patent number: 9026858Abstract: A testing server performs a test to check whether servers properly execute failover. The testing server includes a generation unit, a transmitting unit, a testing unit, a restoring unit, a judgment unit, and a power control unit. The generation unit generates an image file of an OS. The transmitting unit transmits the image file to to-be-tested servers. The testing unit injects a simulated fault into a server among the servers to which the image file is transmitted and performs a test. The restoring unit, each time the testing unit performs a test, restores a status of the to-be-tested server to a pre-failover status. The judgment unit judges whether the restoring unit properly restores the status. The power control unit, when the judgment unit judges that the status of the to-be-tested server is not properly restored, turns off power of the to-be-tested server and turns on the power again.Type: GrantFiled: June 16, 2014Date of Patent: May 5, 2015Assignee: Fujitsu LimitedInventors: Susumu Rikitake, Ikuo Shimada
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Patent number: 9026837Abstract: Placing an application on a node in a cluster. A method includes detecting an unexpected event indicating that an application should be placed on a node in the cluster. Real time information about resource utilization on one or more nodes in the cluster is received. Based on the real time information, a determination of a node to place the application is made. The application is placed on the determined node.Type: GrantFiled: September 9, 2011Date of Patent: May 5, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Amitabh Prakash Tamhane, Mykyta Synytskyy, Lokesh S Koppolu, David A. Dion, Andrea D'Amato
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Patent number: 9021299Abstract: Techniques are disclosed that include a computer-implemented method, including storing information related to an initial state of a process upon being initialized, wherein execution of the process includes executing at least one execution phase and upon completion of the executing of the execution phase storing information representative of an end state of the execution phase; aborting execution of the process in response to a predetermined event; and resuming execution of the process from one of the saved initial and end states without needing to shut down the process.Type: GrantFiled: February 18, 2011Date of Patent: April 28, 2015Assignee: Ab Initio Technology LLCInventors: Bryan Phil Douros, Joseph Skeffington Wholey, III
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Patent number: 9015535Abstract: An information processing apparatus that executes an operating system, the apparatus including a panic process unit configured to stop the operating system when the operating system has detected an error, a mapping process unit configured to assign, to the operating system stopped by the panic process unit, a second memory area which is other than a first memory area being used by a kernel of the operating system before stop or by a hypervisor that controls the operating system before stop of the operating system, a reactivation process unit configured to reactivate the operating system by using the second memory area as a usage area, and a memory dump process unit configured to read data in the first memory area, and to write the data to a dump file after the operating system is reactivated.Type: GrantFiled: June 25, 2013Date of Patent: April 21, 2015Assignee: Fujitsu LimitedInventors: Hiroshi Kondou, Kenji Okano
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Patent number: 9009541Abstract: A system and method for efficiently storing traces of multiple components in an embedded system. A system-on-a-chip (SOC) includes a trace unit for collecting and storing trace history, bus event statistics, or both. The SOC may transfer cache coherent messages across multiple buses between a shared memory and a cache coherent controller. The trace unit includes a trace buffer with multiple physical partitions assigned to subsets of the multiple buses. The number of partitions is less than the number of multiple buses. One or more trace instructions may cause a trace history, trace bus event statistics, local time stamps and a global time-base value to be stored in a physical partition within the trace buffer.Type: GrantFiled: August 20, 2012Date of Patent: April 14, 2015Assignee: Apple Inc.Inventors: Manu Gulati, James D. Ramsay, Kevin R. Walker
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Patent number: 9003224Abstract: A data storage system configured to manage unreliable memory units is disclosed. In one embodiment, the data storage system maintains an unreliable memory unit list designating memory units in a non-volatile memory array as reliable or unreliable. The unreliable memory unit list facilitates management of unreliable memory at a granularity level finer than the granularity of a block of memory. The data storage system can add entries to the unreliable memory unit list as unreliable memory units are discovered. Further, the data storage system can continue to perform memory access operations directed to reliable memory units in blocks containing other memory units determined to be unreliable. As a result, the operational life of the data storage system is extended.Type: GrantFiled: April 25, 2012Date of Patent: April 7, 2015Assignee: Western Digital Technologies, Inc.Inventors: Jing Booth, Mei-Man L. Syu
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Patent number: 9003241Abstract: A method is performed in a requester device that is coupled with a responder device by a serial interface. The method is one of selecting an approach to handle an error in a request-response communication between the requester and responder devices over the serial interface. The method includes transmitting a request packet, of the request-response communication, over the serial interface, based on a request from an application that is executing on a logical processor. The method includes reporting the error in the request-response communication to an application-layer module. The method includes selecting an error handling approach, of a plurality of error handling approaches, which is to be used to handle the error, with the application-layer module.Type: GrantFiled: February 1, 2013Date of Patent: April 7, 2015Assignee: Telefonaktiebolaget L M Ericsson (Publ)Inventors: Sunden Chen, Patrick Wang, Michael Feng, Peter Klikovits, Edward Ho
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Patent number: 8990630Abstract: A server having a plurality of system boards, comprising: a panic processing unit configured to stop (panic) the server; a system board information storage unit configured to store information to identify a system board having a memory used by a kernel; a system board detaching processing unit configured to detach the system board having the memory used by the kernel before server stoppage; and a reboot processing unit configured to reboot the server using system boards other than the separated system board among the plurality of system boards, after detaching the system board having the memory used by the kernel.Type: GrantFiled: January 3, 2012Date of Patent: March 24, 2015Assignee: Fujitsu LimitedInventors: Hiroshi Kondo, Ryo Tabei, Kenji Gotsubo
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Patent number: 8990631Abstract: Approaches for a packet format for error reporting in a content addressable memory (CAM) device are disclosed. The CAM device may comprise a CAM array that includes a plurality of rows, each row including a plurality of CAM cells coupled to a match line, and an error notification circuit capable of forming a packet that indicates whether the CAM device is experiencing an error condition. If an error condition was experienced by the CAM device, the response packet may also indicate the type(s) of error that was encountered. Advantageously, information about any error condition experienced by the CAM device may be quickly ascertained by a host device in which the CAM device is incorporated.Type: GrantFiled: March 3, 2011Date of Patent: March 24, 2015Assignee: Netlogic Microsystems, Inc.Inventor: Shankar Channabasappa
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Patent number: 8984342Abstract: Method and system for a test process. The method may include performing tests on one or more units under test (UUTs). At least one test on one or more UUTs may be performed. A signal may be acquired from the UUT. A reference signal may be retrieved. The reference signal may be derived from a transmitted signal characteristic of the UUT. The signal may be analyzed with respect to the reference signal. Results, useable to characterize the one or more UUTs, from performing the at least one test on the one or more UUTs may be stored. The reference signal may be derived from an initial test and may be stored for subsequent retrieval. A respective reference signal may be retrieved for all UUTs of the one or more UUTs for a respective test. The signal may be a radio frequency signal. The UUT may be a wireless mobile device.Type: GrantFiled: August 6, 2012Date of Patent: March 17, 2015Assignee: National Instruments CorporationInventors: Craig E. Rupp, Gerardo Orozco Valdes, I. Zakir Ahmed, Vijaya Yajnanarayana
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Patent number: 8972780Abstract: A system and method are disclosed for managing a plurality of virtual machines (VMs) in a fault-tolerant and low-latency manner. In accordance with one example, a computer system executes a first VM and a second VM, and creates a first live snapshot of the first VM and a second live snapshot of the second VM. The computer system detects, after the creating of the first live snapshot and the second live snapshot, a failure that affects the executing of the first VM, and in response destroys the first VM and the second VM, creates a third VM from the first live snapshot and a fourth VM from the second live snapshot, and initiates execution of the third VM and the fourth VM. An output transmitted by the first VM to the second VM during the creating of the first live snapshot and the second live snapshot is not blocked.Type: GrantFiled: January 31, 2013Date of Patent: March 3, 2015Assignee: Red Hat Israel, Ltd.Inventors: Dor Laor, Orit Wasserman
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Patent number: 8966310Abstract: A memory device includes a memory array including a plurality of memory sections characterized by a plurality of memory types and control logic integrated with and distributed over the memory array. The control logic is operable to selectively allocate redundant sections in the plurality of memory sections.Type: GrantFiled: November 15, 2012Date of Patent: February 24, 2015Assignee: Elwha LLCInventors: Roderick A. Hyde, Nicholas F. Pasch, Clarence T. Tegreene
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Patent number: 8966327Abstract: A buffer integrated circuit device. The device comprising an output driver formed on the substrate member, the output driver having at least a command bus and an address bus. The device has a protocol and parity checking block (“Block”). The device has a table configured in the block. The table is programmable with a plurality of timing parameters. The device has a memory state block coupled to the table and a command history table coupled to the table to process protocol information for all commands that pass through the Block. The buffer integrated circuit device utilizes the protocol checking functionality to prevent failure propagation and enables data protection even in the case of host memory controller failure or system-level failure of any signal or signals on the command, control and address bus from the host memory controller to the buffer integrated device.Type: GrantFiled: March 12, 2013Date of Patent: February 24, 2015Assignee: Inphi CorporationInventor: David Wang
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Patent number: 8959387Abstract: The present disclosure provides techniques for operating a tape drive. A method of operating a tape drive includes monitoring a parameter of the tape drive during a data access operation. The method also includes detecting an access failure. The method further includes selecting a treatment based on the parameter, applying the treatment, and performing a retry.Type: GrantFiled: July 31, 2012Date of Patent: February 17, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Donald J. Fasen, Vernon L. Knowles
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Patent number: 8959396Abstract: The disclosure describes a novel method and apparatus for improving the operation of a TAP architecture in a device through the use of Command signal inputs to the TAP architecture. In response to a Command signal input, the TAP architecture can perform streamlined and uninterrupted Update, Capture and Shift operation cycles to a target circuit in the device or streamlined and uninterrupted capture and shift operation cycles to a target circuit in the device. The Command signals can be input to the TAP architecture via the devices dedicated TMS or TDI inputs or via a separate CMD input to the device.Type: GrantFiled: September 19, 2013Date of Patent: February 17, 2015Assignee: Texas Instruments IncorporatedInventor: Lee D. Whetsel
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Patent number: 8938650Abstract: Apparatuses, systems and methods are provided for managing error reporting in an information technology environment in which a plurality of information technology devices are connected to a network.Type: GrantFiled: February 28, 2011Date of Patent: January 20, 2015Assignee: Ricoh Company, Ltd.Inventor: Shun Tanaka
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Patent number: 8938638Abstract: A secondary location of a network acts as a recovery network for a primary location of the service. The secondary location is maintained in a warm state that is configured to replace the primary location in a case of a failover. During normal operation, the primary location actively services user load and performs backups that include full backups, incremental backups and transaction logs that are automatically replicated to the secondary location. Information is stored (e.g. time, retry count) that may be used to assist in determining when the backups are restored correctly at the secondary location. The backups are restored and the transaction logs are replayed at the secondary location to reflect changes (content and administrative) that are made to the primary location. After failover to the secondary location, the secondary location becomes the primary location and begins to actively service the user load.Type: GrantFiled: June 6, 2011Date of Patent: January 20, 2015Assignee: Microsoft CorporationInventors: Viktoriya Taranov, Alexander Hopmann, Antonio Marcos Da Silva, Jr., Nikita Voronkov, Kai Yiu Luk, Ramanathan Somasundaram, Artsiom Kokhan, Siddharth Rajendra Shah, Daniel Blood, Bhavesh Doshi