Patents Examined by Christopher Bartels
  • Patent number: 10866911
    Abstract: A method for establishing a connection in a non-volatile memory system is provided. A connection to a host is established. A request message with a target parameter of an NVM subsystem is received. A target NVM subsystem that meets the target parameter is determined. Routing information of the target NVM subsystem is determined. A response message that includes the routing information of the target NVM subsystem is sent. According to the method for establishing a connection in a non-volatile memory system, the host can establish a connection to an NVM subsystem that meets a requirement to improve connection reliability.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 15, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xin Qiu, Chunyi Tan
  • Patent number: 10853277
    Abstract: Disclosed herein are systems and methods for isolating input/output computing resources. In some embodiments, a host device may include logic to identify a Process Address Space Identifier (PASID) for a process or container of the host device and logic to associate the PASID with an individual queue pair of a hardware device of the host device, wherein the queue pair includes two complementary queues and wherein the queue pair is owned by the process or container upon association with the PASID. Other embodiments may be disclosed and/or claimed.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: December 1, 2020
    Assignee: Intel Corporation
    Inventors: Cunming Liang, Danny Y. Zhou, David E. Cohen, James R. Harris
  • Patent number: 10853299
    Abstract: A hot-plugged PCIe device configuration system includes a PCIe device with a PCIe configuration space having PCIe configuration space registers. A computing system includes a PCIe connector and a PCIe setting record database storing a first PCIe setting record having a first register write location value and first register value information. The computing system detects that the PCIe device has been hot-plugged into the PCIe connector, and uses the first register write location value in the first PCIe setting record to determine a location in the PCIe configuration space that provides a first PCIe configuration space register. The computing system then uses the first register value information in the first PCIe setting record to determine at least one register value change for the first PCIe configuration register, and writes the at least one register value change to the first PCIe configuration space register using the location.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: December 1, 2020
    Assignee: Dell Products L.P.
    Inventors: Austin Patrick Bolen, Vijay Bharat Nijhawan
  • Patent number: 10831687
    Abstract: Aligning received BDIs with received data on a cross-chip link including receiving, from the cross-chip link, a control flit comprising incoming data flit information for a plurality of incoming data flits; adding the incoming data flit information to a control structure; receiving, from the cross-chip link, the plurality of incoming data flits; directing each of the plurality of incoming data flits to virtual channel queues based on the incoming data flit information at a first read pointer in the control structure; receiving a bookend flit comprising a plurality of BDIs for the plurality of data flits; and associating each of the BDIs with the plurality of data flits based on the incoming data flit information at a second read pointer in the control structure.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventor: James F. Mikos
  • Patent number: 10802999
    Abstract: An industrial device communication system comprising: industrial devices that function as communication masters; industrial devices that function as communication slaves that receive control data from the industrial devices that function as communication masters; communication lines that communicably connect the industrial devices to one another; one or more switches for causing a communication group including the industrial devices that function as communication masters and the industrial devices that function as communication slaves to communicate independently from one or more other communication groups; and one or more switch controllers that control the one or more switches, causing the switches to switch between a state in which an inter-group communication line present between the communication group and the one or more other communication groups is disconnected, and a state in which the disconnected inter-group communication line is connected, according to the communication group that independently co
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: October 13, 2020
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Mamoru Fukuda, Tatsuhiko Sato, Naoya Taki, Hiroyuki Ishibashi
  • Patent number: 10783106
    Abstract: A portable, application-specific USB autorun device, following connection to a computer terminal, automatically initialises or presents itself as a known type of device and then automatically sends to the terminal a sequence of data complying with a standard protocol, that sequence of data automatically causing content to be accessed or a task to be initiated. The device (i) includes a standardised USB module that includes a USB microcontroller, the standardised module being designed to be attached to or embedded in multiple types of different, application specific packages but (ii) excludes mass memory storage for applications or end-user data.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: September 22, 2020
    Assignee: ARKEYTYP IP LIMITED
    Inventors: Thomas Steven Hulbert, Durrell Grant Bevington Bishop
  • Patent number: 10776033
    Abstract: A port processor to receive a read command in a target port. In response, use the target to process a data transfer that includes use of memory for the read transfer allocated by a storage array controller prior to receipt of the read command by the target port or while processing the data transfer and selectively mark such memory as repurposable. The port processor to receive a write command in the target port. In response to receipt of the write command, use the target to process a data transfer for the initiator associated with the write operation, wherein the process includes use of memory that the storage array controller pre-allocated or allocated based on receipt of the read command by the target port for the transfer to the storage array controller and marked as repurposable.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: September 15, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Siamak Nazari, Roopesh Kumar Tamma, Ajitkumar A Natarajan
  • Patent number: 10776305
    Abstract: A device (125) that may configure itself is disclosed. The device (125) may include an interface (305) that may be used for communications with a chassis (105). The interface (305) may support a plurality of transport protocols (330, 355, 345, 350). The device (125) may include a Vital Product Data (VPD) reading logic (310) to read a VPD (130) from the chassis (105) and a built-in self-configuration logic (315) to configure the interface (305) to use one of the transport protocols (330, 355, 345, 350) and to disable alternative transport protocols (330, 355, 345, 350), responsive to the VPD (130).
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: September 15, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Sompong Paul Olarig
  • Patent number: 10762020
    Abstract: A bus system according to the present disclosure includes: three or more devices that include one or a plurality of imaging devices, and transmit and receive a data signal in a time-division manner; and a bus to which the three or more devices are coupled and through which the data signal is transmitted. A first device of the three or more devices includes: an equalizer having a first operation mode in which a received signal is equalized with use of a coefficient set including one or a plurality of equalization coefficients, a storage unit that stores a plurality of the coefficient sets, and a communication controller that selects one of the plurality of the coefficient sets stored in the storage unit and causes the equalizer to operate in the first operation mode with use of the selected coefficient set.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: September 1, 2020
    Assignee: Sony Corporation
    Inventor: Hideyuki Matsumoto
  • Patent number: 10762030
    Abstract: Embodiments of systems and methods for fast input/output (IO) on PCIE devices are described. Such methods include receiving an IO request from a user or application, the IO request comprising instructions for communicating data with a host system, the host system comprising a processing device and a memory device, analyzing information from the IO request in an IO block analyzer to select one of a plurality of communication paths for communicating the data with the host system, defining a routing instruction in a transfer routing information transmitter in response to the selected communication path, communicating the routing instruction in a Transaction Layer Packet (TLP) to an integrated IO (IIO) module of the host system routing the data from the peripheral device to either the processing device or the memory device according to the routing instruction with a data transfer router.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: September 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Heekwon Park, Yang Seok Ki
  • Patent number: 10762002
    Abstract: An electronic meeting tool and method for communicating arbitrary media content from users at a meeting comprises a node configuration means adapted to operate a display node of a communications network, the display node being coupled to a first display. The node configuration means is adapted to receive user selected arbitrary media content and to control display of the user selected arbitrary media content on the first display. A peripheral device adapted to communicate the user selected arbitrary media content via the communications network is a connection unit comprising a connector adapted to couple to a port of a processing device having a second display, a memory and an operating system, and a transmitter. A program is adapted to obtain user selected arbitrary media content, said program leaving a zero footprint on termination. The user may trigger transfer of said user selected arbitrary media content to said transmitter.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 1, 2020
    Assignee: BARCO N.V.
    Inventors: Koen Simon Herman Beel, Yoav Nir, Filip Josephine Johan Louwet, Guy Coen
  • Patent number: 10754774
    Abstract: Systems, methods, apparatus and computer-readable medium are described for improving efficiency and robustness for sharing data across different users, agents, processes, drivers, and applications in a system. A shared buffer between multiple entities may be used for sharing data such that the data is only stored once and accessed by multiple entities without copying the data over and over again. An example system may be a network device. For a received packet at a network interface of a network device, the packet may be stored directly in memory. The application or process responsible for accessing and/or manipulating the packet can directly do so by simply using a buffer pointer provided by the buffer manager.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: August 25, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Niren Madanlal Choudhari, Samir Bhattacharya, Changbai He, Anthony Hou-Kee Ho, Venkata Suresh Pala
  • Patent number: 10754808
    Abstract: Bridge logic is provided to receive a request from a device, where the request references an address of a secondary address space. The secondary address space corresponds to a subset of addresses in a configuration address space of a system, and the secondary address space corresponds to a first view of the configuration address space. The bridge logic uses a mapping table to translate the address into a corresponding address in the configuration address space, where addresses of the configuration address space correspond to a different second view of the configuration address space.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: August 25, 2020
    Assignee: Intel Corporation
    Inventors: Prashant Sethi, Michael T. Klinglesmith, David J. Harriman, Reuven Rozic, Shanthanand Kutuva Rabindrananth
  • Patent number: 10747698
    Abstract: A control or test system for a field device includes: a communication unit for bidirectionally commmunicating with the field device via a fieldbus protocol; a command memory for receiving commands that are transmittable to the field device via the fieldbus protocol; and a masking memory, which masking memory receives the commands contained in the command memory that are not supported by the field device, and/or receives an error message returned by the field device in response to such command.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: August 18, 2020
    Assignee: ABB SCHWEIZ AG
    Inventors: Dirk Wagener, Christoph Welte, Marcus Heege, Wolfgang Mahnke, Marko Schlueter
  • Patent number: 10740273
    Abstract: A method for ensuring payload validity for communications on an asynchronous channel based bus. A consumer provides to a channel of an asynchronous channel based bus, a request message that includes a request for data. A producer monitoring the channel receives the request message. The producer generates a response message to the request message. The response message includes a schema and a payload. The producer provides, to the channel of the asynchronous channel based bus, the response message. The consumer receives the response message and performs a runtime validation of the schema of the response message. The consumer allows the response message to be utilized when the response message passes the runtime validation.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: August 11, 2020
    Assignee: VMware, Inc.
    Inventor: Dave Shanley
  • Patent number: 10741226
    Abstract: A multi-processor computer architecture incorporating distributed multi-ported common memory modules wherein each of the memory modules comprises a control block functioning as a cross-bar router in conjunction with one or more associated memory banks or other data storage devices. Each memory module has multiple I/O ports and the ability to relay requests to other memory modules if the desired memory location is not found on the first module. A computer system in accordance with the invention may comprise memory module cards along with processor cards interconnected using a baseboard or backplane having a toroidal interconnect architecture between the cards.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: August 11, 2020
    Assignee: FG SRC LLC
    Inventors: Jon M. Huppenthal, Timothy J. Tewalt, Lee A. Burton, David E. Caliga
  • Patent number: 10740270
    Abstract: Example implementations relate to a self-tune controller. For example, the self-tune controller may poll, via an out-of-band data stream, low-level operation information about a processor or a bus of a computing system under a present workload. At least some of the low-level operation information may be descriptive of a nature of traffic on the bus. The self-tune controller may program, via an out-of-band control signal, a setting of the computing system for the present workload based on the low-level operation information.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: August 11, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kevin G. Depew, Vincent Nguyen, Scott P. Faasse, Robert E. Van Cleve
  • Patent number: 10732669
    Abstract: Serial peripheral interfaces and methods of operating the same are provided. An apparatus can have a serial peripheral interface (SPI) including a first command state machine (CSM), and a second CSM.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: August 4, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Paolo E. Mangalindan
  • Patent number: 10732842
    Abstract: A computing system includes: a gateway block configured to generate a modified operation for communicating a request operation issued by a host device to access a storage device; and wherein the gateway block includes: a conversion block configured to generate a converted interface for converting an interaction interface included in the request operation to the interaction interface executable by the storage device, and a translation block, coupled to the conversion block, configured to generate a translated representation for translating an object representation included in the request operation to the object representation utilized in the storage device.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: August 4, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dongchul Park, Yang Seok Ki
  • Patent number: 10725789
    Abstract: Provided is a data generation device for generating input data to be inputted to a parallel processing device. The data generation device includes: a controller configured to output padding data; and a data processing device configured to receive original data and to generate the input data in which at least a portion of the original data is padded with the padding data. The data processing device includes: a first multiplexer configured to receive the padding data and the original data; a register configured to store data outputted from the first multiplexer; and a second multiplexer configured to receive data outputted from the first multiplexer and data stored in the register.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: July 28, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jung Hee Suk, Chun-Gi Lyuh