Abstract: A computing device includes: a plurality of memory blades; and a memory blade management unit suitable for controlling each of the plurality of memory blades based on a global map including information of each of the plurality of memory blades, wherein each of the plurality of memory blades includes: a plurality of memory devices; and a controller suitable for detecting a status of each of the plurality of memory devices.

Abstract: A non-volatile memory comprises an array of a plurality of non-volatile memory cells, a controller coupled to the array, and an evaluator coupled to an output of the array. In a first operational mode, the controller receives a logical address and selects one non-volatile memory cell for access. In a second operational mode, and the controller receives a logical address and selects N non-volatile memory cells for access in which N is an integer greater than 1. If the logical address is for a read access, in the first operational mode the evaluator is disabled and the read-address output of the array corresponds to one selected non-volatile memory cell, and in the second operational mode the evaluator determines an read-address output corresponding to the received logical address based on a read output of the N selected non-volatile memory cells.

Abstract: A method of performing deduplication includes (1) receiving a write command that specifies a set of data, the set of data including multiple blocks of data, (2) hashing a subset of the set of data, yielding a representative digest of the set of data, and (3) performing deduplication on the set of data based at least in part on matching the representative digest to a digest already stored in a database which relates digests to locations of data from which the digests were produced. An apparatus, system, and computer program product for performing a similar method are also provided.

Abstract: A system and method of buffered freepointer management to handle burst traffic to fixed size structures in an external memory system. A circular queue stores implicitly linked free memory locations, along with an explicitly linked list in memory. The queue is updated at the head with newly released locations, and new locations from memory are added at the tail. When a freed location in the queue is reused, external memory need not be updated. When the queue is full, the system attempts to release some of the freepointers such as by dropping them if they are already linked, updating the linked list in memory only if those dropped are not already linked. Latency can be further reduced by loading new locations from memory when the queue is nearly empty, rather than waiting for empty condition, and by writing unlinked locations to memory when the queue is nearly full.

Abstract: Systems, methods and/or devices are used to enable locality grouping during garbage collection of a storage device. In one aspect, the method includes, at a storage controller for the storage device: performing one or more operations for a garbage collection read, including: identifying one or more sequences of valid data in a source unit, wherein each identified sequence of valid data has a length selected from a set of predefined lengths; and for each respective sequence, transferring the respective sequence to a respective queue of a plurality of queues, in accordance with the length of the respective sequence; and setting a global flag to flush all open queues; and performing one or more operations for a garbage collection write, including: identifying open respective queues for writing to a destination unit; and writing from the open respective queues to the destination unit.

Abstract: A first non-volatile memory may store first data and a second non-volatile memory may store second data. An authentication component may be coupled with the first non-volatile memory and the second non-volatile memory and may receive a request to perform an authentication operation. In response to the request to perform the authentication operation, the authentication component may access the first data stored at the first non-volatile memory and the second data stored at the second non-volatile memory and determine whether the second data stored at the second non-volatile memory has become unreliable based on a memory disturbance condition. In response to determining that the second data stored at the second non-volatile memory has become unreliable, a corrective action associated with the first data stored at the first non-volatile memory may be performed.

Abstract: Garbage collection is performed according to an estimated number of valid pages. A storage device estimates a valid page count at a future time based on a valid page count at each of past time steps and a present time step using a neural network model and selects a victim block that undergoes the garbage collection from memory blocks based on an estimated valid page count. A memory block having a lowest estimated valid page count or having an estimated valid page count having a maintaining tendency is selected as the victim block or a memory block having the estimated valid page count having a decreasing tendency is excluded from selecting the victim block.

Abstract: A cache memory control device for controlling a first cache memory of a multi-cache memory system that includes logic circuitry operable for storing state information assigned to an invalid copy of a cache line stored in the first cache memory, where the state information includes a cache memory identifier identifying an individual second cache memory of the multi-cache memory system that is likely to contain a valid copy of the cache line.

Abstract: This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage.

Abstract: A virtual memory including virtual addresses may be generated. A first virtual address of the virtual memory may be mapped to a first physical address of a one-time programmable (OTP) memory of a device. Furthermore, a second virtual address of the virtual memory may be mapped to a second physical address of a static memory of the device. The virtual memory that is mapped to the OTP memory and the static memory may be provided for accessing of the data of the OTP memory of the device.

Abstract: A storage device includes a nonvolatile memory including a plurality of physical blocks, a communication interface connectable to a host, and a controller. The controller is configured to generate metadata of host data, which include user data and metadata of the user data, and write, in a physical block of the nonvolatile memory, the metadata of the host data, the metadata of the user data, and the user data continuously in this order, when the host data are received through the communication interface in association with a write command.

Abstract: Disclosed is a device for maintaining consistency between a host system cache and a main memory in a general-purpose computing system equipped with a hardware accelerator for processing main memory data. The device for maintaining data consistency between a hardware accelerator and a host system, which is at least temporarily implemented by a computer, includes a determination unit responsible for determining whether an address which the hardware accelerator should access is present in a cache, and a processing unit responsible for selectively performing write-back on data corresponding to the address when the address is present in the cache based on the determined result.

Abstract: This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage.

Abstract: A controller includes an address manager suitable for mapping a first information indicating a start map data of a continuous map data, and a second information indicating a number of the continuous map data, and suitable for storing the first and second information; and a processor suitable for controlling, when a read request for a target map data is received, a memory device to read out the target map data from a meta region of the memory device based on the first information and the second information.

Abstract: A memory management method is provided according to an exemplary embodiment. The method includes: receiving a write command and determining whether a usage status of physical units associated to a storage area conforms to a first predetermined status; storing write data corresponding to the write command to at least one of physical units associated to a temporary area if the usage status of the physical units associated to the storage area conforms to the first predetermined status; associating the at least one physical unit storing the write data to the storage area; and allocating at least one logical unit to map the at least one physical unit associated to the storage area.

Abstract: In one embodiment, there is a method for implementing balancing block wearing leveling at a storage device including one or more single level cell (SLC) blocks in a SLC block pool and one or more non-single level cell (nSLC) blocks in a nSLC block pool for storing data and a memory controller for performing operations on the SLC blocks and nSLC blocks, the method comprising: at the memory controller: receiving a first request to perform a wear leveling operation on a respective block pool of one of: the SLC block pool and the nSLC block pool; determining whether one or more blocks in the respective block pool meet block pool transfer criteria; in response to a determination that the one or more blocks in the respective block pool meets block pool transfer criteria, reclassifying the one or more blocks in the respective block pool as the other of the SLC block pool and the nSLC block pool; and in response to a determination that the one or more blocks in the respective block pool does not meet block pool trans

Abstract: Embodiments of the present disclosure provide methods, apparatuses, a system and computer program products for managing storage units. According to embodiments of the present disclosure, it is determined whether a first storage unit allocated at a first node is reclaimable, wherein data in the first storage unit is backed up to a second storage unit at a second node. In response to determining that the first storage unit is reclaimable, a condition to be satisfied for reclaiming the second storage unit is determined. A command indicating the condition is sent to the second node, such that the second node reclaims the second storage unit in response to the condition being satisfied. Moreover, in response to the command being sent, the first storage unit is reclaimed. The embodiments of the present disclosure enable timely reclaiming of storage units, thereby improving utilization of the storage space effectively.

Abstract: A computer-implemented method, according to one embodiment, includes: receiving an input from a designated mechanism of an automated data storage library in response to the designated mechanism being triggered, capturing a snapshot of one or more logs in response to receiving the input from the designated mechanism, and storing the snapshot in memory. Moreover, the designated mechanism is accessible at the automated data storage library. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: Disclosed herein are techniques for performing memory access. In one embodiment, an integrated circuit may include a memory device, a first port to receive first data elements from a memory access circuit within a first time period, and a second port to transmit second data elements to the memory access circuit within a second time period. The memory access circuit may receive the first data elements from the memory device within a third time period shorter than the first time period and transmit, via the first port, the received first data elements to a first processing circuit sequentially within the first time period. The memory access circuit may receive, via the second port, the second data elements from a second processing circuit sequentially within the second time period, and store the received second data elements in the memory device within a fourth time period shorter than the second time period.

Abstract: A virtual volume is initially provided from a first storage appliance within a cluster of storage appliances by providing access to the virtual volume over a data path between a host computer and a protocol endpoint hosted on the first storage appliance, based on an initial binding between the virtual volume and the protocol endpoint hosted on the first storage appliance. A rebind request is conveyed to the host computer, and in response to receiving a bind request for the virtual volume, a new binding is created between the virtual volume and a protocol endpoint hosted by the second storage appliance. The virtual volume is subsequently provided from the second storage appliance by providing the host computer with access to the virtual volume over a data path between the host computer and the protocol endpoint hosted on the second storage appliance based on the newly created binding.