Patents Examined by Christopher D Birkhimer
  • Patent number: 11494111
    Abstract: A memory device includes a plurality of groups of memory blocks, each group including a plurality of blocks, and each block including a plurality of memory units. A memory controller for the memory device performs operations including maintaining a count of valid memory units in the group for each group and maintaining a count of valid memory units in each block of the memory device. The operations further include selecting a first group based on a count of valid memory units and the first group including a target plurality of blocks. The operations further include selecting a first target block from the target plurality of blocks, determining whether the first target block is to be erased, and erasing the first target block in response to determining that the first target block is to be erased.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: November 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Woei Chen Peh, Chandra Mouli Guda
  • Patent number: 11481132
    Abstract: Examples include removing stale hints from a data deduplication store (DDS) in a storage system. Some examples incorporate an epoch value in a hint, that is written in the DDS, for data that is present in a snapshot of one of a plurality of virtual volumes in a storage system and use the epoch value to identify a stale hint and remove the stale hint from the DDS.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: October 25, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Narayanan Balakrishnan, Adil Babu Mohammed
  • Patent number: 11483437
    Abstract: During TRIM processing, an apparatus cannot read/write data from/to a semiconductor storage device, and thus cannot perform processing using the device. If the TRIM processing is executed irrespective of a user's intention, the user is to wait for completion of the TRIM processing before performing a desired function of the apparatus. The apparatus includes a nonvolatile storage unit having semiconductor areas, a control unit configured to count a value of at least one type of data, an execution unit configured to execute TRIM processing that notifies the storage unit of an unused area among the semiconductor areas and performs wear leveling on an area in use among the semiconductor areas, and a notification unit configured to provide a notification prompting the execution of the TRIM processing when the counted value of the data satisfies a condition for a threshold.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: October 25, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kazuhiro Oyoshi
  • Patent number: 11474921
    Abstract: Systems, apparatuses, and methods related log compression are described. In an example, a system log that identifies targeted data may be compiled in a memory resource during an execution of an operation using that memory resource. The system log may be analyzed utilizing a portion of the memory resource that would otherwise be available to be utilized in the execution of the operation. The system log may be compressed during the execution of the operation, the level or timing of such compression may be based on the analysis that occurs contemporaneous to or as a result of executing the operation. In some examples, compressing the system log may include discarding a portion of the system log. Compressing the system log may also include extracting the targeted data from the system log as the system log is being compiled and converting the extracted targeted data to structured data.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: October 18, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Reshmi Basu, Libo Wang
  • Patent number: 11461229
    Abstract: The present disclosure provides techniques for deallocating previously allocated storage blocks. The techniques include obtaining a list of chunk IDs to analyze, choosing a chunk ID, and determining the storage blocks spanned by the chunk corresponding to the chosen chunk ID. The technique further includes determining whether any file references any storage blocks spanned by the chunk. The determining may be performed by comparing an internal reference count to a total reference count, where the internal reference count is the number of reference to the storage block by a chunk ID data structure. If no files reference any of the storage blocks spanned by the chunk, then all the storage blocks of the chunk can be deallocated.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: October 4, 2022
    Assignee: VMWARE, INC.
    Inventors: Wenguang Wang, Junlong Gao, Marcos K. Aguilera, Richard P. Spillane, Christos Karamanolis, Maxime Austruy
  • Patent number: 11455212
    Abstract: Described in detail herein are systems and methods for single instancing blocks of data in a data storage system. For example, the data storage system may include multiple computing devices (e.g., client computing devices) that store primary data. The data storage system may also include a secondary storage computing device, a single instance database, and one or more storage devices that store copies of the primary data (e.g., secondary copies, tertiary copies, etc.). The secondary storage computing device receives blocks of data from the computing devices and accesses the single instance database to determine whether the blocks of data are unique (meaning that no instances of the blocks of data are stored on the storage devices). If a block of data is unique, the single instance database stores it on a storage device. If not, the secondary storage computing device can avoid storing the block of data on the storage devices.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: September 27, 2022
    Assignee: Commvault Systems, Inc.
    Inventors: Deepak Raghunath Attarde, Rajiv Kottomtharayil, Manoj Kumar Vijayan
  • Patent number: 11455110
    Abstract: Embodiments of the present invention provide concepts for handling a handover of ownership of data from a source to a referrer in a data deduplication environment. By performing a handover of the ownership of the data from the source to the referrer, the number of processes required to access the data may be reduced and so the performance of the system may be improved. The identification of a source for performing the handover on may be performed by way of a volatile cache.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: September 27, 2022
    Assignee: International Business Machines Corporation
    Inventors: Ben Sasson, Paul Nicholas Cashman, Dominic Tomkins, Florent C. Rostagni
  • Patent number: 11435959
    Abstract: An array controller for connection between a solid state drive controller and multiple non-volatile storage units is provided. The array controller comprises a plurality of enable outputs, each of which is connected to an enable input of one of the non-volatile storage units, and a buffer in which data to be written into or read from the non-volatile storage units is stored. The array controller further comprises a control unit configured to enable a communication path between the solid state drive controller and one of the non-volatile storage units according to an address received from the solid state drive controller.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: September 6, 2022
    Assignee: KIOXIA CORPORATION
    Inventor: Sie Pook Law
  • Patent number: 11429301
    Abstract: Methods, systems, and computer programs encoded on computer storage medium, performing, at first time, a calibration and configuration of a data contextual migration model, including: identifying contextual data associated with contextual inputs to a IHS, the contextual data including user contextual data, environmental context data, and system telemetry contextual data; training, based on the contextual data, the data contextual migration model, including: tagging, for each data block of a plurality of data blocks, the data block with identifiers indicating a store location of the data block; storing, based on the identifier associated with each data block, the data block at a local data store of the information handling system, at a remote data store of a remote server computing system, or both; generating a configuration policy including configuration rules, the configuration rules for prioritizing pre-loading of a subset of the data blocks to be provided at the information handling system.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: August 30, 2022
    Assignee: Dell Products L.P.
    Inventors: Lee B. Zaretsky, Michael S. Gatson
  • Patent number: 11422702
    Abstract: Methods and systems support managed use of a Storage Class Memory (SCM) by one or more applications operating on an IHS (Information Handling System). The operations that are supported by an IHS processor for flushing data from the SCM are determined. Applications are identified that operate using the persistent data storage capabilities of the SCM. The SCM flushing operations invoked by each these applications are monitored. The utilization of the SCM by each of the first plurality of applications is determined based at least in part on the monitored flushing operations by each application. The utilization of the SCM may also be based on calculated metrics of SCM utilization by the respective applications. The applications are classified based their determined SCM utilizations. Based on the classifications of SCM utilization, a subset of the applications may be identified for removal from use of the SCM.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: August 23, 2022
    Assignee: Dell Products, L.P.
    Inventors: Parmeshwr Prasad, Rahul Deo Vishwakarma
  • Patent number: 11416161
    Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The media unit comprises a plurality of dies, and each of the plurality of dies comprising a plurality of erase blocks. The controller is configured to compare an estimated age of a first available erase block in each of the plurality of dies to one another and select one or more of the first available erase blocks from one or more dies of the plurality of dies based on the estimated ages to form a first zone. At least one first available erase block from at least one die of the plurality of die is excluded from the first zone.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: August 16, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alan D. Bennett, Liam Parker, Daniel L. Helmick, Sergey Anatolievich Gorobets, Peter Grayson
  • Patent number: 11379138
    Abstract: The present disclosure relates to a method, device and program product for managing an access request in a storage system. In the method, based on an access request to the storage system, an address range of a data object involved in the access request is obtained. An access type of the access request is identified in accordance with determining that a garbage collection operation is performed on a data extent within the address range. The access request is responded to based on the access type by using a data extent within an address range in the storage system on which no garbage collection operation is performed.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: July 5, 2022
    Assignee: EMC IP Holding Company LLC
    Inventor: Bing Liu
  • Patent number: 11372579
    Abstract: Techniques for generating data sets may include: receiving an initial buffer that achieves a compression ratio responsive to compression processing using a compression algorithm, the initial buffer including first content located at a first position in the initial buffer and including second content located at a second position in the initial buffer; and generating a data set of buffers using the initial buffer. The data set may be expected to achieve a specified deduplication ratio responsive to deduplication processing and to achieve the compression ratio responsive to compression processing using the compression algorithm. Generating the data set may include generating a first plurality of buffers where each buffer of the first plurality is not a duplicate of another buffer in the first plurality, and generating a second plurality of duplicate buffers. Each duplicate buffer may be a duplicate of a buffer in the first plurality of buffers.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: June 28, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Ivan Bassov, Istvan Gonczi, Sorin Faibish
  • Patent number: 11360889
    Abstract: A memory system may include: a memory device including plural memory dies each having plural memory blocks; and a controller configured to control the memory device to independently perform an operation to each of the memory dies, wherein the controller controls the memory device to perform a foreground operation to a first one among the memory dies while performing a background operation to a second one among the memory dies.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: June 14, 2022
    Assignee: SK hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 11360692
    Abstract: Disclosed herein is a memory controller controlling data transfer between a host system and a flash memory. The memory controller is configured to limit a data transfer rate in a second period following a first period to a predetermined rate lower than a maximum rate when the data transfer rate in a first period satisfies a predetermined condition.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: June 14, 2022
    Assignee: TDK CORPORATION
    Inventor: Kazuo Shida
  • Patent number: 11354234
    Abstract: This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: June 7, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, Mike Jadon, Richard M. Mathews
  • Patent number: 11354235
    Abstract: This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: June 7, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, Mike Jadon, Richard M. Mathews
  • Patent number: 11347638
    Abstract: This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: May 31, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, Mike Jadon, Richard M. Mathews
  • Patent number: 11347639
    Abstract: This disclosure provides for host-controller cooperation in managing NAND flash memory. The controller maintains information for each erase unit which tracks memory usage. This information assists the host in making decisions about specific operations, for example, initiating garbage collection, space reclamation, wear leveling or other operations. For example, metadata can be provided to the host identifying whether each page of an erase unit has been released, and the host can specifically then command each of consolidation and erase using direct addressing. By redefining host-controller responsibilities in this manner, much of the overhead association with FTL functions can be substantially removed from the memory controller, with the host directly specifying physical addresses. This reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 31, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, Mike Jadon, Richard M. Mathews
  • Patent number: 11334273
    Abstract: A valid data merging method, a memory storage device and a memory control circuit unit are provided. The method includes: collecting a first valid data in a source unit according to a first logical-to-physical address mapping table recorded in a candidate information, and determining whether a first data amount of the first valid data is same as a second data amount of a valid data corresponding to a valid count of the source unit; in response to determining that they are the same, copying the first valid data to a target unit; and in response to determining that they are not the same, obtaining one or more second logical-to-physical address mapping table according to a management information of the source unit to collect a second valid data in the source unit, and copying the second valid data to the target unit.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: May 17, 2022
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Bo-Cheng Ko