Abstract: Apparatuses, systems, methods, and computer program products are disclosed for hybrid checkpointed memory. A method includes referencing data of a range of virtual memory of a host. The referenced data is already stored by a non-volatile medium. A method includes writing, to a non-volatile medium, data of a range of virtual memory that is not stored by the non-volatile medium. A method includes providing access to data of a range of virtual memory from a non-volatile medium using a persistent identifier associated with referenced data and written data.

Abstract: A method to request memory from a far memory cache and implement, at an operating system (OS) level, a fully associative cache on the requested memory. The method includes pinning the working set of a program into the requested memory (pin buffer) so that it is not evicted due to cache conflicts and is served from the fast cache and not the slower next level memory. The requested memory extends the physical address space and is visible to and managed by the OS. The OS has the ability to make the requested memory visible to the user programs. The OS has the ability to manage the requested memory from the far memory cache as both a fully associative cache and a set associative cache.

Abstract: Storage devices including a flash memory and a memory controller, and write memory block allocating methods of the storage devices are provided. A write memory block allocating method may include storing a pre-allocation table in a Random Access Memory (RAM) of a memory controller. The pre-allocation table may include allocation order information of a pre-allocated memory block included in a flash memory. The method may also include receiving a write request from a host, determining whether a write memory block for the write request can be allocated according to the pre-allocation table and allocating the pre-allocated memory block as the write memory block according to the pre-allocation table when the write memory block can be allocated according to the pre-allocation table.

Abstract: A transactional memory system predicts the outcome of coalescing outermost memory transactions, the coalescing causing committing of memory store data to memory for a first transaction to be done at transaction execution (TX) end of a second transaction, the method comprising. A processor of the transactional memory system determines whether a first plurality of outermost transactions from an associated program that were coalesced experienced an abort, the first plurality of outermost transactions including a first instance of a first transaction. The processor updates a history of the associated program to reflect the results of the determination. The processor coalesces a second plurality of outermost transactions from the associated program, based, at least in part, on the updated history.

Abstract: Non-volatile memory array can be recovered after a power loss. In one example, pages of a memory array are scanned to find a first free page after the power loss. The first free page is marked as available, and the page marked as available is written to with the next write cycle.

Abstract: Dynamically managing control information in a storage device, including: querying, by an array management module executing on a storage array controller, the storage device for a location of control information for the storage device, the control information describing the state of one or more memory blocks in the storage device; and issuing, by the array management module in dependence upon the location of the control information for the storage device, a request to retrieve the control information for the storage device.

Abstract: An electronic device includes a memory, a first-region allocating unit, and a second-region allocating unit. The first-region allocating unit allocates first regions in a region of the memory. The first regions are for execution of tasks. The second-region allocating unit allocates second regions in the first regions. The second region is to be actually used for execution of a task. If the first-region allocating unit has previously allocated a first region for a task identical in type to a new task as an execution target, the first-region allocating unit cancels allocation of a first region for the new task. When the allocation of a first region for the new task is cancelled, the second-region allocating unit allocates, in the first region for the task identical in type to the new task, a second region for the new task.

Abstract: Following a relocation write in which data is relocated without update from an old physical location to a new physical location within the non-volatile memory array, a controller defers an update of a logical-to-physical translation (LPT) entry to associate a logical address of the data with a new physical address of the new physical location, for example, for a time-out period. During deferment of the update to the LPT entry, the controller services a read request targeting the logical address from data at the old physical location. In response to no update to the data being made during deferment of the update to the LPT entry, the controller performs the deferred update to the LPT entry. In response to an update to the data being made during the deferment of the update to the LPT entry, the controller refrains from performing the deferred update to the LPT entry.

Abstract: A memory management unit (MMU) is disclosed for storing mappings between virtual addresses and physical addresses. The MMU includes a translation look-aside buffer (TLB) and a memory management unit controller. The TLB stores mappings between a virtual address and a physical address. The MMU controller receives a request to insert an entry into the TLB and performs a set of operations based on the received request. The MMU controller determines whether an entry stored in the TLB is associated with the virtual address of the request, removes the entry stored in the TLB that is associated with the virtual address and inserts the requested entry into the TLB.

Abstract: Various embodiments for predicting hardware lifespan by a processor device are provided. For a solid state drive (SSD) device configured with data deduplication mechanisms, trend information is obtained by comparing a write tracking table to a de-duplicated cell tracking table to determine how many new cells were allocated on the SSD device over a particular time period. The trend information is applied to at least one drive constant data to predict the useful remaining lifespan of the SSD drive device.

Abstract: A method, and system for implementing enhanced fast full synchronization for remote disk mirroring in a computer system. A source backup copy is made locally available to a target for remote disk mirroring. Sectors are identified that are different between the source and target. A hash function is used over a block to be compared, with an adaptive number of tracking sectors per block, starting with a minimum block size.

Abstract: A file processing method and a storage device for storing a file in a redundant array of independent disks (RAID) are disclosed. In this method, the storage device divides received F files into multiple data blocks, and obtains a first matrix with T rows according to the multiple data blocks. Data blocks belonging to one file are located in one row of the first matrix. The storage device then writes a stripe, which consists of data blocks in each column in the first matrix and a check block that is obtained by computing according to the data blocks in the column, into the RAID. By using the file processing method, the storage device can write one file into one disk of the RAID while ensuring security of file storage, thereby achieving a better energy saving effect when the file is read.

Abstract: A storage management method includes the following steps: detecting sizes of shared storage spaces of terminal devices joined in a sharing system; classifying the terminal devices joined in a sharing system to a number of kinds of terminal devices according to a size of the shared storage space of each terminal device; mapping the shared storage spaces of each kind of terminal devices of each device group to virtual disks with corresponding storage capacities of a virtual disk array card one by one; receiving a storing request to store a file to a cloud, and determining a size of the file to be stored and selecting one virtual disk whose storage capacity is nearest and greater than or equal to the size of the file, and storing the file to the shared storage spaces of the terminal devices mapping to the selected virtual disk.

Abstract: A storage management method, includes steps: detecting sizes of shared storage spaces of all terminal devices joined in a sharing system; dividing the all terminal devices into a number of device groups randomly; classifying the terminal devices of each group into a number of kinds of terminal devices according to the sizes of the shared storage spaces of the terminal devices of each device group; mapping the shared storage spaces of each kind of terminal device of each device group to one corresponding virtual disk of one row of a virtual disk array card; and determining a size of a file to be stored when receiving a storing request, and selecting a virtual disk with size nearest to and greater than or equal to that of the file from one row randomly, and storing the file into the terminal devices mapping to the selected virtual disk.

Abstract: Methods of operating a memory device include performing a first memory operation having an associated timing requirement; after completing the first memory operation, determining whether a timing margin between completion of the first memory operation and expiration of its associated timing requirement exceeds a length of time to perform a particular portion of a second memory operation; and performing the particular portion of the second memory operation between completion of the first memory operation and the expiration of its associated timing requirement if it is determined that the timing margin between completion of the first memory operation and expiration of its associated timing requirement exceeds the length of time to perform the particular portion of the second memory operation.

Abstract: A method, and system for implementing enhanced fast full synchronization for remote disk mirroring in a computer system. A source backup copy is made locally available to a target for remote disk mirroring. Sectors are identified that are different between the source and target. A hash function is used over a block to be compared, with an adaptive number of tracking sectors per block, starting with a minimum block size.

Abstract: A mechanism is provided for memory coherence in a multiple processor system. Responsive to a memory operation from a processing core of the multiple processor system resulting in a cache miss, the mechanism checks a private region table associated with the processing core. The memory operation attempts to access a memory region. Responsive to determining the memory region corresponds to an entry in the private region table, the mechanism performs a remote memory controller snoop of a remote memory controller without snooping the multiple processor system.

Abstract: A file processing method and a storage device for storing a file in a redundant array of independent disks (RAID) are disclosed. In this method, the storage device divides received F files into multiple data blocks, and obtains a first matrix with T rows according to the multiple data blocks. Data blocks belonging to one file are located in one row of the first matrix. The storage device then writes a stripe, which consists of data blocks in each column in the first matrix and a check block that is obtained by computing according to the data blocks in the column, into the RAID. Using the file processing method, the storage device can write one file into one disk of the RAID while ensuring security of file storage, thereby achieving a better energy saving effect when the file is read.

Abstract: A data exchange system including: a microprocessor; a non-volatile memory; a first communication channel linking the microprocessor to the non-volatile memory; a first supply channel configured to supply electrical energy to the microprocessor and to the non-volatile memory; a control device; a second communication channel through which an external device can exchange data with the non-volatile memory; a second supply channel configured to supply the control device and the non-volatile memory.

Abstract: A mechanism is provided for memory coherence in a multiple processor system. Responsive to a memory operation from a processing core of the multiple processor system resulting in a cache miss, the mechanism checks a private region table associated with the processing core. The memory operation attempts to access a memory region. Responsive to determining the memory region corresponds to an entry in the private region table, the mechanism performs a remote memory controller snoop of a remote memory controller without snooping the multiple processor system.