Patents Examined by Craig Goldschmidt
-
Patent number: 9092327Abstract: Systems and methods are provided for allocating memory to dissimilar memory devices. An exemplary embodiment includes a method for allocating memory to dissimilar memory devices. An interleave bandwidth ratio is determined, which comprises a ratio of bandwidths for two or more dissimilar memory devices. The dissimilar memory devices are interleaved according to the interleave bandwidth ratio to define two or more memory zones having different performance levels. Memory address requests are allocated to the memory zones based on a quality of service (QoS).Type: GrantFiled: February 28, 2013Date of Patent: July 28, 2015Assignee: QUALCOMM IncorporatedInventors: Subrato K. De, Richard A. Stewart, Gheorghe Calin Cascaval, Dexter T. Chun
-
Patent number: 9063899Abstract: In an embodiment, a data processing method comprises implementing a memory event interface to a hypercall interface of a hypervisor or virtual machine operating system to intercept page faults associated with writing pages of memory that contain a computer program; receiving a page fault resulting from a guest domain attempting to write a memory page that is marked as not executable in a memory page permissions system; determining a first set of memory page permissions for the memory page that are maintained by the hypervisor or virtual machine operating system; determining a second set of memory page permissions for the memory page that are maintained independent of the hypervisor or virtual machine operating system; determining a particular memory page permission for the memory page based on the first set and the second set; processing the page fault based on the particular memory page permission, including performing at least one security function associated with regulating access of the guest domain to thType: GrantFiled: October 3, 2012Date of Patent: June 23, 2015Assignee: CISCO TECHNOLOGY, INC.Inventor: Joe Epstein
-
Patent number: 9032173Abstract: A method according to one embodiment includes receiving instruction to change from an original target storage subsystem in a disaster recovery configuration-to a new target storage subsystem. Second copy services relationships are created between one or more new target volumes on the new target storage subsystem and one or more source volumes on a source storage subsystem using multi-target functionality. Existing first copy services relationships between the source storage subsystem and the original target storage subsystem are terminated after all of the second copy services relationships are full duplex.Type: GrantFiled: November 4, 2014Date of Patent: May 12, 2015Assignee: International Business Machines CorporationInventors: Amy N. Blea, David R. Blea, Gregory E. McBride, John J. Wolfgang
-
Patent number: 9026717Abstract: An apparatus, system, and method are disclosed for persistently storing data objects. An object store index module maintains an object store. The object store associates each data object of a plurality of data objects with a unique key value. A storage module persists object store data defining the object store to a logical block address of the solid-state storage device in response to an update event. The logical block address is a member of a restricted set of logical block addresses. The logical block address is mapped to a location of the object store data on the solid-state storage device. A read module provides a requested data object from the plurality of data objects to a requesting client in response to receiving a read request for the requested data object from the requesting client. The read request comprises the key value associated with the requested data object.Type: GrantFiled: September 30, 2011Date of Patent: May 5, 2015Assignee: Sandisk Technologies, Inc.Inventors: Jonathan Ludwig, Ethan Barnes, Drex Dixon
-
Patent number: 9021196Abstract: In one embodiment, a method includes storing data received from at least two data sources in a buffer, writing the data from the at least two data sources to regions in a first wrap of a tape on a data-source basis in a first predetermined order, the regions in the first wrap being previously allocated to the at least two data sources, moving a head to a second wrap of the tape when an end of the first wrap of the tape is reached, and writing the data from the at least two data sources to regions in the second wrap in a second predetermined order, the second predetermined order being a reverse order relative to the first predetermined order, the regions in the second wrap being previously allocated to the at least two data sources. The first and second wraps have first and second predetermined lengths, respectively.Type: GrantFiled: March 5, 2013Date of Patent: April 28, 2015Assignee: International Business Machines CorporationInventors: Shinobu Fujihara, Yutaka Oishi
-
Patent number: 9021204Abstract: Techniques for managing data storage within storage tiers are disclosed. In one particular embodiment, the techniques may be realized as a method for managing data storage having the steps of assigning a storage class for each of a plurality of storage tiers, defining at least one rule for storing data in the plurality of storage tiers, determining whether performance assisted tier migration is requested, monitoring the plurality of storage tiers when it is determined that the performance assisted tier migration is requested, determining whether to redefine the storage class of one of the plurality of storage tiers based on the monitoring, and determining whether to migrate the data based on the monitoring.Type: GrantFiled: February 27, 2013Date of Patent: April 28, 2015Assignee: Symantec CorporationInventors: Nirendra Awasthi, Sudhir Kumar
-
Patent number: 9009399Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.Type: GrantFiled: October 22, 2014Date of Patent: April 14, 2015Assignee: Phison Electronics Corp.Inventors: Lai-Hock Chua, Kheng-Chong Tan
-
Patent number: 8977809Abstract: Apparatus, systems, and methods for configuring a plurality of stacked semiconductor dice with unique identifiers and identifying a die in the stack using the unique identifier are provided. Additional apparatus and methods are disclosed.Type: GrantFiled: November 26, 2008Date of Patent: March 10, 2015Assignee: Micron Technology, Inc.Inventor: James Brian Johnson
-
Patent number: 8966165Abstract: Solid state storage devices and methods for flash translation layers are disclosed. In one such translation layer, a sector indication is translated to a memory location by a parallel unit look-up table is populated by memory device enumeration at initialization. Each table entry is comprised of communication channel, chip enable, logical unit, and plane for each operating memory device found. When the sector indication is received, a modulo function operates on entries of the look-up table in order to determine the memory location associated with the sector indication.Type: GrantFiled: August 25, 2014Date of Patent: February 24, 2015Assignee: Micron Technology, Inc.Inventor: Troy Manning
-
Patent number: 8949549Abstract: A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the buffer. The method includes for the consumer and the producer to indicate intent to acquire ownership of the buffer. In response to the indication of intent, the producer, consumer, buffer are prepared for the access. If the consumer intends to acquire the buffer, the producer places the cache data into the buffer. If the producer intends to acquire the buffer, the consumer removes the cache data from the buffer. The access to the buffer, however, is delayed until the producer, consumer, and the buffer are prepared.Type: GrantFiled: November 26, 2008Date of Patent: February 3, 2015Assignee: Microsoft CorporationInventors: David T. Harper, III, Charles David Callahan, II
-
Patent number: 8943295Abstract: A system and method for mapping file block numbers (FBNs) to logical block addresses (LBAs) is provided. The system and method performs the mapping of FBNs to LBAs in a file system layer of a storage operating system, thereby enabling the use of clients in a storage environment that have not been modified to incorporate mapping tables. As a result, a client may send data access requests to the storage system utilizing FBNs and have the storage system perform the appropriate mapping to LBAs.Type: GrantFiled: October 10, 2008Date of Patent: January 27, 2015Assignee: NetApp, Inc.Inventor: Vijayan Rajan
-
Patent number: 8935495Abstract: A method, computer program product, and system for managing storage space in a virtualized computing environment. The method includes a computer determining, by one or more computer processors, that a virtual computer system has reached a threshold level of minimum available storage space. The storage space of the computer system is searched for an inactive snapshot file. When the inactive snapshot file is located, the inactive snapshot file is moved to a secondary storage.Type: GrantFiled: August 21, 2012Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Stefan Bender, Nils Haustein, Christian Mueller, Dominic Mueller-Wicke
-
Patent number: 8918577Abstract: In a three-dimensional nonvolatile memory, physical levels in blocks are zoned and different zones store different numbers of bits per cell so that different blocks have different data capacities. Block data capacities are calculated and recorded, and may be updated as data capacities change. User data is mapped to blocks according to their respective data capacities.Type: GrantFiled: June 13, 2014Date of Patent: December 23, 2014Assignee: SanDisk Technologies Inc.Inventors: Sergey Anatolievich Gorobets, Jian Chen
-
Patent number: 8909890Abstract: A scalable, performance-based, volume allocation technique that can be applied in large storage controller collections is disclosed. A global resource tree of multiple nodes representing interconnected components of a storage system is analyzed to yield gap values for each node for a specific time period. The gap value for each node is an estimate of the amount of the additional or increased workload that can be allocated in the subtree of that node without exceeding the performance and space bounds at any of the nodes in that subtree for the specific time period. The gap values of the global resource tree are further analyzed to generate an ordered allocation list of the volumes of the storage system.Type: GrantFiled: February 22, 2010Date of Patent: December 9, 2014Assignee: International Business Machines CorporationInventors: Binny S. Gill, Madhukar R. Korupolu
-
Patent number: 8904140Abstract: Provided is a user-friendly information processing system which is capable of maintaining latency within a fixed range and ensuring the expandability of a memory capacity at high speed and low cost. The information processing system, including an information processing device, a volatile memory, and nonvolatile memories, is configured. The information processing device, the volatile memory, and the nonvolatile memories are connected in series with one another to reduce the number of connection signals, thereby realizing speeding-up while maintaining the expandability of the memory capacity. The information processing device manages response time zones and time zones where responses overlap one another, and performs a correction operation on the latency, thereby realizing fast data transfer while maintaining the latency within the fixed range. The information processing device performs an error correction to improve the reliability when transferring the data of the nonvolatile memories to the volatile memory.Type: GrantFiled: May 22, 2009Date of Patent: December 2, 2014Assignee: Hitachi, Ltd.Inventor: Seiji Miura
-
Patent number: 8904131Abstract: A system according to one embodiment, includes one or more source volumes on a source storage subsystem from which data is copied in first copy services relationships, the one or more source volumes being accessible to an application; one or more original target volumes on an original target storage subsystem to which data is copied in the first copy services relationships; logic configured for selecting a new target storage subsystem to replace the original target storage subsystem; logic configured for creating second copy services relationships between one or more new target volumes on the new target storage subsystem and the one or more source volumes on the source storage subsystem using multi-target functionality; and logic configured for terminating the first copy services relationships after all of the second copy services relationships are full duplex.Type: GrantFiled: August 22, 2012Date of Patent: December 2, 2014Assignee: International Business Machines CorporationInventors: Amy N. Blea, David R. Blea, Gregory E. McBride, John J. Wolfgang
-
Patent number: 8904086Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.Type: GrantFiled: February 22, 2010Date of Patent: December 2, 2014Assignee: Phison Electronics Corp.Inventors: Lai-Hock Chua, Kheng-Chong Tan
-
Patent number: 8898404Abstract: A memory management method is provided to manage a memory in which areas of a garbage collected Java heap memory and a non-garbage collected external heap memory can be secured, by using a program executed by a processor in a computer. If it is judged that there is no reference to all data arranged in the external heap memory or starting point data of reference relations included in the all data, from data arranged outside the external heap memory, then the external heap memory is judged to be capable of being deallocated. As a result, it becomes possible to implement memory management in which garbage collection needing a long time program stop is not conducted and an additional API is not used.Type: GrantFiled: October 28, 2009Date of Patent: November 25, 2014Assignee: Hitachi, Ltd.Inventors: Motoki Obata, Hiroyasu Nishiyama, Masahiko Adachi
-
Patent number: 8892836Abstract: In one embodiment, a method for switching a storage subsystem in a disaster recovery configuration includes receiving instruction to change from an original target storage subsystem in a disaster recovery configuration including: a source storage subsystem including one or more source volumes from which data is copied in first copy services relationships, the one or more source volumes being accessible to an application, and the original target storage subsystem including one or more original target volumes to which data is copied in the first copy services relationships; selecting a new target storage subsystem to replace the original target storage subsystem, creating second copy services relationships between one or more new target volumes on the new target storage subsystem and the one or more source volumes on the source storage subsystem using multi-target functionality, and terminating the first copy services relationships after all the second copy services relationships are full duplex.Type: GrantFiled: October 31, 2013Date of Patent: November 18, 2014Assignee: International Business Machines CorporationInventors: Amy N. Blea, David R. Blea, Gregory E. McBride, John J. Wolfgang
-
Patent number: 8886896Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing live media streams are disclosed. A storage format that can be used to record and then playback live streams including data-streams, audio-streams, video-streams, and other multi-media streams is also disclosed. The disclosed storage format is referred to as “raw”.Type: GrantFiled: October 30, 2009Date of Patent: November 11, 2014Assignee: Adobe Systems IncorporatedInventors: Wesley McCullough, Asa Whillock