Patents Examined by David Cathey, Jr.
  • Patent number: 8597539
    Abstract: This invention relates to a chemical composition for chemical mechanical polishing (CMP) of substrates that are widely used in the semiconductor industry. The inventive chemical composition contains additives that are capable of improving consistency of the polishing performance and extending the lifetime of a polishing pad.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 3, 2013
    Assignee: BASF SE
    Inventors: Yuzhuo Li, Harvey Wayne Pinder, Shyam S. Venkataraman
  • Patent number: 8562849
    Abstract: Methods and apparatus for processing edge portions of a donor semiconductor wafer include controlling chemical mechanical polishing parameters to achieve chamfering of the edges of the donor semiconductor wafer; and alternatively or additionally flexing the donor semiconductor wafer to present a concave configuration, where edge portions thereof are pronounced as compared to a central surface area thereof, such that the pronounced edge portions of the donor semiconductor wafer are preferentially polished against a polishing surface in order to achieve the chamfering.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: October 22, 2013
    Assignee: Corning Incorporated
    Inventors: Jonas Bankaitis, Michael John Moore, Jeffery Scott Stone, Paul Jeffrey Williamson, Chunhe Zhang
  • Patent number: 8562846
    Abstract: A mold capable of a highly accurate alignment with a member to be processed in such a state that a photocurable resin material is disposed between the mold and the member to be processed, and is constituted by a substrate 2010 formed of a first material and an alignment mark 2102 formed of a second material different from the first material. The first material and the second material have transmissivities to light in a part of an ultraviolet wavelength range. The second material has a refractive index of not less than 1.7.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: October 22, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsunori Terasaki, Junichi Seki, Nobuhito Suehira, Hideki Ina, Shingo Okushima
  • Patent number: 8551352
    Abstract: The invention relates to a method for producing a device with a membrane used to encapsulate a fluid contained in a cavity, in which: two substrates (110, 120) are provided; a membrane (111) is placed on one and/or on the other of the substrates; one or more walls (113) are formed, helping to laterally define the cavity (114), in which said walls are located on or in one of the substrates and/or on or in the other of the substrates, and said cavity is intended to contain the fluid, the two substrates (110, 120) are assembled together by superimposing one on the other so as to complete the cavity, in which the or each membrane (111) also helps to define the cavity, the fluid (117) is encapsulated in the cavity between the substrates, and the or each membrane is soaked by the fluid, at least a portion of one of the substrates and/or the other of the substrates is removed insofar as one and/or the other of the substrates are equipped with a membrane, in order to release the membrane at least in the central po
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 8, 2013
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Arnaud Pouydebasque, Sébastien Bolis, Fabrice Jacquet
  • Patent number: 8545711
    Abstract: A processing method performs a predetermined process to an object by supplying a process gas at a prescribed flow rate into a process container to which a gas supply unit and an exhaust system are connected. The processing method includes a first process of setting the gas supply unit to supply a process gas at a flow rate greater than the prescribed flow rate of a predetermined process for a predetermined short time from a gas channel while exhausting an atmosphere in the process container through the exhaust system; and a second process of setting the gas supply unit to supply the process gas at the prescribed flow rate from the gas channel after the first process is completed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: October 1, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Toshihisa Nozawa, Koji Kotani, Kouji Tanaka
  • Patent number: 8545716
    Abstract: A metal film such as an aluminum film or an aluminum alloy film is etched with good controllability, preventing a resist from bleeding, to have a proper taper configuration and superior flatness. A water solution containing a phosphoric acid, a nitric acid, and an organic acid salt is used as an etching liquid composition used to etch the metal film on a substrate. The organic acid salt is composed of one kind selected from a group consisting of an aliphatic monocarboxylic acid, an aliphatic polycarboxylic acid, an aliphatic oxicarboxylic acid, an aromatic monocarboxylic acid, an aromatic polycarboxylic acid and an aromatic oxycarboxylic acid, and one kind selected from a group consisting of an ammonium salt, an amine salt, a quaternary ammonium salt, and an alkali metal salt. In addition, a concentration of the organic acid salt ranges from 0.1% to 20% by weight.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: October 1, 2013
    Assignees: Hayashi Pure Chemical Ind., Ltd., Sanyo Electric Co., Ltd., SANYO Semiconductor Manufacturing Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Tsuguhiro Tago, Tomotake Matsuda, Mayumi Kimura, Tetsuo Aoyama
  • Patent number: 8545709
    Abstract: Thickness of a residual layer may be altered to control critical dimension of features in a patterned layer provided by an imprint lithography process. The thickness of the residual layer may be directly proportional or inversely proportional to the critical dimension of features. Dispensing techniques and material selection may also provide control of the critical dimension of features in the patterned layer.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: October 1, 2013
    Assignee: Molecular Imprints, Inc.
    Inventors: Cynthia B. Brooks, Dwayne L. LaBrake, Niyaz Khusnatdinov, Michael N. Miller, Sidlgata V. Sreenivasan, David James Lentz, Frank Y. Xu
  • Patent number: 8535545
    Abstract: A method for fabricating a pellicle of an EUV mask is provided. An insulation layer is formed over a silicon substrate, and a mesh is formed over the insulation layer. A frame exposing a rear surface of the insulation layer is formed by selectively removing a center portion of a rear surface of the silicon substrate. A membrane layer is deposited over the mesh and an exposed top surface of the insulation layer which is adjacent to the mesh. A rear surface of the membrane layer is exposed by selectively removing the portion of the insulation layer which is exposed by the frame.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: September 17, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yong Dae Kim
  • Patent number: 8529775
    Abstract: A painted surface is processed by a laser beam to remove at least one layer of paint. The surface that is exposed may be the raw substrate material, e.g., wood or wood laminate, or may be another painted surface. The laser may engrave a pattern, e.g. a wood grain pattern.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: September 10, 2013
    Assignee: Revolaze, LLC
    Inventors: Darryl J Costin, Darryl Costin, Jr., Richard C. Fishburn
  • Patent number: 8524555
    Abstract: Methods and apparatus for providing constant emissivity of the backside of susceptors are described. Provided is a method comprising: providing a susceptor in a deposition chamber, the susceptor comprising a susceptor plate and a layer comprising an oxide, a nitride, an oxynitride, or combinations thereof, the layer being stable in the presence of the reactive process gases; and locating the wafer on a support surface of the susceptor plate. The method can further comprise selectively depositing an epitaxial layer or a non-epitaxial layer on a surface of the wafer. The method can also further comprise selectively etching to maintain the oxide, nitride, oxynitride, or combinations thereof layer.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: September 3, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Errol Sanchez, David K. Carlson, Craig Metzner
  • Patent number: 8518723
    Abstract: A method of fabricating a semiconductor integrated circuit device, including providing a semiconductor substrate, sequentially forming an etching target layer and a hard mask layer on the semiconductor substrate, forming first etch masks on the hard mask layer, the first etch masks including a plurality of first line patterns spaced apart from one another at a first pitch and extending in a first direction, forming first hard mask patterns by etching the hard mask layer using the first etch masks, forming second etch masks on the first hard mask patterns, the second etch masks including a plurality of second line patterns spaced apart from one another at a second pitch and extending in a second direction different from the first direction, forming second hard mask patterns by etching the first hard mask patterns using the second etch masks, forming spacers on sidewalls of the second hard mask patterns, and patterning the etching target layer using the second hard mask patterns having the spacers.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: August 27, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chong-Kwang Chang, Hong-Jae Shin, Nae-In Lee, Kwang-Hyeon Baik, Seung-Il Bok, Hyo-Jeong Kim
  • Patent number: 8506829
    Abstract: A semiconductor hollow-core waveguide using high-contrast gratings or photonic crystal claddings and a method of manufacturing the same includes providing a layered semiconductor structure; creating an etching mask pattern over the layered semiconductor structure; performing a combined cycled directional etching process on the layered semiconductor structure in one sequence and in one lithography level to create a 3-dimensional waveguide structure; and creating a hollow air core in the layered semiconductor structure by removing to define a shape of the waveguide. The etching process comprises vertically etching a series of deep trenches on the layered semiconductor structure with precise control and varying the width of the trench. Furthermore, the hollow air core is created by removing a portion of the sacrificial material located in the center of the waveguide and under the waveguide.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: August 13, 2013
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Weimin Zhou
  • Patent number: 8496842
    Abstract: A planar integrated MEMS device has a piezoelectric element on a dielectric isolation layer over a flexible element attached to a proof mass. The piezoelectric element contains a ferroelectric element with a perovskite structure formed over an isolation dielectric. At least two electrodes are formed on the ferroelectric element. An upper hydrogen barrier is formed over the piezoelectric element. Front side singulation trenches are formed at a periphery of the MEMS device extending into the semiconductor substrate. A DRIE process removes material from the bottom side of the substrate to form the flexible element, removes material from the substrate under the front side singulation trenches, and forms the proof mass from substrate material. The piezoelectric element overlaps the flexible element.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 30, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Kezhakkedath R. Udayakumar, Marie Denison, Ted S. Moise
  • Patent number: 8475670
    Abstract: A method for manufacturing a patterned magnetic media. The method allows both a data region and a servo region to be patterned without the patterning of one region adversely affecting the patterning of the other region. The method results in a patterned data region a patterned servo region and intermediate regions between the servo and data regions. The intermediate regions, which are most likely, but not necessarily, asymmetrical with one another indicate that the method has been used to pattern the media.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: July 2, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Michael K. Grobis, Jeffrey S. Lille, Ricardo Ruiz
  • Patent number: 8449783
    Abstract: A liquid ejection head substrate is manufactured by forming a wiring pattern on one surface of a substrate, forming an etching mask layer on the other surface of the substrate, forming a positioning reference mark on the etching mask layer by means of a laser, forming an opening pattern groove running through the etching mask layer and having a bottom in the inside of the silicon substrate, using the positioning reference mark, and forming a liquid supply port running through the silicon substrate by etching the silicon substrate from the opening pattern groove to the one surface by means of crystal anisotropic etching.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: May 28, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Keiji Watanabe
  • Patent number: 8440098
    Abstract: The invention relates to a composition which comprises 1 to 80% by weight of at least one acid which has a pKa of 2 or less; a protic solvent; a complexing agent for Ca2+ ions; for use as conditioning agent for etching enamel lesions.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: May 14, 2013
    Assignee: Ernst Muhlbauer GmbH & Co. KG
    Inventors: Stephan Neffgen, Swen Neander, Dierk Lubbers
  • Patent number: 8440574
    Abstract: A method for ashing hardened resist from a photoresist patterned chromium alloy post etch using a plasma ashing chemistry which contains no gaseous source of hydrogen and contains a gaseous source of oxygen and a gaseous source of nitrogen with an oxygen to nitrogen atomic ratio of at least 5.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: May 14, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Abbas Ali
  • Patent number: 8440572
    Abstract: A Si etching method includes: arranging a silicon substrate or a substrate having a silicon layer in a processing chamber; generating a plasma of an etching gas in the processing chamber; and etching the silicon substrate by the plasma. The etching gas is a gaseous mixture including a Br2 gas and one of a Cl2 gas and a chloride gas. The chloride gas has a mass that is higher than that of the Cl2 gas.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: May 14, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Masanobu Honda
  • Patent number: 8431029
    Abstract: Provided are a circuit board and a method of manufacturing the same. The method includes: forming a pad portion and a lead line portion of a metal on an insulating substrate, wherein the lead line portion is connected to the pad portion; forming a conductive layer on the pad portion and the lead line portion, wherein the conductive layer has an upper surface comprising gold; forming an etching mask on the conductive layer so as to expose a portion corresponding to the lead line portion in the conductive layer; etching a portion of the lead line portion exposed by the etching mask and a portion of the conductive layer corresponding to the lead line portion using an etching solution containing an acid; and removing the etching mask.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: April 30, 2013
    Assignee: Samsung Techwin Co., Ltd.
    Inventors: Young-duck Kwon, Deok-heung Kim
  • Patent number: 8425797
    Abstract: The invention provides compositions and methods for planarizing or polishing a substrate. The composition comprises an abrasive consisting of alumina particles optionally treated with a polymer, an ?-hydroxycarboxylic acid, an oxidizing agent that oxidizes at least one metal, polyacrylic acid, optionally, a calcium-containing compound, optionally, a biocide, optionally, a pH adjusting agent, and water. The method uses the composition to chemically-mechanically polish a substrate.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: April 23, 2013
    Assignee: Cabot Microelectronics Corporation
    Inventors: Vlasta Brusic, Christopher Thompson, Jeffrey Dysard