Patents Examined by David Cathey, Jr.
  • Patent number: 9245545
    Abstract: A method of forming a single layer inductive coil structure includes forming a first conductive coil on a substrate, forming an insulating layer by atomic layer deposition (ALD) over the first coil and the substrate, and forming one or more additional conductive coils on each of adjacent sides of the first coil insulated from the first coil and the substrate by the insulating layer. A method of forming a stacked layer inductive coil includes forming a cavity in a substrate, forming a first coil in the cavity wherein the cavity has an atomic layer deposition (ALD) layer, forming a second coil in the cavity adjacent to the first coil and separated by the ALD layer from the first coil, forming an insulating layer over the first and second coil, and forming a third coil on the insulating layer.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: January 26, 2016
    Assignee: Wester Digital (Fremont), LLC
    Inventors: Ut Tran, Yunhe Huang, Keith Y. Sasaki, Curtis V. Macchioni, Zhigang Bai
  • Patent number: 9238753
    Abstract: The invention provides a chemical-mechanical polishing composition containing a ceria abrasive, one or more nonionic polymers, optionally one or more phosphonic acids, optionally one or more nitrogen-containing zwitterionic compounds, optionally one or more sulfonic acid copolymers, optionally one or more anionic copolymers, optionally one or more polymers comprising quaternary amines, optionally one or more compounds that adjust the pH of the polishing compositions, water, and optionally one or more additives. The invention further provides a method of chemically-mechanically polishing a substrate with the inventive chemical-mechanical polishing composition. Typically, the substrate contains silicon oxide, silicon nitride, and/or polysilicon.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: January 19, 2016
    Assignee: Cabot Microelectronics Corporation
    Inventors: Brian Reiss, Glenn Whitener
  • Patent number: 9224414
    Abstract: A method for manufacturing a magnetic recording medium includes the steps of depositing a magnetic layer on at least one of surfaces of a nonmagnetic substrate and injecting atoms partially in the magnetic layer, thereby demagnetizing parts having admitted the injected atoms or imparting amorphousness thereto, to form a magnetically separated magnetic recording pattern. The step of injecting includes the steps of applying resist to the at least one surface subsequent to the step of depositing, partially decreasing a thickness of the resist and irradiating a surface of the resist with atoms, thereby inducing partial injection of the atoms to the magnetic layer through portions of the resist decreased in thickness.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: December 29, 2015
    Assignee: SHOWA DENKO K.K.
    Inventors: Masato Fukushima, Akira Sakawaki, Katsumasa Hirose
  • Patent number: 9224655
    Abstract: One illustrative method disclosed herein includes the steps of forming a masking layer that covers a P-type transistor and exposes at least a gate cap layer of an N-type transistor, performing a first etching process through the masking layer to remove a portion of the gate cap of the N-type transistor so as to thereby define a reduced thickness gate cap layer for the N-type transistor, removing the masking layer, and performing a common second etching process on the P-type transistor and the N-type transistor that removes a gate cap layer of the P-type transistor and the reduced thickness gate cap of the N-type transistor.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: December 29, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Peter Javorka, Ralf Richter, Stefan Flachowsky, Jan Hoentschel
  • Patent number: 9222959
    Abstract: The invention relates to a nanofiber fabrication method comprising nanofiber growth from a catalyst zone, furthermore comprising the following steps: producing at least one micropattern (11) on the surface of a substrate (1); producing a catalyst zone (50) on the surface of said micropattern; nanofiber growth from the catalyst zone, characterized in that the micropattern (11) comprises a base, at least partially convergent side walls and an upper face, said base being covered with a so-called “poison” layer (4) where no nanofiber growth catalysis effect can take place, the so-called “poison” layer not being present on said upper face; the base being covered with a catalyst layer (5) on the surface of the so-called “poison” layer; the thickness of the “poison” layer and the thickness of the catalyst layer being such that the nanofibers cannot grow either on the side walls or on the base of the micropatterns constructed beforehand.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: December 29, 2015
    Assignee: Commissariat A L'Engergie Atomique
    Inventors: Louis Gorintin, Jean Dijon, Hélène Le Poche, Denis Mariolle
  • Patent number: 9202709
    Abstract: A liquid for polishing a metal is provided that is used for chemically and mechanically polishing a conductor film including copper or a copper alloy in production of a semiconductor device, and a polishing method using the metal-polishing liquid is also provided. The liquid includes: (a) colloidal silica particles having an average primary particle size of from 10 nm to 25 nm and an average secondary particle size of from 50 nm to 70 nm; (b) a metal anticorrosive agent; (c) at least one compound selected from the group consisting of a surfactant and a water-soluble polymer compound; (d) an oxidizing agent; and (e) an organic acid.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: December 1, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Takamitsu Tomiga, Tomoo Kato, Tadashi Inaba, Masaru Yoshikawa
  • Patent number: 9181100
    Abstract: The present invention relates to a method of transferring a graphene film comprising the steps of (A) providing a carrier, wherein the carrier has a first surface, and a second surface, and a first graphene film is formed on the first surface; (B) disposing a patterned protection layer on the second surface of the carrier; (C) patternin carrier with the first graphene film on a target substrate; (E) removing the the carrier to expose the first graphene film; (D) disposing the patterned carrier to transfer the first graphene film on the substrate.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: November 10, 2015
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Yon-Hua Tzeng, Wai-Leong Chen
  • Patent number: 9177823
    Abstract: A plasma etching method includes etching an amorphous carbon film by a plasma of an oxygen-containing gas using, as a mask, an SiON film having a predetermined pattern formed on a target object, etching a silicon oxide film by a plasma of a processing gas using the amorphous carbon film as a mask while removing the SiON film remaining on the etched amorphous carbon film by the plasma of the processing gas. The plasma etching method further includes modifying the amorphous carbon film by a plasma of a sulfur-containing gas or a hydrogen-containing gas while applying a negative DC voltage to an upper electrode containing silicon after the SiON film is removed from the amorphous carbon film, and etching the silicon oxide film again by the plasma of the processing gas using the modified amorphous carbon film as a mask.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: November 3, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Yuta Seya
  • Patent number: 9164130
    Abstract: A method for manufacturing a probe, includes forming a recess on a sacrificial layer with a resist matching a plane pattern of the probe and a fixing tab connected to the probe, the recess exposing the sacrificial layer, which is on a baseboard, forming the probe and the fixing tab connected to the probe by depositing a probe material in the recess, and removing the resist, removing a portion of the sacrificial layer in an etching process. The portion of the sacrificial layer under the probe is fully removed, while the portion of the sacrificial layer under the fixing tab is left to provide support portions of the sacrificial layer under the fixing tab. Then the probe is removed from the baseboard.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: October 20, 2015
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventor: Mika Nasu
  • Patent number: 9142467
    Abstract: A method and apparatus for etching a photomask substrate with enhanced process monitoring is provided. In one embodiment, a method of determining an etching endpoint includes performing an etching process on a first tantalum containing layer through a patterned mask layer, directing a radiation source having a first wavelength from about 200 nm and about 800 nm to an area uncovered by the patterned mask layer, collecting an optical signal reflected from the area covered by the patterned mask layer, analyzing a waveform obtained the reflected optical signal reflected from the substrate from a first time point to a second time point, and determining a first endpoint of the etching process when a slope of the waveform is changed about 5 percent from the first time point to the second time point.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: September 22, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Michael Grimbergen
  • Patent number: 9139771
    Abstract: In order to provide a copper oxide etchant and an etching method using the same capable of selectively etching exposure/non-exposure portions when laser light exposure is performed by using copper oxide as a thermal-reactive resist material, the copper oxide etchant for selectively etching copper oxides having different oxidation numbers in a copper oxide-containing layer containing the copper oxide as a main component contains at least a chelating agent or salts thereof.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: September 22, 2015
    Assignee: ASAHI KASEI E-MATERIALS CORPORATION
    Inventors: Norikiyo Nakagawa, Takuto Nakata, Yoshimichi Mitamura
  • Patent number: 9117769
    Abstract: In a plasma etching method of performing a plasma etching on an amorphous carbon layer of a substrate to be processed by using an inorganic film as a mask, the substrate being mounted in a processing chamber, the plasma etching on the amorphous carbon layer is performed by using O2 gas as a processing gas and the O2 gas to flow in the processing chamber such that a residence time of the O2 gas becomes 0.37 msec or less. The amorphous carbon layer is used as an etching mask of an etching target film formed on the substrate. The plasma etching is performed by using the O2 gas only.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 25, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Kousuke Koiwa
  • Patent number: 9093104
    Abstract: A novel technique for manufacturing bit patterned media is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for manufacturing bit pattern media. The technique, which may be realized as a method comprising: forming a non-catalysis region on a first portion of a catalysis layer; forming a non-magnetic separator on the non-catalysis region; and forming a magnetic active region on a second portion of the catalysis layer adjacent to the first portion of the catalysis layer.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: July 28, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Frank Sinclair, Julian G. Blake, Helen L. Maynard, Alexander C. Kontos
  • Patent number: 9085731
    Abstract: The present invention is a method for producing a light-emitting body containing silicon fine particles that emit visible light, comprising: a baking step of baking a mixture containing a silicon source and a carbon source in an inert atmosphere; a rapid cooling step of rapidly cooling a gas generated by baking the mixture to obtain a composite powder; and a removing step of removing a portion of the composite powder, wherein in the removing step, a portion of silicon monoxide and a portion of silicon dioxide are removed from the composite powder containing silicon fine particles, silicon monoxide, and silicon dioxide.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: July 21, 2015
    Assignee: BRIDGESTONE CORPORATION
    Inventors: Mari Miyano, Yoshinori Iwabuchi, Shinobu Endou, Shingo Oono
  • Patent number: 9062230
    Abstract: Methods for removing, reducing or treating the trace metal contaminants and the smaller fine sized cerium oxide particles from cerium oxide particles, cerium oxide slurry or chemical mechanical polishing (CMP) compositions for Shallow Trench Isolation (STI) process are applied. The treated chemical mechanical polishing (CMP) compositions, or the CMP polishing compositions prepared by using the treated cerium oxide particles or the treated cerium oxide slurry are used to polish substrate that contains at lease a surface comprising silicon dioxide film for STI (Shallow trench isolation) processing and applications. The reduced nano-sized particle related defects have been observed due to the reduced trace metal ion contaminants and reduced very smaller fine cerium oxide particles in the Shallow Trench Isolation (STI) CMP polishing.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: June 23, 2015
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Xiaobo Shi, John Edward Quincy Hughes, Hongjun Zhou, Daniel Hernandez Castillo, II, Jae Ouk Choo, James Allen Schlueter, Jo-Ann Theresa Schwartz, Laura Ledenbach, Steve Charles Winchester, Saifi Usmani, John Anthony Marsella, Martin Kamau Ngigi Mungai
  • Patent number: 9048031
    Abstract: Multilayer carbon nanotube capacitors, and methods and printable compositions for manufacturing multilayer carbon nanotubes (CNTs) are disclosed. A first capacitor embodiment comprises: a first conductor; a plurality of fixed CNTs in an ionic liquid, each fixed CNT comprising a magnetic catalyst nanoparticle coupled to a carbon nanotube and further coupled to the first conductor; and a first plurality of free CNTs dispersed and moveable in the ionic liquid. Another capacitor embodiment comprises: a first conductor; a conductive nanomesh coupled to the first conductor; a first plurality of fixed CNTs in an ionic liquid and further coupled to the conductive nanomesh; and a plurality of free CNTs dispersed and moveable in the ionic liquid. Various methods of printing the CNTs and other structures, and methods of aligning and moving the CNTs using applied electric and magnetic fields, are also disclosed.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: June 2, 2015
    Assignee: NthDegree Technologies Worldwide Inc.
    Inventors: William Johnstone Ray, Neil O. Shotton, Vera Nicholaevna Lockett, Theodore I. Kamins, Thomas William Clinton, Mark David Lowenthal
  • Patent number: 9039909
    Abstract: There is provided a plasma etching method for forming a hole in a silicon oxide film formed on an etching stopper layer. The plasma etching method includes a main etching process for etching the silicon oxide film; and an etching process that is performed when at least a part of the etching stopper layer is exposed after the main etching process. The etching process includes a first etching process using a gaseous mixture of a C4F6 gas, an Ar gas and an O2 gas as the processing gas; and a second etching process using a gaseous mixture of a C4F8 gas, an Ar gas and an O2 gas or a gaseous mixture of a C3F8 gas, an Ar gas and an O2 gas as the processing gas. The first etching process and the second etching process are alternately performed plural times.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: May 26, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Nakagawa, Yuji Otsuka
  • Patent number: 9039907
    Abstract: A method is described for improving the uniformity over a predetermined substrate area of a spectral response of photonic devices fabricated in a thin device layer. The method includes (i) establishing an initial device layer thickness map for the predetermined area, (ii) establishing a linewidth map for the predetermined area, and (iii) establishing an etch depth map for the predetermined area. The method further includes, based on the initial device layer thickness map, the linewidth map and the etch depth map, calculating an optimal device layer thickness map and a corresponding thickness correction map for the predetermined substrate area taking into account photonic device design data. Still further, the method includes performing a location specific corrective etch process in accordance with the thickness correction map.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: May 26, 2015
    Assignees: IMEC, Universiteit Gent
    Inventors: Philippe Absil, Shankar Kumar Selvaraja
  • Patent number: 9005456
    Abstract: Disclosed herein is a method for manufacturing a printed circuit board, wherein a protective film for stripping and a metal layer closely adhered to the protective film for stripping are formed on an inner layer pad to protect the inner layer pad at the time of laser processing related to cavity processing and applying an etchant, thereby making it possible to improve reliability of a product.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: April 14, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kwang Sun You, Seung Ryeol Lee, Sang Hoon Park, Kyung Jin Heo, Jae Ho Shin, Joong Hyuk Jung
  • Patent number: 8999179
    Abstract: A method of forming a conductive via in a substrate includes forming a via hole covered by a dielectric layer followed by an annealing process. The dielectric layer can getter the mobile ions from the substrate. After removing the dielectric layer, a conductive material is formed in the via hole, forming a conductive via in the substrate.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: April 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Der-Chyang Yeh