Patents Examined by David Martinez
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Patent number: 9021150Abstract: A storage device including a non-volatile memory configured to store data from a host, and a controller. The controller is configured to detect when the host is in a low power periodic update mode, the detecting based at least on part on a timing of a communication from the host, and place the storage device in a power up in standby mode when the host is in the low power periodic update mode.Type: GrantFiled: October 7, 2013Date of Patent: April 28, 2015Assignee: Western Digital Technologies, Inc.Inventors: Kent W. Gibbons, Dean V. Dang, Colin W. Morgan
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Patent number: 9015379Abstract: A method of controlling the data communication in a communications network having a central data server provided data through multiple data queues. The data arriving at the central data server may be stored in each of the multiple data queues. The data in the multiple data queues may then be supplied to the central data server based on a predetermined schedule.Type: GrantFiled: October 11, 2013Date of Patent: April 21, 2015Assignee: GE Aviation Systems, LLCInventor: Pavlo Bobrek
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Patent number: 9015359Abstract: According to one embodiment, an electronic device includes an execution module, and an execution controller. The execution controller is configured to, when a key operation is entered while demonstration data is being executed, move an execution position in the demonstration data in units of blocks correspondingly to the key operation. The executing module is configured to start the execution of the demonstration data from the moved execution position.Type: GrantFiled: June 26, 2013Date of Patent: April 21, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Hayato Nishimura
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Patent number: 9003085Abstract: An aircraft communication system including an aircraft terminal connected to at least one input/output unit. The system includes a portable resource connected to the aircraft terminal via a network connection. The at least one input/output unit is configured to interact with the unit formed by the aircraft terminal and the portable resource.Type: GrantFiled: March 28, 2008Date of Patent: April 7, 2015Assignee: AirbusInventor: Frederic Saugnac
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Patent number: 9003078Abstract: A system and method is described for managing subscriptions between a consumer mobile phone, merchant server, billing server and carrier server. A charge-info method is used for the merchant server to retrieve charge elements from the billing server for constructing a user interface for the consumer mobile phone. An opt-in method is used to confirm a consumer's opt-in for a subscription. A remind-charge method is used to remind the consumer of an upcoming charge on the subscription. A charge method allows the merchant server to charge a user account on a carrier server via the billing server. A cancel method is used for the consumer to cancel the subscription.Type: GrantFiled: March 18, 2013Date of Patent: April 7, 2015Assignee: Boku, Inc.Inventors: John P. Browne, James C. McIntyre, Marcin L. Pawlowski
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Patent number: 9003079Abstract: A phone-on-file opt-in method is described. A phone-on-file opt-in request is received at the billing server including a msisdn and a merchant supplied unique consumer identifier. The billing server confirms the phone-on-file opt-in with a consumer device and records a phone-on-file opt-in status as active if the first phone-on-file is confirmed. A charge method includes receiving, at the billing server, a charge API call from a merchant server including at least one identifier and an amount, determining a phone-on-file opt-in status corresponding to the identifier at the billing server and transmitting a request to charge a user account to a carrier server if the phone-on-file opt-in status is active, but not if the phone-on-file opt-in status is inactive, the request including an amount corresponding to the amount received in the charge API call.Type: GrantFiled: June 26, 2013Date of Patent: April 7, 2015Assignee: Boku, Inc.Inventors: John P. Browne, Pankhudi Pankhudi, Natalya Elkanova, James C. McIntyre, Annie Minh Ma
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Facilitating, at least in part, by circuitry, accessing of at least one controller command interface
Patent number: 8996755Abstract: An embodiment may include circuitry to facilitate, at least in part, a first network interface controller (NIC) in a client to be capable of accessing, via a second NIC in a server that is remote from the client and in a manner that is independent of an operating system environment in the server, at least one command interface of another controller of the server. The command interface may include at least one controller command queue. Such accessing may include writing at least one queue element to the at least one command queue to command the another controller to perform at least one operation associated with the another controller. The another controller may perform the at least one operation in response, at least in part, to the at least one queue element. Many alternatives, variations, and modifications are possible.Type: GrantFiled: January 23, 2014Date of Patent: March 31, 2015Assignee: Intel CorporationInventors: Eliezer Tamir, Ben-Zion Friedman, Theodore L. Willke, Eliel Louzoun, Matthew R. Wilcox, Donald E. Wood, Steven B. McGowan, Robert O. Sharp -
Patent number: 8990451Abstract: The subject of the invention is in particular the direct transfer of data between first and second peripherals connected via a communication bus. For this purpose, the first peripheral comprises a controller for direct access to a memory having means (425) for initiating at least one command for direct access to a region of a memory external to said first peripheral and means (400) for receiving at least one command for direct access to a region of a memory of said first peripheral, said command being received from said at least one second peripheral, and means (415) for transmitting said at least one received direct access command to a component of said first peripheral. The controller thus allows a controller of direct access to a memory of said at least one second peripheral to carry out a direct transfer of at least one data item to or from a memory of said first peripheral from or to said second peripheral.Type: GrantFiled: November 24, 2010Date of Patent: March 24, 2015Assignee: Bull SASInventors: Philippe Couvee, Jean-Vincent Ficet, Yann Kalemkarian
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Patent number: 8984178Abstract: A method, non-transitory computer readable medium, and a system for communicating with networked clients and servers through a network device includes receiving a first network data packet destined for a first executing traffic management application of a plurality of executing traffic management applications operating in the network device. A first DMA channel is identified to allocate the received first network data packet. Further, the first network data packet is transmitted to the first traffic management executing application over the first identified DMA channel.Type: GrantFiled: December 14, 2012Date of Patent: March 17, 2015Assignee: F5 Networks, Inc.Inventors: Timothy Michels, William R. Baumann
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Patent number: 8972624Abstract: Described herein are methods and systems for virtualization of a USB device to enable sharing of the USB device among a plurality of host processors in a multi-processor computing system. A USB virtualization unit for sharing of the USB device include a per-host register unit, each corresponding to a host processor includes one or more of a host register interface, host data interface, configuration registers, and host control registers, configured to receive simultaneous requests from one or more host processors from amongst the plurality of host processors for the USB device. The USB virtualization unit also includes a pre-fetch direct memory access (DMA) configured to pre-fetch DMA descriptors associated with the requests to store in a buffer. The USB virtualization unit further includes an endpoint specific switching decision logic (ESL) configured to schedule data access based on the DMA descriptors from the host processor's local memory corresponding to each request.Type: GrantFiled: April 9, 2012Date of Patent: March 3, 2015Assignee: Ineda Systems Pvt. Ltd.Inventors: Balaji Kanigicherla, Siva Raghuram Voleti, Surya Narayana Dommeti, Krishna Mohan Tandaboina, Rajani Lotti
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Patent number: 8972626Abstract: A content reproducing device includes: an input unit connected to a source side via a content transmission channel for transmitting a content and a control signal transmission channel for transmitting an address representing a physical connection relation of a device; an output unit connected to a sink side via a content transmission channel for transmitting a content and a control signal transmission channel for transmitting an address representing a physical connection relation of a device; and a switch provided between the input and output units and assuming one of a first connection state of connecting between the input and output units and a second connection state of connecting the input unit and a content reproducing unit, the device acquiring the address at the sink side in the first connection state, and setting the acquired address as the address provided to the source side in the second connection state.Type: GrantFiled: June 7, 2012Date of Patent: March 3, 2015Assignee: Sony CorporationInventors: Takashi Sasaki, Ryuya Tachino, Ryo Oguchi, Kenichi Saito
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Patent number: 8972637Abstract: A computer program product, system, and computer implemented method comprising intercepting, by an interceptor, IO send on an IO path to a storage array; sending a copy of the IO and metadata to a message bus, and enabling a consumer to register with the message bus to consume events sent to the message bus.Type: GrantFiled: December 28, 2012Date of Patent: March 3, 2015Assignee: EMC CorporationInventors: John D Hushon, Jr., Nihar K Nanda, Jeffrey M Nick
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Patent number: 8972633Abstract: An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.Type: GrantFiled: January 22, 2013Date of Patent: March 3, 2015Assignee: Virident Systems, Inc.Inventors: Vijay Karamcheti, Kumar Ganapathy, Kenneth Alan Okin, Rajesh Parekh
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Patent number: 8966125Abstract: A system and method for enabling communication is disclosed, wherein the system may include a plurality of media devices configured to cooperate within a media delivery environment; at least one of the media devices having a wireless communication transceiver coupled thereto; a database for storing device-specific command data for the plurality of media devices; and a computing system operable to (a) receive a request from a first media device to interact with a second media device; (b) convert the interaction request into device-specific command data for the second media device; and (c) transmit the device-specific command data to the second media device.Type: GrantFiled: January 19, 2012Date of Patent: February 24, 2015Assignee: WorldVu Satellites LimitedInventor: Gregory Thane Wyler
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Patent number: 8954628Abstract: An electronic device includes a housing, a connector port and a switching device. The connector port receives a peripheral device. The processor is electrically connected to the connector port and includes a detection pin and a 1-wire pin. The switching device is coupled between the connector port and the processor to selectively connect the connector port to one of the detection pin or the 1-wire pin. When the peripheral device is inserted into the connector port, the processor controls the switching device to connect the connector port to the detection pin to determine whether the connected peripheral device is a 1-wire device. When the processor determines that the connected peripheral device is a 1-wire device, the processor controls the switching device to connect the connector port to the 1-wire pin and the processor executes 1-wire communication with the peripheral device via the 1-wire pin.Type: GrantFiled: June 5, 2012Date of Patent: February 10, 2015Assignee: HTC CorporationInventors: Ching-Chung Hung, Yu-Peng Lai, Wei-Chih Chang
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Patent number: 8949483Abstract: Techniques are described for determining data movements. A first plurality of performance goals for a plurality of storage pools and a second plurality of performance goals for a plurality of applications are received. A first I/O classification characterizing a workload of a first data portion is determined. The first I/O classification is one of a predetermined set of I/O classifications. A proposed data movement of the first data portion from a first to a second of the plurality of storage pools is determined in accordance with criteria including a match between the first I/O classification and one of the predetermined set of I/O classifications which is preferred for the second storage pool over one or more other I/O classifications of the predetermined set. The criteria also includes any of the first plurality of performance goals and the second plurality of performance goals.Type: GrantFiled: December 28, 2012Date of Patent: February 3, 2015Assignee: EMC CorporationInventor: Owen Martin
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Patent number: 8943245Abstract: A computing system is disclosed that includes a memory controller in a processor socket normally reserved for a processor. A plurality of non-volatile memory modules may be plugged into memory sockets normally reserved for DRAM memory modules. The non-volatile memory modules may be accessed using a data communication protocol to access the non-volatile memory modules. The memory controller controls read and write accesses to the non-volatile memory modules. The memory sockets are coupled to the processor socket by printed circuit board traces. The data communication protocol to access the non-volatile memory modules is communicated over the printed circuit board traces and through the sockets normally used to access DRAM type memory modules.Type: GrantFiled: January 22, 2013Date of Patent: January 27, 2015Assignee: Virident Systems, Inc.Inventors: Vijay Karamcheti, Kumar Ganapathy, Kenneth Alan Okin, Rajesh Parekh
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Patent number: 8938563Abstract: A method of managing I/Os in a storage system between a first storage layer and a second layer which is a logical abstraction over the first storage layer, comprising of maintaining within the first storage layer of the storage system validity status data indicating a validity status of each one of a plurality of first layer storage segments, in response to a write command that includes payload data which relates to part of an invalid segment providing the second layer with an unaligned write to an invalid segment indication, and in response to receiving the indication at the second layer, providing a modified write command for the invalid segment including initial values combined with the payload data.Type: GrantFiled: December 26, 2012Date of Patent: January 20, 2015Assignee: Kaminario Technologies Ltd.Inventors: Doron Tal, Eyal Gordon
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Patent number: 8935433Abstract: A method of operating HDMI ports. An HDMI port controller assigns virtual addresses when the maximum number of HDMI CEC addresses is exceeded and CEC logical addresses are duplicated with only one HDMI port corresponding to device having a CEC logical address having its port enabled at any given time. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.Type: GrantFiled: October 15, 2013Date of Patent: January 13, 2015Assignee: Sony CorporationInventor: Takashi Hironaka
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Patent number: 8909823Abstract: A data processing device includes a memory, a direct memory access controller including a receiving module configured to receive data coming from outside the device and for writing the data in a main buffer memory of the memory, and a processing unit programmed to read and process data written by the receiving module in a work area of the main buffer memory. The main buffer memory is divided between a used space, where the receiving module is configured not to write, and free space, where the receiving module is configured to write. The processing unit is further programmed to define the work area, and the direct memory access controller includes a buffer memory manager configured to free data written in the main buffer memory, by defining a location of this data as a free space, only when this data is outside the work area.Type: GrantFiled: June 23, 2011Date of Patent: December 9, 2014Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, Institut National de Recherche en Informatique et en AutomatiqueInventors: Riadh Ben Abdallah, Antoine Fraboulet, Jerome Martin, Tanguy Risset