Abstract: The present invention provides a system and method for using a single digzed component of an analog signal to be converted into a pair of digital signals used to re-establish the analog signal. A low level serial transceiver transforms a first analog signal into a first digital signal representing the complement of the first analog signal. The first digital signal is propagated through an electronic interface circuit such as a matrix switch or through some electronic circuit used to detect characteristics of the analog signal. In response to receiving the first digital signal, a logic circuit generates a second digital signal representing the analog signal, and also outputs the first digital signal. In response to receiving the first and second digital signals, a retimer generates a third digital signal comprising a series of pulses.

Abstract: The invention provides a method and apparatus for demodulating a composite AM DAB waveform which contains digitally modulated carriers and which employ (1) a mixer for converting a received signal into two signals (the first of these two signals represents an in-phase component and the second of these two signals represents a quadrature component); (2) two analog-to-digital converters for converting the two signals into digital signals; and (3) two fast Fourier transform elements for extracting data separately from the two digital signals. Complementary digital carrier signals are recovered from the quadrature component, and non-complementary digital carriers are derived from a sum of the complementary data and the output of the in-phase component FFT process. Leakage of the AM signal through a highpass filter is prevented from interfering with the demodulation of the complementary carrier signals' use of separated demodulation channels.

Abstract: An eye pattern display device for receiving and equalizing signals transmitted on a frequency-division multiplex basis to produce equalized output signals and displaying eye patterns of the equalized output signals is intended to check the eye patterns of the equalized output signals on multiple channels simultaneously. Level converters convert the signal levels of the equalized output signals output from channel demodulators. Offset adders add predetermined offset signals to level-converted equalized output signals so that they can be displayed on corresponding display areas of a display which are allocated to the respective channels. A selector selects output signals of the offset adders in sequence to display the eye patterns of the equalized output signals simultaneously on the display.

Abstract: A synchronizer of a fast frequency hopping spread spectrum receiver includes a correlator and a peak detection circuit for detecting the peak of the output signal of the correlator and outputting a detection signal. A sampler has the output signal of the correlator pass therethrough when the detection signal is outputted from the synchronizer. A code discriminating circuit discriminates the code of the output signal of the sampler. M pieces of frequency synthesizers of the correlator output M pieces of sinusoidal wave signals having the same frequencies as the frequencies of M pieces of carriers, respectively. A delay line of the correlator includes a plurality of delay elements connected with one another in a cascade, and delays the input signal of the correlator by each delay element and converts the input signal into M pieces of parallel input signals having different delay time, respectively. Besides, the delay time of respective delay elements is defined as a chip period.

Abstract: A method and device for finding a characteristic data group periodically inserted into a stream of successively transmitted data. Memory (7) stores temporarily a series of receive data corresponding to the minimal subset necessarily including the group looked for. Comparator (8) searches for a reference element relative to the group looked for in the preselected area including one of the modules into which the stored subset is divided. The search is continued module by module until a data group is identified identical to the reference element. Memory (11) memorizes the position of any group identical to the reference element in the module in which any such group was identified. A confirmation search eliminates group positions which are not found again subsequently, until there remains only the position of the last group present, which is deemed to be the reference looked for.

Abstract: A signal receiving and signal processing unit connected to one or several conductors is adapted to transmit information-carrying signals in the form of voltage pulses. A conductor is connected to a transistor belonging to a signal receiving circuit, to have an effect upon a current by using variations in the voltage pulses and the voltage value of a pulse. The current is in the form of pulses passing through the transistor. The current is generated by the voltage pulse variations and a voltage level, and the current is adapted to an information-carrying form in a signal processing circuit. The transistor belonging to the signal receiving circuit is coordinated with at least one other transistor to form a current mirror. The ability of the signal receiving circuit to receive, detect, and process the signals is adjustable through a current generating circuit such that an increasing current value provides detection of a voltage pulse at an increased transfer rate and vice versa.

Abstract: A generalized noise canceler for canceling noise in a channel having noise composed of correlated noise components. The noise canceler is realized with a finite number of cascade networks, each network being composed of an inner product filter is series with another filter wherein both filters have characteristics determined from a eigenvector equations expressed in terms of the channel operator and noise operator.

Abstract: An apparatus for measuring an electric field of an incoming signal implemented in a mobile communication system is disclosed. The apparatus comprises heterodyne receiver for heterodyning the incoming signal with a local signal to detect electric field information of the incoming signal, a local oscillator provided with phase-locked loop circuit, wherein the local oscillator produces a local signal through the phase-locked loop when receiving a first selection signal, and the local oscillator, when receiving a second signal, produces a local signal having a frequency which varies in accordance with a prescribed voltage change, and a controller which provides a first selection signal to the local oscillator when a normal measurement of the electric field is to be effected and provides a second selection signal to the local oscillator when a rapid measurement of the electric field is required.

Abstract: A clock rate modulation spread spectrum (CRM-SS) communication system is provided in which a bit error rate on a receiver side is minimized by controlling at least one of parameters defining a phase error. The CRM-SS communication system uses a delay locked loop comprising an n.DELTA.-type delay locked loop, where 0<n.ltoreq.2. A sum of a plurality of phase errors generated by different causes are calculated. A receiver and/or transmitter is controlled by varying one of parameters including a loop gain K and a linear region n.DELTA. of the phase comparison characteristic of the delay locked loop, a modulation index .beta., a transmission rate fm, a transmission power P and a chip width .DELTA., in accordance with the sum calculated by the calculating means so that a bit error rate in the receiver is minimized.

Abstract: A method (100), a device (300), and a radio (500) are described for compensating for modulator frequency drift while allowing for data transmission in a half-duplex frequency modulated communication system. An adjustment is made to a premodulation signal in such a way that when it is passed through a frequency modulator to provide a transmitter excitation signal, frequency drift is corrected. Subsequent to determining a training command, the transmitter excitation signal passes through a switch to a demodulator. The demodulator output is averaged and used in the adjustment.

Abstract: An ultrasonic imaging system which utilizes two summation channels to provide increased bandwidth employs two demodulation stages in each receive channel. The first demodulator receives digital signals from an analog-to-digital converter and demodulates those signals to baseband, thereby producing an in-phase component and a quadrature component. The in-phase and quadrature components are demodulated by the second demodulator, forming a total of four signals which are filtered and combined to form two sets of complex signals. One set corresponds to the upper or high frequencies and the other set corresponds to the lower frequencies. Each band is treated separately in a subsequent phase rotation. The phase changes reflect those required by the center frequency of each of the subbands. The upper band signals are coherently summed in one summation channel, while the lower band signals are coherently summed in another summation channel.

Abstract: A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM.

Abstract: At the transmitter side, carrier waves are modulated according to an input signal for producing relevant signal points in a signal space diagram. The input signal is divided into, two, first and second, data streams. The signal points are divided into signal point groups to which data of the first data stream are assigned. Also, data of the second data stream are assigned to the signal points of each signal point group. A difference in the transmission error rate between first and second data streams is developed by shifting the signal points to other positions in the space diagram expressed at least in the polar coordinate system. At the receiver side, the first and/or second data streams can be reconstructed from a received signal. In TV broadcast service, a TV signal is divided by a transmitter into low and high frequency band components which are designated as first and second data streams respectively.

Abstract: A framed format identification signal is imbedded with a flagged format identification signal so that two terminals connected to a digital transmission network can automatically determine whether they are compatible and choose their preferred format for full communication.

Abstract: A digital data separator is provided for separating clock information and data from a data stream which is subject to varying amounts of undesired jitter which tend to corrupt the data. A read data window of controlled duration is generated for sampling the input data. The current best estimate of the duration of the read data window is stored in a period register as a period register value. The period register value minus one is loaded into a time register as the time register value. A count down cycle is performed by subtracting a value of one from the time register value in each clock cycle during the course of the count down cycle. The read data window is toggled to begin a new read data window when the time register value is near zero, the value remaining in the time register being designated the remaining value.

Abstract: An analog/digital receiver comprises a noise detecting circuit for checking whether a noise component, output from an analog signal detecting means, is not less than a specified value, and an RSSI detecting circuit for checking whether received signal strength, output from the receiver, is not less than a specified value. A discriminating circuit is included for making a determination as to whether the received input is an analog modulation signal or a digital modulation signal according to the result of the determination made by the noise detecting circuit as well as by the RSSI detecting circuit. A select switch selects the output from either the digital signal detecting circuit or the analog signal detecting circuit.

Abstract: In a digital time-shared transmission system, a receiver receives a signal whose symbol rate is lower than the channel bandwidth of the system. A correlating and sampling circuit receives a baseband signal, samples the signal a number of times with each symbol time, performs channel correlation, generates a channel estimate and samples down the once sampled signal to an observed signal with two values for each symbol time. A channel equalizer executes a fractional viterbi algorithm which utilizes two delta-metric values for each state transition and generates estimated symbols. A channel estimating filter receives a symbol sequence of alternating zero-value symbols and the estimated symbols and generates an estimated signal. The channel estimating filter is adapted with the aid of an error signal and the filter delivers a channel estimate to the channel equalizer.

Abstract: A spread spectrum communication receiver which can obviate a highly accurate, highly stable VCO used in a local signal oscillator.

Abstract: A control channel timing monitor for a simulcast radio frequency (RF) digitally trunked mobile radio communications system continually monitors the outbound control channel timing of each of plural simulcasting transmitting sites. The timing of such monitored signals obtained "over the air" is compared relative to one another and/or to a reference. Fault indications identifying specific sites having faulty synchronization are produced when such comparison indicates lack of synchronization within a programmable tolerance. Appropriate corrective action (e.g., bringing down the control channel and transferring its function to a frequency formerly used for working channel functions) is taken.

Abstract: In order to reduce radio interference jamming in the same channel exerting from an adjacent broadcasting area when a digitized image signal of, for example, high-definition television utilizing an idle channel in ground broadcasting of television is transmitted, a digital string such as a binary coded image signal is thinned out every predetermined digital period so as to be divided into two groups. Continuous digital strings of two series are formed by converting clock rates of the respective groups and converted into multi-value digits. Intermediate carriers are then modulated with the digital signals of the two series having their requisite bands compressed through quadrature modulation to form modulated carriers, and the modulated carriers are transmitted in bands of two divisional channels which escape from adjacent video and voice carriers, the power of which is responsible for the radio interference in the same channel. The carriers are subsequently received for reconstruction.