Abstract: A display device includes a substrate having a display area, in which an image is displayed, and a non-display area, in which no image is displayed. The non-display area is disposed on at least one side of the display area. A plurality of pixels is disposed in the display area. An encapsulation layer is disposed on the plurality of pixels. A dam unit is disposed in the non-display area. The dam unit includes a body part and a plurality of protrusions. Each of the plurality of protrusions protrudes from the body part.

Abstract: A method for producing a semiconductor component includes: forming a silicon carbide substrate having a body layer formed on a section of a main layer, and a source layer formed on a section of the body layer; forming gate trenches and contact trenches extending through the source layer and the body layer, the gate trenches and contact trenches alternating along a first horizontal direction parallel to a first main surface of the silicon carbide substrate; forming a gate dielectric in the gate trenches; forming a metal structure which includes first sections adjoining the gate dielectric in the gate trenches and second sections in the contact trenches, the second sections adjoining body regions formed from sections of the body layer and source regions formed from sections of the source layer; and removing third sections of the metal structure that connect the first sections to the second sections.

Abstract: A display device includes a plurality of pixels on a substrate. Each of the pixels includes a first electrode and a second electrode spaced apart from each other on the substrate, and a plurality of light emitting elements, each including a first end portion connected to the first electrode and a second end portion connected to the second electrode. The first electrode includes a plurality of first holes adjacent to the first end portion of each of the light emitting elements.

Abstract: The fabrication of field-effect transistor (FET) devices is described herein where the FET devices include one or more body contacts implemented between source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. The FET devices can include source fingers and drain fingers interleaved with gate fingers. The source and drain fingers of a first S/G/D assembly can be electrically connected to the source and drain fingers of a second S/G/D assembly. The source fingers and the drain fingers can be arranged in alternating rows.

Abstract: In an embodiment a pixel for a multi-pixel LED module includes a first light-emitting semiconductor chip having a first upper chip side and a first lead-frame section having a first upper side, a first contacting protrusion and a second contacting protrusion, wherein the first contacting protrusion and the second contacting protrusion extend from the first upper side, and wherein the first light-emitting semiconductor chip is embedded in an electrically insulating material such that the first upper side is covered by the electrically insulating material and the first upper chip side and the contacting protrusions are exposed.

Abstract: Present disclosure provides a semiconductor structure and a method for fabricating a semiconductor structure. The semiconductor structure includes a substrate, a conductive layer in the substrate, a conductive bump over the substrate and electrically coupled to the conductive layer, and a dielectric stack, including a polymer layer laterally surrounding the conductive bump and including a portion spaced from a nearest outer edge of the conductive bump with a gap, wherein a first thickness of the polymer layer in a first region is greater than a second thickness of the polymer layer in a second region adjacent to the first region, a first bottom surface of the polymer layer in the first region is leveled with a second bottom surface of the polymer layer in the second region, and a dielectric layer underneath the polymer layer.

Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.

Abstract: Embodiments of the present disclosure disclose a display panel and a fabricating method thereof. In the solution, on one hand, water-absorbing magnetic nanoparticles in a packaging layer are distributed along a direction perpendicular to the cover plate at a side far away from an OLED component, or distributed along an extension direction of the packaging layer at a periphery of a region in which the OLED component is located, thus reducing the damage to the OLED component of a display substrate. On the other hand, since the water-absorbing magnetic nanoparticles have magnetic property, the water-absorbing magnetic nanoparticles can be doped in the packaging layer material in a packaging and waterproofing process, and a magnetic field is applied to induce the magnetic nanoparticles to move to the side far away from the OLED component or to the periphery of the region in which the OLED component is located.

Abstract: A substrate processing apparatus includes a suctioning unit for suctioning a processing liquid existing inside a processing liquid pipe that communicates with a discharge port, and a controller. In the suctioning step, the controller executes a suctioning step of suctioning the processing liquid existing inside the processing liquid pipe by the suctioning unit. The controller selectively executes a first suctioning step of retracting a leading end surface of the processing liquid and disposing the leading end surface of the processing liquid after suctioning in a preliminarily set standby position inside the processing liquid pipe, and a second suctioning step of retracting the leading end surface of the processing liquid further back than the standby position.

Abstract: A micro light emitting diode structure includes a temporary substrate, a plurality of micro light emitting elements, a plurality of light blocking structures, and a connection layer. The micro light emitting elements and the light blocking structures are disposed on the temporary substrate and arranged alternately. Each of the light blocking structures includes a light blocking layer, and a light shielding layer disposed on the light blocking layer. The micro light emitting elements and the light blocking structures are fixed to the temporary substrate by the connection layer. A reflectivity of the light blocking layer is greater than a reflectivity of the connection layer, and a Young's modulus of the light blocking layer is greater than a Young's modulus of the connection layer.

Abstract: Optoelectronic components, groups of optoelectronic components, and methods for producing a component or a plurality of optoelectronic components are provided. The method may include providing a growth substrate having a buffer layer arranged thereon. The buffer layer may be structured in such a way that it has a plurality of the openings which are spaced apart from one another in lateral directions. A plurality of semiconductor bodies may be formed in the openings, wherein in the areas of the openings, the buffer layer has subregions which are arranged in a vertical direction between the growth substrate and the semiconductor bodies. The growth substrate may be detached from the semiconductor bodies. The buffer layer may be removed at least in the areas of the subregions.

Abstract: A semiconductor device including a contact structure is provided. The semiconductor device includes an isolation region defining a lower active region. First and second source/drain regions and first and second gate electrodes are on the lower active region. The first and second source/drain regions are adjacent to each other. First and second gate capping patterns are on the first and second gate electrodes, respectively. First and second contact structures are on the first and second source/drain regions, respectively. A lower insulating pattern is between the first and second source/drain regions. An upper insulating pattern is between the first and second contact structures. Silicon oxide has etching selectivity with respect to an insulating material which the upper insulating pattern, the first gate capping pattern, and the second gate capping pattern are formed of.

Abstract: Provided is a semiconductor package including: a first substrate comprising a specific pattern formed thereon to enable electrical connection; a second substrate, which is spaced apart from and faces the first substrate, comprising a specific pattern formed thereon to enable electrical connection; at least one semiconductor chip attached to the first substrate; at least one metal post formed in a non-vertical structure between the first substrate and the second substrate for dispersing a coefficient of thermal expansion (CTE) stress directly generated from the second substrate, wherein the metal post comprises one end attached on the at least one semiconductor chip, and the other end attached on the pattern of the first substrate or the second substrate; at least one terminal lead electrically connected to the first substrate or the second substrate; and a package housing covering the first and second substrates and exposing the terminal leads to the outside.

Abstract: Package structures are provided. A package structure includes an adhesive layer and a semiconductor substrate over the adhesive layer. The package structure also includes a connector over the semiconductor substrate. The package structure further includes a first buffer layer surrounding the connector and the semiconductor substrate and covering the adhesive layer. An interface between the adhesive layer and the first buffer layer is substantially level with a bottom surface of the semiconductor substrate. In addition, the package structure includes an encapsulation layer surrounding the first buffer layer. The package structure also includes a redistribution layer over the first buffer layer and the encapsulation layer.

Abstract: A light emitting device that includes a plurality of element structures, a frame, and a covering member. Each of the plurality of element structures includes a light emitting element. The frame surrounds the plurality of element structures. The covering member is disposed on an inner side of the frame. The covering member is disposed between the frame and an element structure of the plurality of element structures adjacent to the frame and between adjacent element structures of the plurality of element structures. An upper surface and a lower surface of each of the plurality of element structures are exposed from the covering member.

Abstract: Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the SST, a second semiconductor material at a second side of the SST opposite the first side, and an active region between the first and second semiconductor materials. The SST can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. A portion of the first contact can be covered by a dielectric material, and a portion can remain exposed through the dielectric material. A conductive carrier substrate can be disposed on the dielectric material. An isolating via can extend through the conductive carrier substrate to the dielectric material and surround the exposed portion of the first contact to define first and second terminals electrically accessible from the first side.

Abstract: A white-light-emitting inorganic light-emitting-diode (iLED) structure comprises first iLEDs electrically connected in series, each first iLED emitting a different color of light from any other first iLED when electrical power is provided to the first iLEDs, and a second iLED electrically connected to one of the first iLEDs, the second iLED emitting the same color of light as the one of the first iLEDs when electrical power is provided to the first iLEDs. The second iLED can be electrically connected in series or in parallel with the one of the first iLEDs. Such iLED structures can be used at least in displays, lamps, and indicators.

Abstract: A backlight assembly, a manufacturing method thereof, and a display device are provided. The backlight assembly includes: a substrate, an anode trace and a cathode trace of an LED on the substrate, a planarization layer on a layer where the anode trace and the cathode trace of the LED are located, and an anode connection pad and a cathode connection pad on the planarization layer. The anode trace of the LED is coupled to the anode connection pad through a first via hole penetrating through the planarization layer, and the cathode trace of the LED is coupled to the cathode connection pad through a second via hole penetrating through the planarization layer. An exhaust channel is further arranged on the planarization layer to discharge gas accumulated in the planarization layer.

Abstract: A method of manufacturing a light emitting element according to certain embodiments of the present disclosure includes: scanning and irradiating a first laser light having a first irradiation intensity to a sapphire substrate along predetermined dividing lines collectively in a shape of a tessellation of a plurality of hexagonal shapes in a top view to create a plurality of first modified regions along the predetermined dividing lines; and scanning and irradiating a second laser light having a second irradiation intensity greater than the first irradiation intensity to the sapphire substrate along the predetermined dividing lines to create a plurality of second modified regions overlapping the plurality of first modified regions.

Abstract: A disclosed super-junction (SJ) device includes a first epitaxial (epi) layer that forms a first SJ layer of the SJ device, and includes a second epi layer disposed on the first SJ layer that forms a device layer of the SJ device. An active area of the first and second epi layers includes a first set of SJ pillars comprising a particular doping concentration of a first conductivity type and a second set of SJ pillars comprising the particular doping concentration of a second conductivity type. A termination area of the first and second epi layers has a minimized epi doping concentration of the first conductivity type that is less than the particular doping concentration, and the termination area of the second epi layer includes a plurality of floating regions of the second conductivity type that form a junction termination of the SJ device.