Patents Examined by Ismail A Muse
  • Patent number: 11508709
    Abstract: The invention relates to a method, an arrangement and an array, in which a structured contact layer and an elastic carrier layer arranged on a first side of the structured contact layer and connected to the structure contact layer by means of a bonded connection is produced, and in which at least one optoelectronic semiconductor component is arranged on the structured contact layer, on a second side of the structured contact layer, opposing the first side, and is electrically and mechanically connected to the structured contact layer, an elastic conversion layer in an irradiation region being applied to the structured contact layer and the elastic carrier layer in such a way that at least the optoelectronic semiconductor component is embedded in the conversion layer, at least in sections, and a connection region of the structure contact layer remains uncovered.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: November 22, 2022
    Assignee: Osram OLED GmbH
    Inventors: Martin Brandl, Zeljko Pajkic, Luca Haiberger
  • Patent number: 11495613
    Abstract: A memory device can include a strained single-crystalline silicon layer and an alternating stack of insulating layers and electrically conductive layers located over the strained single-crystalline silicon layer. A memory opening fill structure extending through the alternating stack may include an epitaxial silicon-containing pedestal channel portion, and a vertical semiconductor channel, and a vertical stack of memory elements located adjacent to the vertical semiconductor channel Additionally or alternatively, a drain region can include a semiconductor drain portion and a nickel-aluminum-semiconductor alloy drain portion.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: November 8, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Ashish Baraskar, Raghuveer S. Makala, Peter Rabkin
  • Patent number: 11482788
    Abstract: An antenna device includes a package, a radiating element, and a director. The package includes a radio frequency (RF) die and a molding compound in contact with a sidewall of the RF die. The radiating element is in the molding compound and electrically coupled to the RF die. The director is in the molding compound, wherein the radiating element is between the director and the RF die, and a top of the radiating element is substantially coplanar with a top of the director.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chuei-Tang Wang, Chung-Hao Tsai, Jeng-Shien Hsieh, Wei-Heng Lin, Kuo-Chung Yee, Chen-Hua Yu
  • Patent number: 11476296
    Abstract: The present invention discloses a double color micro LED display panel including a plurality of pixels. Each of the pixels includes a substrate, a first semiconductor layer configured on the substrate, a second semiconductor layer configured on the first semiconductor layer, and a third semiconductor layer configured between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are N type, and the third semiconductor layer is P type. The first semiconductor layer and the third semiconductor layer form a first light emitting diode to emit a first light, and the second semiconductor layer and the third semiconductor layer form a second light emitting diode to emit a second light.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: October 18, 2022
    Assignee: HONG KONG BEIDA JADE BIRD DISPLAY LIMITED
    Inventors: Quchao Xu, Qiming Li
  • Patent number: 11462525
    Abstract: An optical coupling device includes a light receiving element provided with a first output terminal and a second output terminal, a light emitting element provided on the light receiving element, a first switching element, a first electrode plate, and a sealing member. The first switching element is provided side by side on the light receiving element. A first main terminal and a control terminal are provided on an upper surface of the first switching element. A second main terminal is provided on a lower surface of the first switching element. The first main terminal is connected to the first output terminal. The control terminal is connected to the second output terminal. An upper surface of the first electrode plate is connected to the second main terminal. The sealing member covers the light receiving element, the light emitting element, and the first switching element.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: October 4, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Mami Fujihara, Naoya Takai, Kazuki Tanaka, Takenori Yasuzumi, Yoshio Noguchi, Tsuyoshi Tokiwa
  • Patent number: 11462523
    Abstract: A display module and a manufacturing method thereof is provided. The display module may include a substrate; a thin film transistor (TFT) layer disposed on a surface of the substrate; a plurality of LED packages including a connection substrate and a plurality of LEDs disposed on a first surface of the connection substrate; and a wiring configured to electrically connect the TFT layer and the plurality of LEDs. The wiring includes a first wiring for electrically coupling with the plurality of LEDs on the first surface, and a second wiring for electrically coupling with the TFT layer on a second surface of the connection substrate.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 4, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jinhee Kang, Taesoon Park, Youngki Jung, Chulgyu Jung
  • Patent number: 11456405
    Abstract: A light emitting package is provided, the light emitting package includes a carrier having a main part that has multiple chip bonding regions, and each the chip bonding regions has two neighboring conductive parts. An insulating part is disposed on the main part and portion of the two neighboring conductive parts, and multiple hollow-out structures are formed by the insulating part and corresponded in position to the chip bonding regions. Each of the hollow-out structures has a side wall that surrounds the chip bonding regions, and the portion of the tops of the two neighboring conductive parts are exposed from a bottom portion of the hollow-out structure, and multiple light emitting chips are disposed onto the chip bonding surfaces.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: September 27, 2022
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chen-Hsiu Lin, Chih-Yuan Chen
  • Patent number: 11450795
    Abstract: A light-emitting module according to an embodiment includes a plurality of light-emitting elements, light-guiding plates each having a light-exiting surface, and a wiring layer connected to electrodes of the plurality of light-emitting elements on a surface opposite to the light-exiting surface. The wiring layer includes a first terminal, a second terminal, a first wiring pattern connecting the first terminal and the second terminal, a second wiring pattern connecting the first terminal and the second terminal, a third wiring pattern disposed between the first wiring pattern and the second wiring pattern to connect the first terminal and the second terminal, a fourth wiring pattern connecting the first to third wiring patterns in parallel, the fourth wiring pattern being connected to the first terminal, and a fifth wiring pattern connecting the first to third wiring patterns in parallel, the fifth wiring pattern being connected to the second terminal.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: September 20, 2022
    Assignee: Nichia Corporation
    Inventors: Satoshi Yoshinaga, Yasunori Shinomiya
  • Patent number: 11437356
    Abstract: A display module is provided. The display module includes a substrate including a thin film transistor (TFT) layer including a plurality of TFTs, a plurality of light emitting diodes (LEDs) arranged on a front surface of the substrate, each LED corresponding to a respective TFT, and an operation driver that is connected to a rear surface of the substrate and controls an operation of the TFTs. The substrate includes a plurality of first via holes extending in a vertical direction from the front surface of the substrate to the rear surface of the substrate. The first via holes are filled with conductive materials and are distributively arranged based on at least one of the columns or rows of the plurality of LEDs. The first via holes connect the TFTs to the operation driver.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: September 6, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dongyeob Lee, Doyoung Kwag, Sangmoo Park, Seona Yang, Yoonsuk Lee
  • Patent number: 11437355
    Abstract: A light-emitting package structure and a manufacturing method thereof are provided. The light-emitting package structure includes a driving device and at least one light-emitting chip. The driving device includes a driving chip and a redistribution layer structure formed over the driving chip. The driving chip has a first surface and a second surface opposite to the first surface. The redistribution layer structure includes a plurality of first conductive pads disposed on the first surface and a plurality of second conductive pads disposed on the second surface, and one of the first conductive pads is electrically connected to one of the second conductive pads. The at least one light-emitting chip is disposed on the first surface of the driving chip and electrically connected to the driving chip through the first conductive pads.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: September 6, 2022
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Feng Kao, Chen-Hsiu Lin, Wen-Hsiang Lin
  • Patent number: 11430921
    Abstract: Apparatus, systems, methods, and articles of manufacture to generate, trap, and convert light using a micro light emitting diode (LED) or similar device are disclosed. An example apparatus includes a first mirror to reflect a first wavelength light and a second wavelength light. The example apparatus includes a micro LED on the first mirror, the micro LED to generate the first wavelength light. The example apparatus includes a quantum dot film on the micro LED, the quantum dot film to convert the first wavelength light to the second wavelength light. The example apparatus includes a second mirror on the quantum dot film, the second mirror to reflect the first wavelength light and transmit the second wavelength light.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: August 30, 2022
    Assignee: Intel Corporation
    Inventor: Khaled Ahmed
  • Patent number: 11430930
    Abstract: The present invention provides a display panel and a display device. The display panel divides a driving circuit of a driving circuit layer into a first portion, a second portion, and a connecting portion. The first portion and the second portion are on opposite sides of a substrate. A projection region of the second portion on the substrate is located in a projection region of the first portion on the substrate. Therefore, the second portion is located in a display region, a connecting region of external wires which cannot display is eliminated, and a bezel of the display panel is eliminated.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: August 30, 2022
    Inventor: Bei Jiang
  • Patent number: 11431922
    Abstract: A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: August 30, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 11430851
    Abstract: A display device includes: a substrate on which a plurality of islands and a plurality of bridges connecting the plurality of islands to each other are defined; a plurality of pixels disposed in each of the plurality of islands; and a wire disposed in each of the plurality of bridges and connected to the plurality of pixels, where the plurality of islands and the plurality of bridges are defined based on cutout portions of the substrate, and a vertex of a cutout portion between one of the plurality of islands and a bridge connected to the one of the plurality of islands is an intersection of a straight line and a curved line.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: August 30, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jong Ho Hong, Jun Hyeong Park, Jae Min Shin, Hye Jin Joo
  • Patent number: 11424205
    Abstract: A semiconductor device includes a first interconnect structure over first substrate, a first bonding layer over the first interconnect structure, multiple first bonding pads disposed in a first region of the first bonding layer, the first bonding pads having a first pitch, and multiple second bonding pads disposed in a second region of the first bonding layer, the second region extending between a first edge of the first bonding layer and the first region, the second bonding pads having the first pitch, the multiple second bonding pads including multiple pairs of adjacent second bonding pads, wherein the second bonding pads of each respective pair are connected by a first metal line.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jie Chen, Hsien-Wei Chen
  • Patent number: 11424288
    Abstract: A display device includes: a substrate including a pixel; a scan line for supplying a scan signal to the pixel; a data line for supplying a data signal to the pixel; a first power line for supplying a first driving power source to the pixel; a second power line for supplying a second driving power source to the pixel; and a third power line for supplying a ground voltage to the pixel. The pixel includes: first and second electrodes spaced apart from each other on the substrate; a plurality of light emitting elements, each of the light emitting elements having first and second end portions in a length direction thereof and being arranged between the first electrode and the second electrode; and a first switch electrically connected between the third power line and the first electrode. The first switch is configured to be turned on by a control signal.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: August 23, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chong Chul Chai, Kyung Bae Kim, Mee Hye Jung, Jin Oh Kwag, Min Jae Jeong
  • Patent number: 11424262
    Abstract: A microelectronic device comprises a stack structure, a stadium structure within the stack structure, a source tier underlying the stack structure, and a masking structure. The stack structure has tiers each comprising a conductive structure and an insulating structure. The stadium structure comprises a forward staircase structure, a reverse staircase structure, and a central region horizontally interposed between the forward staircase structure and the reverse staircase structure. The source tier comprises discrete conductive structures within horizontal boundaries of the central region of the stadium structure and horizontally separated from one another by dielectric material. The masking structure is confined within the horizontal boundaries of the central region of the stadium structure and is vertically interposed between the source tier and the stack structure.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 23, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Shuangqiang Luo, Nancy M. Lomeli
  • Patent number: 11411020
    Abstract: Provided is a memory device including a substrate, a stack structure, a first set of vertical channel structures, a second set of vertical channel structures, and a first slit. The stack structure is disposed on the substrate. The first and second sets of vertical channel structures are arranged along a Y direction and penetrate through the stack structure to contact the substrate. The first slit is disposed between the first and second sets of vertical channel structures, and penetrates through the stack structure to expose the substrate. The first slit includes a plurality of first sub-slits discretely disposed along a X direction.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: August 9, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Kai Yang, Tzung-Ting Han
  • Patent number: 11411133
    Abstract: A method of manufacturing a light-emitting device includes: providing an intermediate structure including: layered bodies in a light-reflective member, a semiconductor layered body, and a light-transmissive member; forming at least one first groove at a first surface of the intermediate structure; forming at least one electrically conductive film, each disposed on the first surface and inside a respective one of the at least one first groove; exposing a portion of the light-reflective member in an inter-electrode region; forming a hole having a width equal to or greater than a width of the at least one first groove and having a depth equal to or greater than a depth of the at least one first groove; and cutting the light-reflective member and the at least one electrically conductive film along the at least one first groove to obtain a plurality of light-emitting devices.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: August 9, 2022
    Assignee: NICHIA CORPORATION
    Inventors: Toru Hashimoto, Masato Aihara
  • Patent number: 11410978
    Abstract: A method of manufacturing an optoelectronic device, including: a) transferring, onto a surface of a control circuit, a diode stack including first and second semiconductor layers of opposite conductivity types, so that the second layer is electrically connected to metal pads of the control circuit; b) forming in the active stack trenches delimiting a plurality of diodes connected to separate metal pads of the control circuit; c) depositing an insulating layer on the lateral walls of the trenches; d) partially removing the insulating layer to expose the sides of the portions of the first layer delimited by the trenches; and e) forming a metallization coating the lateral walls and the bottom of the trenches and contacting the sides of the portions of the first layer delimited by the trenches.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: August 9, 2022
    Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Thales
    Inventors: Hubert Bono, Julia Simon