Patents Examined by Jack Chen
  • Patent number: 10128466
    Abstract: A light-emitting device includes a first electrode and a second electrode opposed to each other, a first stack between the first and second electrodes, the first stack being adjacent to the first electrode and including a first light-emitting layer, a second stack between the first and second electrodes, the second stack being adjacent to the second electrode and including a second light-emitting layer, and a charge generation structure between the first and second stacks, the charge generation structure including an n-type charge generation layer, an interlayer organic layer, and a p-type charge generation layer which are sequentially stacked on the first stack.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Eunkyoung Nam
  • Patent number: 10128112
    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cho Eun Lee, Jin Bum Kim, Kang Hun Moon, Jae Myung Choe, Sun Jung Kim, Dong Suk Shin, Il Gyou Shin, Jeong Ho Yoo
  • Patent number: 10109821
    Abstract: An apparatus for light diffraction and an organic light emitting diode (OLED) incorporating the light diffraction apparatus is disclosed. An apparatus for light diffraction may comprise an optional planarization layer, a transparent substrate, a waveguide layer. The planarization layer may have a refractive index of ns. The transparent substrate may have a refractive index of ng. The waveguide layer may have a refractive index nw distributed over of the transparent substrate. The waveguide layer may comprise a binding matrix, at least one nanoparticle. The waveguide layer may be interposed between the transparent substrate and the optional planarization layer.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: October 23, 2018
    Assignee: Corning Incorporated
    Inventors: David Eugene Baker, Li Liu, Pamela Arlene Maurey, Robert Adam Modavis, Daniel Aloysius Nolan, Wageesha Senaratne
  • Patent number: 10109529
    Abstract: A semiconductor device including a direct contact and a bit line in a cell array region and a gate electrode structure in a peripheral circuit region, and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate including a cell array region including a first active region and a peripheral circuit region including a second active region, a first insulating layer on the substrate, the first insulating layer including contact holes exposing the first active region, a direct contact in the contact holes, wherein a direct contact is connected to the first active region, a bit line connected to the direct contact in the cell array region and extending in a first direction, and a gate insulating layer and a gate electrode structure, wherein a dummy conductive layer including substantially the same material as the direct contact is in the peripheral circuit region.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: October 23, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-ho Koh, Byoung-ho Kwon, Yang-hee Lee, Young-kuk Kim, In-seak Hwang, Bo-un Yoon
  • Patent number: 10103067
    Abstract: A method of manufacturing a trench isolation of a semiconductor device is provided including providing a silicon-on-insulator (SOI) substrate comprising a semiconductor bulk substrate, a buried oxide layer formed on the semiconductor bulk substrate and a semiconductor layer formed on the buried oxide layer, forming a trench through the semiconductor layer and extending at least partially into the buried oxide layer, forming a liner at sidewalls of the trench, deepening the trench into the semiconductor bulk substrate, filling the deepened trench with a flowable dielectric material, and performing an anneal of the flowable dielectric material.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: October 16, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Peter Baars, Gunter Grasshoff, Rico Hueselitz
  • Patent number: 10090374
    Abstract: Organic light-emitting display devices are provided. One organic light-emitting display device includes a substrate, a first wire on the substrate, a second wire insulated from and crossing the first wire, and a static electricity dispersion pattern insulated from and crossing the second wire. Another organic light-emitting display device includes: a substrate; a gate line and a data line on the substrate, insulated from and crossing each other; a dummy wire that is part of a same layer as one of the gate line or the data line, and having at least one end aligned with a sidewall of the substrate; a dummy intersection wire insulated from and crossing the dummy wire; and a static electricity dispersion pattern insulated from and crossing the dummy intersection wire.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: October 2, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Joo Hwang, Gun Mo Kim
  • Patent number: 10090424
    Abstract: A method for fabricating a solar cell commences by bonding a first metal-coated substrate to a second metal-coated substrate to provide a bonded substrate. The bonded substrate is then coated with a first precursor solution to provide a coated bonded substrate. Finally, the procedure de-bonds the coated bonded substrate to provide a first solar cell device and a second solar cell device. A system for fabricating the solar cell comprises a first precursor solution deposition system containing a first precursor solution for deposition on a substrate, a first heating element for heating the substrate after deposition of the first precursor solution, a second precursor solution deposition system containing a second precursor solution for deposition on the substrate, and a second heating element for heating the substrate after deposition of the second precursor solution.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: October 2, 2018
    Assignee: Magnolia Solar, Inc.
    Inventors: Gopal G. Pethuraja, Roger E. Welser, Ashok K. Sood
  • Patent number: 10069280
    Abstract: A semiconductor optical element includes a semiconductor layer portion that includes an optical waveguide layer. The semiconductor layer portion contains a first impurity having a function of suppressing atomic vacancy diffusion and a second impurity having a function of promoting atomic vacancy diffusion, between a topmost surface of the semiconductor layer portion and the optical waveguide layer. The semiconductor layer portion includes two or more regions that extend in a deposition direction with different contents of at least one of the impurities. At least one of the two or more regions contains both the first impurity and the second impurity. The two or more regions have different degrees of disordering in the optical waveguide layer achieved through atomic vacancy diffusion and different band gap energies of the optical waveguide layer.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: September 4, 2018
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Kouhei Kinugawa, Hidehiro Taniguchi, Masafumi Tajima
  • Patent number: 10069056
    Abstract: A light emitting device includes a resin package and a light emitting element. The resin package includes a first lead, a second lead, and a molded body molded integrally with the first lead and the second lead. The light emitting element is provided on the resin package.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: September 4, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Ryohei Yamashita, Shimpei Sasaoka
  • Patent number: 10050046
    Abstract: A static random-access memory (SRAM) cell array forming method includes the following steps. A plurality of fin structures are formed on a substrate, wherein the fin structures include a plurality of active fins and a plurality of dummy fins, each PG (pass-gate) FinFET shares at least one of the active fins with a PD (pull-down) FinFET, and at least one dummy fin is disposed between the two active fins having two adjacent PU (pull-up) FinFETs thereover in a static random-access memory cell. At least a part of the dummy fins are removed. The present invention also provides a static random-access memory (SRAM) cell array formed by said method.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: August 14, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang
  • Patent number: 10050097
    Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate, a plurality of OLEDs provided over the substrate, and a plurality of pixel circuits provided between the substrate and the OLEDs. Each of the pixel circuits comprises a plurality of transistors each including an active pattern electrically connected to the respective OLEDs. A shield layer overlaps the pixel circuits and the active patterns of the transistors in the depth dimension of the OLED display.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: August 14, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae Hwan Oh, Hyo Jin Kim, Ji Hye Park, In Jun Bae, Woo Ri Seo, Hwang Sup Shin
  • Patent number: 10050200
    Abstract: An organic thin film transistor, a manufacturing method thereof and an array substrate are provided. The manufacturing method of an organic thin film transistor includes: forming an organic semiconductor layer; partially sheltering the organic semiconductor layer, so that a sheltered region and an unsheltered region are formed on the organic semiconductor layer, the sheltered region corresponding to a region where an active layer of the organic thin film transistor needs to be formed; and doping the organic semiconductor layer, so that the organic semiconductor layer in correspondence with the sheltered region is not doped, and the organic semiconductor layer in correspondence with the unsheltered region is doped.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: August 14, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yingtao Xie, Shihong Ouyang, Shucheng Cai, Qiang Shi, Ze Liu, Honhang Fong
  • Patent number: 10043874
    Abstract: Aspects of the disclosure include a semiconductor structure that includes a vertical fin structure having a top portion, a bottom portion, vertical side walls, a source area in contact with the vertical fin structure, a drain area in contact with the vertical fin structure, a plurality of spacers comprising a first oxide layer in contact with the source area, and a second oxide layer in contact with the drain area. The first oxide layer can have a thickness that is equal to a thickness of the second oxide layer.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: August 7, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kangguo Cheng, Juntao Li
  • Patent number: 10043659
    Abstract: A method for manufacturing a novel semiconductor device is provided. The method includes a first step of forming a first oxide semiconductor film over a substrate, a second step of heating the first oxide semiconductor film, and a third step of forming a second oxide semiconductor film over the first oxide semiconductor film. The first to third steps are performed in an atmosphere in which water vapor partial pressure is lower than water vapor partial pressure in atmospheric air, and the first step, the second step, and the third step are successively performed in this order.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: August 7, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Kenichi Okazaki
  • Patent number: 10043750
    Abstract: In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: August 7, 2018
    Assignee: Infineon Technologies AG
    Inventors: Ravi Joshi, Juergen Steinbrenner
  • Patent number: 10043660
    Abstract: To provide a novel method for manufacturing a semiconductor device. To provide a method for manufacturing a highly reliable semiconductor device at relatively low temperature. The method includes a first step of forming a first oxide semiconductor film in a deposition chamber and a second step of forming a second oxide semiconductor film over the first oxide semiconductor film in the deposition chamber. Water vapor partial pressure in an atmosphere in the deposition chamber is lower than water vapor partial pressure in atmospheric air. The first oxide semiconductor film and the second oxide semiconductor film are formed such that the first oxide semiconductor film and the second oxide semiconductor film each have crystallinity. The second oxide semiconductor film is formed such that the crystallinity of the second oxide semiconductor film is higher than the crystallinity of the first oxide semiconductor film.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: August 7, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Kurosaki, Yasutaka Nakazawa, Kenichi Okazaki
  • Patent number: 10038066
    Abstract: Aspects of the disclosure include a semiconductor structure that includes a vertical fin structure having a top portion, a bottom portion, vertical side walls, a source area in contact with the vertical fin structure, a drain area in contact with the vertical fin structure, a plurality of spacers comprising a first oxide layer in contact with the source area, and a second oxide layer in contact with the drain area. The first oxide layer can have a thickness that is equal to a thickness of the second oxide layer.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kangguo Cheng, Juntao Li
  • Patent number: 10037887
    Abstract: A method for implanting ions into a semiconductor substrate includes performing a test implantation of ions into a semiconductor substrate. The ions of the test implantation are implanted with a first implantation angle range over the semiconductor substrate. Further, the method includes determining an implantation angle offset based on the semiconductor substrate after the test implantation and adjusting a tilt angle of the semiconductor substrate with respect to an implantation direction based on the determined implantation angle offset. Additionally, the method includes performing at least one target implantation of ions into the semiconductor substrate after the adjustment of the tilt angle. The ions of the at least one target implantation are implanted with a second implantation angle range over the semiconductor substrate. Further, the first implantation angle range is larger than the second implantation angle range.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: July 31, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Michael Brugger, Moriz Jelinek, Johannes Georg Laven, Hans-Joachim Schulze, Werner Schustereder
  • Patent number: 10038165
    Abstract: A flexible display and a method of forming the flexible display are provided. The flexible display includes a flexible base, an OLED element disposing on the flexible base, an encapsulation layer disposed on the OLED element, with the flexible base and/or the encapsulation layer comprising one or more patterned inorganic layers and two or more organic layers, which are configured to wrap the inorganic layers. Therefore, when the stress focuses on the inorganic layer and leads to fractures and peeling-offs, the organic layers that wrapped the inorganic layer prevent the expansion of the fractures and peeling-offs, therefore extend the life of the flexible display being flexible and pliable.
    Type: Grant
    Filed: December 25, 2017
    Date of Patent: July 31, 2018
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd
    Inventor: Yuejun Tang
  • Patent number: 10033018
    Abstract: A display device includes a first substrate provided with a display region including a plurality of pixels arranged in a matrix, each of the plurality of pixels having a plurality of sub-pixels, and a second substrate provided with color filters and a light-shielding film, the color filters including transmission regions selectively transmitting lights of specific colors for the respective sub-pixels, the light-shielding film blocking light. The plurality of sub-pixels include a first sub-pixel provided with the transmission region that transmits light of a first color, and a second sub-pixel provided with the transmission region that transmits light of a second color having a luminosity factor lower than that of the light of the first color. A difference in area between a light-emitting region and the transmission region in the second sub-pixel is smaller than a difference in area between a light-emitting region and the transmission region in the first sub-pixel.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: July 24, 2018
    Assignee: Japan Display Inc.
    Inventor: Naoki Tokuda