Abstract: A thin-film transistor (TFT) array substrate and organic light-emitting diode (OLED) display are disclosed. In one aspect, the TFT array substrate includes a driving TFT including a driving gate electrode, a switching TFT including a switching gate electrode and spaced apart from the driving TFT, and a storage capacitor including a first electrode electrically connected to the driving gate electrode and a second electrode formed over and insulated from the first electrode. The TFT array substrate also includes a capacitor insulating film formed between the first and second electrodes and an interlayer insulating film covering at least part of the driving TFT, at least part of the switching TFTs, and the capacitor insulating film, wherein the switching gate electrode and the second electrode are formed of the same material.

Abstract: A composite substrate 10 is formed by bonding together a piezoelectric substrate 12 and a support substrate 14 that has a lower thermal expansion coefficient than the piezoelectric substrate. The support substrate 14 is formed by directly bonding together a first substrate 14a and a second substrate 14b at a strength that allows separation with a blade, the first and second substrates being formed of the same material, and a surface of the first substrate 14a is bonded to the piezoelectric substrate 12, the surface being opposite to another surface of the first substrate 14a bonded to the second substrate 14b.

Abstract: A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.

Abstract: The present disclosure proposes a flexible display and a method of forming the flexible display. The flexible display includes a flexible base, an OLED element disposing on the flexible base, an encapsulation layer disposed on the OLED element, with the flexible base and/or the encapsulation layer comprising one or more patterned inorganic layers and two or more organic layers, which are configured to wrap the inorganic layers. Therefore, when the stress focuses on the inorganic layer and leads to fractures and peeling-offs, the organic layers that wrapped the inorganic layer prevent the expansion of the fractures and peeling-offs, therefore extend the life of the flexible display being flexible and pliable.

Abstract: Methodologies and an apparatus for enabling three-dimensional scatterometry to be used to measure a thickness of dielectric layers in semiconductor devices are provided. Embodiments include initiating optical critical dimension (OCD) scatterometry on a three-dimensional test structure formed on a wafer, the three-dimensional test structure comprising patterned copper (Cu) trenches with an ultra-low k (ULK) dielectric film formed over the patterned Cu trenches; and obtaining, by a processor, a thickness of the ULK dielectric film based on results of the OCD scatterometry.

Abstract: The disclosure provides a manufacturing method for COA substrate: utilizing PEDOT, PProDOT or PEDOT derivatives with or without doping with graphene, or PProDOT derivatives replaces traditional ITO to be conductive materials of pixel electrodes; quantum dots can be modified by ProDOT derivatives or EDOT derivatives which including carboxyl group, and quantum dot color filters of red filter layers, green filter layer and blue filters layers comprised on the TFT substrate are formed by the method of electric chemical deposition based on a property of the aforementioned two being able to polymerize under influences of electric field and pixel electrode patterns on the TFT substrate.

Abstract: The present disclosure relates to an organic light-emitting diode (OLED) device and a display device. The OLED device may include a substrate, thin film transistors (TFTs), an anode, a cathode, and an organic light-emitting layer between the anode and the cathode and configured to emit light. The organic light-emitting layer may be provided with a light-blocking layer which is configured to block ultraviolet (UV) light and arranged at a light-exiting side of the organic light-emitting layer. The display device may include the OLED device.

Abstract: A method includes depositing an ESL on a substrate; patterning the ESL such that a first region of the substrate is covered thereby and a second region of the substrate is exposed within an opening of the etch stop layer; depositing a first dielectric layer on the ESL in the first region and on the substrate in the second region; patterning the first dielectric layer to form a first trench through the first dielectric layer in the first region; forming a metal feature in the first trench; depositing a second dielectric layer over the metal feature in the first region and over the first dielectric layer in the second region; and performing a patterning process to form a second trench through the second dielectric layer in the first region, and to form a third trench through the second and first dielectric layers in the second region.

Abstract: A plasma processing method which performs plasma processing on a sample by a plurality of steps includes a first step of stopping supply of gas of one step while supplying an inert gas and a second step stopping the supply of the inert gas of the first step while as supplying a gas of the other step after the first step. An amount of the gas of the one step remaining inside a process chamber in which the sample is plasma-processed is detected in the first step. An amount of the gas of the other step reached inside the process chamber is detected in the second step. The one step is switched to the other step based on the amount of the gas of the one step detected in the first step and the amount of the gas of the other step detected in the second step.

Abstract: Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.

Abstract: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the recess. A device isolation film is formed to define a non-active region and a fin active region in a predetermined region of the substrate. In a portion of the device isolation film a first recess is formed, and in a portion of the fin active region a second recess having a depth shallower than the first recess is formed. A gate insulation layer is formed within the second recess, and a gate is formed in an upper part of the second recess. A source/drain region is formed in the fin active region of both sides of a gate electrode.

Abstract: Provided are a method for patterning a mesoporous inorganic oxide film, the method including a step of forming a mesoporous inorganic oxide film using a composition containing inorganic oxide particles; and a step of forming a pattern on the mesoporous inorganic oxide film using an elastic stamp for pattern formation, and then calcining the mesoporous inorganic oxide, and an electronic device including a mesoporous inorganic oxide film that has been patterned by the patterning method.

Abstract: A structure, such as a wafer, chip, IC, design structure, etc., includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV extends completely through a semiconductor chip and the EM monitor includes a plurality of EM wires proximately arranged about the TSV perimeter. An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV, measuring an electrical resistance drop across the EM monitor wiring, determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance, and/or determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.

Abstract: A display device includes a first substrate provided with a display region including a plurality of pixels arranged in a matrix, each of the plurality of pixels having a plurality of sub-pixels, and a second substrate provided with color filters and a light-shielding film, the color filters including transmission regions selectively transmitting lights of specific colors for the respective sub-pixels, the light-shielding film blocking light. The plurality of sub-pixels include a first sub-pixel provided with the transmission region that transmits light of a first color, and a second sub-pixel provided with the transmission region that transmits light of a second color having a luminosity factor lower than that of the light of the first color. A difference in area between a light-emitting region and the transmission region in the second sub-pixel is smaller than a difference in area between a light-emitting region and the transmission region in the first sub-pixel.

Abstract: A manufacturing method of a light emitting device includes preparing a wafer that is provided by arranging a plurality of semiconductor light emitting elements including semiconductor stacks and electrodes provided on first surfaces of the semiconductor stacks. A metal wire is wired in an arc shape between the electrodes of the plurality of semiconductor light emitting elements that are arranged in one direction on the wafer so as to connect each of the electrodes and the metal wire. A resin layer is provided on a side of the first surfaces of the semiconductor stacks in such a way that the metal wire is accommodated inside the resin layer. The wafer is cut along a boundary line to segment the plurality of semiconductor light emitting elements so as to singulate the plurality of semiconductor light emitting elements.

Abstract: The present disclosure concerns a magnetic random access memory (MRAM) cell suitable for performing a thermally assisted write operation or a spin torque transfer (STT) based write operation, comprising a magnetic tunnel junction comprising a top electrode; a tunnel barrier layer comprised between a first ferromagnetic layer having a first magnetization direction, and a second ferromagnetic layer having a second magnetization direction adjustable with respect to the first magnetization direction; a front-end layer; and a magnetic or metallic layer on which the second ferromagnetic layer is deposited; the second ferromagnetic layer being comprised between the front-end layer and the tunnel barrier layer and having a thickness comprised between about 0.5 nm and about 2 nm, such that magnetic tunnel junction has a magnetoresistance larger than about 100%. The MRAM cell disclosed herein has lower power consumption compared to conventional MRAM cells.

Abstract: A packaged assembly is disclosed, including thermal interface material dispensed on an organic package and methods of manufacturing. The method includes dispensing a thermal interface material (TIM) on an electronic assembly. The method further includes removing volatile species of the TIM, prior to lid placement on the electronic assembly. The method further includes placing the lid on the TIM, over the electronic assembly. The method further includes pressing the lid onto the electronic assembly.

Abstract: An organic electroluminescent element comprising: an anode; a cathode; and a light emitting unit arranged between the anode and the cathode and having three or more light emitting layers each containing a polymer compound, wherein the light emitting layers constituting the light emitting unit emit lights differing from each other in peak wavelength, and a light emitting layer that emits a light with a longer peak wavelength is located closer to the anode.

Abstract: A method of fabricating a semiconductor device can include forming a III-N semiconductor layer in a reactor and injecting a hydrocarbon precursor into the reactor, thereby carbon doping the III-N semiconductor layer and causing the III-N semiconductor layer to be insulating or semi-insulating. A semiconductor device can include a substrate and a carbon doped insulating or semi-insulating III-N semiconductor layer on the substrate. The carbon doping density in the III-N semiconductor layer is greater than 5×1018 cm?3 and the dislocation density in the III-N semiconductor layer is less than 2×109 cm?2.

Abstract: Methods for producing thin film charge selective transport layers are provided. In one embodiment, a method for forming a thin film charge selective transport layer comprises: providing a precursor solution comprising a metal containing reactive precursor material dissolved into a complexing solvent; depositing the precursor solution onto a surface of a substrate to form a film; and forming a charge selective transport layer on the substrate by annealing the film.