Patents Examined by Jing-Yih Shyu
  • Patent number: 10768830
    Abstract: At a data stream management service, a first set of metadata indicating that a first isolated read channel has been associated with a first data stream is stored. The first isolated read channel has an associated read performance limit setting. A second set of metadata indicating that a second isolated read channel, with its own performance limit setting, has been associated with a data stream is also stored. Based on determining that the difference between a metric of read operations associated with the first channel and the read performance limit setting of the first channel meets a first criterion, the service initiates a throttling operation for reads associated with the first channel. The throttling decision is made independently of read metrics of the second channel.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: September 8, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Vasudeva Gade, Benjamin Warren Mercier, Sayantan Chakravorty, Yasemin Avcular, Charlie Paucard
  • Patent number: 10761768
    Abstract: Techniques are provided for handling misaligned holes and writes beyond end of files during a quick reconciliation process. During quick reconciliation, a read operation is performed to read data from a first storage object and is replicated to a second storage object. If the data read from the first storage object comprises misaligned holes, then a different range of data is read from the first storage object so that aligned holes are read and replicated to the second storage object. If the read operation targets a region beyond an end of the first storage object, then the second storage object is truncated to a size of the first storage object.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: September 1, 2020
    Assignee: NetApp Inc.
    Inventors: Akhil Kaushik, Anoop Chakkalakkal Vijayan, Krishna Murthy Chandraiah setty Narasingarayanapeta, Shrey Sengar
  • Patent number: 10762023
    Abstract: A rack-mounted system includes a chassis, a switchless board disposed in the chassis, a midplane, and a plurality of device ports. The switchless board includes a baseboard management controller (BMC), a network repeater configured to transport network signals, and a PCIe switch configured to transport PCIe signals. Each of the plurality of device ports is configured to connect a storage device to the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable to operate in one of multiple storage protocol modes based on a type of the chassis. The network repeater of the switchless board is swappable with an Ethernet switch to provide a switching compatibility to the chassis using the same midplane. The storage device can operate in single-port and dual-port configurations.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: September 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sompong Paul Olarig, Fred Worley, Son Pham
  • Patent number: 10754785
    Abstract: Methods and apparatus related to checkpointing for Solid State Drives (SSDs) that include no DRAM (Dynamic Random Access Memory) are described. In one embodiment, Non-Volatile Memory (NVM) stores an original Logical address to Physical address (L2P) table entry and a shadow L2P table entry. Allocation logic circuitry causes storage of the original L2P table entry and the shadow L2P table entry sequentially in the NVM. Data read from the shadow L2P table entry is capable to indicate a state of the original L2P table entry. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 25, 2020
    Assignee: Intel Corporation
    Inventors: Mingwei Zhang, Zheng Zhang, Ravi Sahita
  • Patent number: 10754570
    Abstract: A memory system includes: a plurality of types of memory devices; and a controller including: a counter configured to determine R/W ratio; a data manager configured to generate meta data corresponding to the target data; and a selector configured to compare the R/W ratio with a threshold of each of the plurality of memory devices, respectively, and select a memory device for storing the target data and select a memory device for storing the meta data; a processor configured to store the target data and meta data in the each selected memory device.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: August 25, 2020
    Assignee: SK hynix Inc.
    Inventor: Yi-Seok Kim
  • Patent number: 10754811
    Abstract: A device may include a connector to connect the device to a chassis. The device may include chassis type circuitry to determine a type of the chassis. The device may further include mode configuration circuitry to configure the device to use a particular mode appropriate for the type of the chassis.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: August 25, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sompong Paul Olarig, Son T. Pham, Fred Worley
  • Patent number: 10740019
    Abstract: Techniques are presented for implementing non-host-based migration in a manner that is not subject to certain types of data corruption. This may be accomplished by preventing any hosts from having write access to a target LUN until it can be confirmed that all applications that access a source LUN have been shut down. This arrangement prevents accidentally writing to the target LUN while the source LUN is still being accessed. As a further precaution, just in case the confirmations are incorrect, a target data storage system can direct a source data storage system to remove access to the source LUN from all of the hosts, which has a similar effect. The migration can then proceed.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: August 11, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Prakash Venkat, Gopakumar Ambat, Amihay Azruel, Mrutyunjaya Prasad Jali
  • Patent number: 10740187
    Abstract: Techniques for providing a cache-based mechanism for snapshot management and creation in a data storage system. The techniques include creating, in a cache memory, a snapshot of a data volume such that the same data is shared between the data volume and the snapshot, and modifying, in the cache memory, one or more data pages among a plurality of data pages of the data volume. The techniques further include maintaining, on a list in the cache memory, copies of the data pages of the snapshot previously shared with the data volume prior to their modification, and maintaining, in a table in the cache memory, a copy record that contains information describing the relationship between the data volume and the snapshot. The techniques still further include flushing, in log order, the data pages of the snapshot and the copy record of the data volume and the snapshot to a storage device.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: August 11, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Vikram Prabhakar, Joris Wils, Shari Vietry
  • Patent number: 10740262
    Abstract: An input/output (I/O) block for a semiconductor integrated circuit (IC), which includes: at least one I/O buffer, configured to define at least one signal path in respect of a connection to a remote I/O block via a communication channel, each signal path causing a respective signal edge slope; and an I/O sensor, coupled to the at least one signal path and configured to generate an output signal indicative of one or both of: (a) a timing difference between the signal edge for a first signal path and the signal edge for a second signal path, and (b) an eye pattern parameter for one or more of the at least one signal path.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: August 11, 2020
    Assignee: PROTEANTECS LTD.
    Inventors: Eyal Fayneh, Evelyn Landman, Shai Cohen, Guy Redler, Inbar Weintrob
  • Patent number: 10735270
    Abstract: Embodiments of systems and methods for network modelling include determining a device representation of each device on a network. A normalized device representation associated with a device representation of each device is determined using a library of device representation parser functions. A static network map of the network is generated based on each normalized device representation. A routing protocol peering session is established between each device and a routing protocol server using a routing protocol. A status of each device and each link is determined based on updates from each routing protocol peering session. A live map of the network is generated based on the status of each device. Configuration errors and network errors are determined based at least in part on the static network map and the live map, and routing errors are determined based at least in part on a comparison between protocol prefixes and predetermined network invariants.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: August 4, 2020
    Assignee: GoDaddy.com, LLC
    Inventors: David Whipple, Arne Josefsberg, Tim J. LaBerge, Anthony Fammartino
  • Patent number: 10732860
    Abstract: Examples described herein include receiving a first data write request from a host computing device, assigning a first identification to the first data write request, recording the first identification in in-flight data, transmitting the first data write request to a second storage array, receiving a first acknowledgement of the first data write request from the second storage array, and recording an indicator representing a group of acknowledgements. In some examples, the group of acknowledgements comprises the first acknowledgment.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: August 4, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Praveen Killamsetti, Tomasz Barszczak, Ammar Ekbote, Monil Mukesh Sanghavi
  • Patent number: 10725691
    Abstract: Techniques are provided for overlapping write handling. Overlapping write managers are used to maintain the order that write operations are executed at a first computing environment and replicated to a second computing environment. Overlapping write managers are pre-allocated as available for managing overlapping write operations. A mapping is used to track what overlapping write managers are currently allocated for particular file handles of files. Thus, if an incoming write operation targets a file handle of an already allocated overlapping write manager, then that overlapping write manager is used to execute and replicate the incoming write operation so that the order of execution of overlapping writes by the second computing environment is the same as at the first computing environment. If there is no allocated overlapping write manager for the file handle, then a new overlapping write manager is allocated and utilized.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: July 28, 2020
    Assignee: NetApp Inc.
    Inventors: Akhil Kaushik, Anoop Chakkalakkal Vijayan
  • Patent number: 10719249
    Abstract: In one aspect, extent lock resolution for storage devices includes designating one of the storage devices as a lock winner, which takes priority over another storage device over a lock. An aspect also includes receiving a replication request issued, by a host during active/active replication, determining an extent of pages to be modified by the request, locking the extent in local storage device, and executing the request at the local device. An aspect also includes sending a write request to a remote device. If the remote device is the designated lock winner, and an attempt to lock the extent is unsuccessful, the remote device waits for the lock to become available. If the remote device is not the designated lock winner, and an attempt to lock the extent is unsuccessful, the remote device rejects the write request and sends a request to the local device to resend the write request.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 21, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: David Meiri, Xiangping Chen
  • Patent number: 10712970
    Abstract: The present invention provides a flash memory controller including an artificial intelligence (AI) module and a microprocessor. In the operations of the flash memory controller, the AI module receives data from a host device, and determines if the data is important data or unimportant data to generate a determination result. The microprocessor is configured to write the data into a flash memory module according to the determination result, wherein the flash memory module comprises a plurality of first blocks and a plurality of second blocks, and quantity of bits stored in each memory cell within the first blocks is lower than quantity of bits stored in each memory cell within the second blocks. When the determination result indicates that the data is the important data, the microprocessor only stores the data into at least one of the first blocks.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: July 14, 2020
    Assignee: RAYMX MICROELECTRONICS CORP.
    Inventors: Wen-Hsin Chang, Yen-Chung Chen, Wei-Ren Hsu, Yufeng Zhou
  • Patent number: 10713188
    Abstract: An inter-process signaling system and method support implementation of semaphores or messaging signals between masters in a multi-master system, or between tasks in a single master system. A semaphore flag register contains one or more bits indicating whether resources are free or busy. The register is aliased to allow atomic read-and-clear of individual bits in the register. Masters poll the status of a resource until the resource reads as free. Alternatively, interrupts or events per master can be implemented to indicate availability of a resource.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: July 14, 2020
    Assignee: Atmel Corporation
    Inventor: Frode Milch Pedersen
  • Patent number: 10713178
    Abstract: A mapping table updating method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: calculating a plurality of updated data counts of a plurality of updated logical units in at least one active physical erasing unit respectively according to a physical-logical mapping table; selecting a first updated logical unit from a plurality of updated logical units according to the plurality of updated data counts, and the number of the first updated logical unit is less than the number of the plurality of updated logical units; loading a first logical-physical mapping table corresponding to the first updated logical unit; and updating mapping information in the first logical-physical mapping table according to mapping information of the first updated logical unit in the physical-logical mapping table.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: July 14, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chia-Han Yen, Chuan-Hsiang Chen
  • Patent number: 10705742
    Abstract: Techniques manage a storage system. Such techniques involve: determining an expected input/output (I/O) concurrency number of an access request for a storage system, the access request being associated with a first one of a plurality of redundant arrays of independent disks (RAIDs) comprised in the storage system; in response to a current available I/O concurrency number of the first RAID being less than the expected I/O concurrency number, increasing the available I/O concurrency number of the first RAID based on a reserved I/O concurrency number of the storage system; and performing the access request using the first RAID having the increased available I/O concurrency number.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: July 7, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Baote Zhuo, Jian Gao, Jibing Dong, Geng Han, Xinlei Xu, Jianbin Kang
  • Patent number: 10705954
    Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device while preserving large pages are provided. In one set of embodiments, a host system can receive a write request with respect to a data block of the NVM region, where the data block is referred to by a snapshot of the NVM region and was originally allocated as part of a large page. The host system can further allocate a new data block in the NVM region, copy contents of the data block to the new data block, and update the data block with write data associated with the write request. The host system can then update a level 1 (L1) page table entry of the NVM region's running point to point to the original data block.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: July 7, 2020
    Assignee: VMware, Inc.
    Inventors: Rajesh Venkatasubramanian, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Xavier Deguillard
  • Patent number: 10691591
    Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using pointer elimination are provided. In one set of embodiments, a host system can, for each level 1 (L1) page table entry of each snapshot of the NVM region, determine whether a data block of the NVM region that is pointed to by the L1 page table entry is a non-active block, and if the data block is a non-active block, remove a pointer to the data block in the L1 page table entry and reduce a reference count parameter associated with the data block by 1. If the reference count parameter has reached zero at this point, the host system purge the data block from the NVM device to the mass storage device.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: June 23, 2020
    Assignee: VMware, Inc.
    Inventors: Kiran Tati, Xavier Deguillard, Ishan Banerjee, Julien Freche, Preeti Agarwal, Rajesh Venkatasubramanian
  • Patent number: 10684963
    Abstract: System and techniques for enhanced electronic navigation maps for a vehicle are described herein. A descriptor set-up message may be received at a network controller interface (NIC). Here, the descriptor set-up message includes an ethernet frame descriptor. The NIC may then use the ethernet frame descriptor to transmit, across a physical interface of the NIC, multiple ethernet frames, each of which use the same ethernet frame descriptor from the set-up message.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 16, 2020
    Assignee: Intel Corporation
    Inventors: Alexander Slota, James Coleman, Rajkumar Khandelwal, Anil Kumar