Patents Examined by Kathleen Duda
  • Patent number: 9874814
    Abstract: A method for producing a touch input sensor includes stacking an intermediate resin layer (33) containing a photosensitive resin and an ultraviolet absorber and a transparent conductive film (32) on both surfaces of a transparent substrate (10) in that order, performing a pattern exposure with ultraviolet rays (L) applied to both surface sides, and performing developing to form a transparent electrode formed of the transparent conductive film (32) on both surfaces of the transparent substrate (10).
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: January 23, 2018
    Assignee: NISSHA PRINTING CO., LTD.
    Inventors: Tomohiro Yamaoka, Ryomei Omote, Hayato Nakaya, Takeshi Nishimura, Yoshitaka Emoto
  • Patent number: 9869933
    Abstract: Methods of trimming a photoresist pattern comprise: (a) providing a semiconductor substrate; (b) forming a photoresist pattern over the semiconductor substrate, wherein the photoresist pattern is formed from a photoresist composition comprising: a first polymer comprising acid labile groups; and a photoacid generator; (c) coating a pattern trimming composition over the photoresist pattern, wherein the pattern trimming composition comprises a second polymer and a solvent system, wherein the solvent system comprises one or more monoether solvents in a combined amount of 50 wt % or more based on the solvent system; (d) heating the coated semiconductor substrate, thereby causing a change in solubility of a surface region of the photoresist pattern in a rinsing agent to be applied; and (e) contacting the photoresist pattern with a rinsing agent to remove the surface region of the photoresist pattern, thereby forming a trimmed photoresist pattern.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: January 16, 2018
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Kevin Rowell, Cong Liu, Cheng Bai Xu, Irvinder Kaur, Jong Keun Park
  • Patent number: 9829806
    Abstract: Methods for processing a substrate having a structure formed thereon and a system for processing a substrate are provided. A substrate is received from first processing equipment, where the first processing equipment has formed the structure on the substrate. A lithography process is performed on the received substrate. The lithography process includes exposing the substrate under an optical condition. The lithography process further includes polishing a backside of the substrate prior to the exposing of the substrate, where the polishing is configured to remove a topographical feature of the backside of the substrate or to remove a contaminant from the backside of the substrate. The substrate does not undergo a cleaning procedure during a period of time between i) the forming of the structure on the substrate, and ii) the exposing of the substrate.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: November 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Tang-Kuei Chang, Kuo-Hsiu Wei, Kei-Wei Chen, Huai-Tei Yang, Ying-Lang Wang
  • Patent number: 9810981
    Abstract: A pattern formation method includes step (i) of forming a first negative type pattern on a substrate by performing step (i-1) of forming a first film on the substrate using an actinic ray-sensitive or radiation-sensitive resin composition, step (i-2) of exposing the first film and step (i-3) of developing the exposed first film in this order; step (iii) of forming a second film at least on the first negative type pattern using an actinic ray-sensitive or radiation-sensitive resin composition (2); step (v) of exposing the second film; and step (vi) of developing the exposed second film and forming a second negative type pattern at least on the first negative type pattern.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: November 7, 2017
    Assignee: FUJIFILM Corporation
    Inventors: Ryosuke Ueba, Naoya Iguchi, Tsukasa Yamanaka, Naohiro Tango, Michihiro Shirakawa, Keita Kato
  • Patent number: 9804497
    Abstract: A method of manufacturing a security device including: conveying a substrate web including a photosensitive film along a transport path; exposing the photosensitive film to radiation of a predetermined wavelength through a mask, wherein the mask includes a predetermined pattern of regions which are substantially opaque to radiation of the predetermined wavelength and at least semi-transparent to radiation of the predetermined wavelength, respectively; during the exposure, moving the mask alongside the substrate web along at least a portion of the transport path at substantially the same speed as the substrate web, such that there is substantially no relative movement between the mask and the substrate web; and heating the substrate web including the exposed photosensitive film. In this way, regions of the photosensitive film exposed to the radiation of the predetermined wavelength undergo an increase in optical density such that the photosensitive film displays a reproduction of the predetermined pattern.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: October 31, 2017
    Assignee: DE LA RUE INTERNATIONAL LIMITED
    Inventor: Adam Lister
  • Patent number: 9804492
    Abstract: A method for forming multi-layer film on substrate, which includes steps (1) forming under layer film on substrate by applying under layer film material containing resin having repeating unit represented by the general formula (1) or (2) in which fluorene structure is contained, and curing the same by heat treatment, (2) forming metal oxide film on the under layer film by applying metal oxide film material selected from titanium oxide film material, zirconium oxide film material, and hafnium oxide film material, (3) forming hydrocarbon film on metal oxide film by applying hydrocarbon film material, and (4) forming silicon oxide film on the hydrocarbon film by applying silicon oxide film material. There can be provided a method for forming multi-layer film that can reduce reflectance, and useful for a patterning process with high dimensional accuracy of dry etching.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: October 31, 2017
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Jun Hatakeyama, Tsutomu Ogihara
  • Patent number: 9798236
    Abstract: In at least one embodiment of a method for forming a pattern having a hollow structure, a light-absorbing layer capable of absorbing light is formed on a surface of a photosensitive resin film. Subsequently, a substrate having a protrusion and the photosensitive resin film are bonded together so that the protrusion and the light-absorbing layer come into contact with each other. Then, the photosensitive resin film and the light-absorbing layer are patterned at one time by photolithography.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: October 24, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yohei Hamade, Shoji Shiba
  • Patent number: 9791779
    Abstract: A method for patterning a substrate is described. The patterning method includes receiving a first patterned layer overlying a material layer to be etched on a substrate, wherein the first patterned layer is composed of a resist material having (i) material properties that provide lithographic resolution of less than about 40 nanometers when exposed to extreme ultraviolet radiation lithography, and (ii) material properties that provide a nominal etch resistance to an etch process condition. The first patterned layer is over-coated with an image reversal material such that the image reversal material fills and covers the first patterned layer. The patterning method further includes removing an upper portion of the image reversal material such that top surfaces of the first patterned layer are exposed, and removing the first patterned layer such that the image reversal material remains resulting in a second patterned layer.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: October 17, 2017
    Assignee: Tokyo Electron Limited
    Inventor: Lior Huli
  • Patent number: 9772559
    Abstract: Methods for performing a photolithographic process are disclosed. The methods facilitate the removal of photosensitive from a wafer after the photosensitive has been used as an etch mask. The photosensitive may be a negative tone photosensitive that undergoes a cross-linking process on exposure to electromagnetic energy. By limiting the cross-linking through a reduced post-exposure bake temperature and/or through reduced cross-linker loading, the photoresist, or at least a portion thereof, may have a reduced solvent strip resistance. Because of the reduced solvent strip resistance, a portion of the photosensitive may be removed using a solvent strip. After the solvent strip, a dry etch may be performed to remove remaining portions of the photoresist.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: September 26, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Ling Cheng, Ching-Yu Chang, Chien-Chih Chen
  • Patent number: 9766546
    Abstract: The method comprises the steps of applying a layer of a negative photoresist on a bottom layer, providing the layer of the negative photoresist with a pattern arranged in a border zone of the resist structure to be produced, irradiating a surface area of the layer of the negative photoresist according to the resist structure to be produced, and removing the layer of the negative photoresist outside the irradiated surface area. The pattern is produced in such a manner that it comprises a dimension that is smaller than a minimal resolution of the irradiation. The pattern may especially be designed as a sub-resolution assist feature.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: September 19, 2017
    Assignee: AMS AG
    Inventors: Gerhard Eilmsteiner, Raimund Hoffmann
  • Patent number: 9766545
    Abstract: A method for forming a pattern on a substrate is described. The method includes providing a substrate, forming a photosensitive layer over the substrate, exposing the photosensitive layer to a first exposure energy through a first mask, exposing the photosensitive layer to a second exposure energy through a second mask, baking the photosensitive layer, and developing the exposed photosensitive layer. The photosensitive layer includes a polymer that turns soluble to a developer solution, at least one photo-acid generator (PAG), and at least one photo-base generator (PBG). A portion of the layer exposed to the second exposure energy overlaps with a portion exposed to the first exposure energy.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: September 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya Hui Chang, Chia-Chu Liu
  • Patent number: 9760002
    Abstract: A method of forming a circuit board includes forming a conductive pattern on a substrate; forming a first negative resist on the substrate after formation of the conductive pattern; partially exposing the first negative resist on the surface of the conductive pattern to form a first via exposure portion; forming a second negative resist on the substrate after formation of the first via exposure portion; partially exposing the second negative resist on the first via exposure portion to form a second via exposure portion larger than the first via exposure portion; developing the first negative resist and the second negative resist after formation of the second via exposure portion to form a via opening reaching the conductive pattern; and filling the via opening with a conductive material.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hiroyuki Mori, Hirokazu Noma, Keishi Okamoto
  • Patent number: 9753370
    Abstract: Multiple-pattern forming methods are provided.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: September 5, 2017
    Assignees: Dow Global Technologies LLC, Rohm and Haas Electronic Materials LLC, Rohm and Haas Electronic Materials Korea Ltd.
    Inventors: Chang-Young Hong, Cheng-Bai Xu, Jung Woo Kim, Cong Liu, Shintaro Yamada, Lori Anne Joesten, Choong-Bong Lee, Phillip D. Hustad, James C. Taylor
  • Patent number: 9746774
    Abstract: A method for mitigating shot noise in extreme ultraviolet (EUV) lithography and patterning of photo-sensitized chemically-amplified resist (PS-CAR) is described. The method includes a first EUV patterned exposure to generate a photosensitizer and a second flood exposure at a wavelength different than the wavelength of the first EUV patterned exposure, to generate acid in regions exposed during the first EUV patterned exposure, wherein the photosensitizer acts to amplify acid generation and improve contrast. The resist may be exposed to heat, liquid solvent, solvent atmosphere, or a vacuum to mitigate the effects of EUV shot noise on photosensitizer concentration which may accrue during the first EUV patterned exposure.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: August 29, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Michael A. Carcasi, Mark H. Somervell
  • Patent number: 9740104
    Abstract: Systems and methods for processing a substrate include exposing a substrate to UV light from a UV light source having a predetermined wavelength range. The substrate includes a photoresist layer that has been bombarded with ions. The method includes controlling a temperature of the substrate, while exposing the substrate to the UV light, to a temperature less than or equal to a first temperature. The method includes removing the photoresist layer using plasma while maintaining a temperature of the substrate to less than or equal to a strip process temperature after exposing the substrate to the UV light.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: August 22, 2017
    Assignee: Lam Research Corporation
    Inventors: Ivan L. Berry, III, Glen Gilchrist
  • Patent number: 9741564
    Abstract: In a method of forming a mark pattern according to the embodiments, a film to be processed on a substrate is coated with a photosensitive film, and the photosensitive film is irradiated with exposure light via a mask. On the mask, a first circuit pattern having a first transmittance and a mark having a second transmittance and used to measure a superposition between films are arranged. By irradiating with the exposure light, a second circuit pattern having a first film thickness and a mark pattern having a second film thickness thinner than the first film thickness are formed on the substrate.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: August 22, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yuji Setta, Taketo Kuriyama, Nobuhiro Komine
  • Patent number: 9740094
    Abstract: A method of cleaning a photomask is disclosed. The method includes mixing a first chemical solution with a second chemical solution; and discharging the mixed chemical solution through an outlet of a nozzle to a surface of the photomask on which includes a ruthenium (Ru) layer, wherein the first chemical solution is configured to dislodge contaminant particles from the surface of the photomask and the second chemical solution is configured to provide an electron to the first chemical solution.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: August 22, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Wen Lin, Chi-Lun Lu, Ching-Wei Shen, Shu-Hsien Wu
  • Patent number: 9733570
    Abstract: Systems and methods are provided for forming features through photolithography. A polymer layer is formed over a substrate. The polymer layer is patterned to form a first feature and a second feature, the first feature and the second feature being separated at a first distance. A rinse material is applied to the polymer layer including the first feature and the second feature. The rinse material is removed from the polymer layer including the first feature and the second feature to cause the first feature and the second feature to come into contact with each other. A third feature is formed based on the first feature and the second feature being in contact with each other.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: August 15, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chun-Liang Tai, Bi-Ming Yen, Chun-Hung Lee, De-Fang Chen
  • Patent number: 9653319
    Abstract: Methods for using high-speed EUV resists including resists having additives that may be detrimental to etch chambers. Methods include using reversal materials and/or reversal techniques, as well as diffusion-limited etch-back and slimming for pattern creation and transfer. A substrate with high-speed EUV resist is lithographically patterned and developed into a patterned resist mask. An image reversal material is then over-coated on the patterned resist mask such that the image reversal material fills and covers the patterned resist mask. An upper portion of the image reversal material is removed such that top surfaces of the patterned resist mask are exposed. The patterned resist mask is removed such that the image reversal material remains resulting in a patterned image reversal material mask. Residual resist material is removed via a slimming process using an acid diffusion and subsequent development.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: May 16, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Anton J. deVilliers, Kaushik Kumar
  • Patent number: 9653293
    Abstract: A manufacturing a semiconductor device of the present disclosure includes coating a photosensitive material on a workpiece; exposing the photosensitive material using a first exposure mask; performing a positive-tone development on the photosensitive material using a first developer after the first exposing; exposing the photosensitive material using a second exposure mask after the first developing; and performing a negative-tone development on the photosensitive material using a second developer after the second exposing.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: May 16, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Hidetami Yaegashi