Patents Examined by Kathleen Duda
  • Patent number: 10564549
    Abstract: A method of forming a thin film pattern includes providing a thin film on a substrate, providing a photoresist on the thin film, forming a first photoresist pattern having a first packing density by exposing and developing the photoresist, etching the thin film by using the first photoresist pattern as a mask, processing the first photoresist pattern to convert the first photoresist pattern into a second photoresist pattern having a second packing density, which is lower than the first packing density, and stripping the second photoresist pattern by spraying steam onto the second photoresist pattern.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 18, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Beung Hwa Jeong, Jong Hyun Choung, Sung Chul Kim
  • Patent number: 10564539
    Abstract: A photolithography mask plate, the photolithography mask plate including: a substrate; a carbon nanotube layer on the substrate; a patterned chrome layer on the carbon nanotube layer, wherein the patterned chrome layer and the carbon nanotube layer have the same pattern; a cover layer on the patterned chrome layer.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: February 18, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Mo Chen, Qun-Qing Li, Li-Hui Zhang, Yuan-Hao Jin, Dong An, Shou-Shan Fan
  • Patent number: 10558121
    Abstract: In a method for producing a wired circuit board includes a step (1), in which the insulating layer having an inclination face is provided; a step (2), in which a metal thin film is provided on the surface of the insulating layer including the inclination face; a step (3), in which a photoresist is provided on the surface of the metal thin film; a step (4), in which a photomask is disposed so that a first light exposure portion and a second light exposure portion in the photoresist are exposed to light, and the photoresist is exposed to light; a step (5), in which the first light exposure portion and the second light exposure portion are removed; and a step (6), in which the first wire and the second wire are provided on the surface of the metal thin film.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: February 11, 2020
    Assignee: NITTO DENKO CORPORATION
    Inventors: Yuu Sugimoto, Hiroyuki Tanabe, Yoshito Fujimura
  • Patent number: 10551745
    Abstract: The present teachings relate to compositions for forming a negative-tone photopatternable dielectric material, where the compositions include, among other components, an organic filler and one or more photoactive compounds, and where the presence of the organic filler enables the effective removal of such photoactive compounds (after curing, and during or after the development step) which, if allowed to remain in the photopatterned dielectric material, would lead to deleterious effects on its dielectric properties.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: February 4, 2020
    Assignee: Flexterra, Inc.
    Inventors: Yan Zheng, Yan Hu, Wei Zhao, Antonio Facchetti
  • Patent number: 10551742
    Abstract: An EUV lithographic structure and methods according to embodiments of the invention includes an EUV photosensitive resist layer disposed directly on an oxide hardmask layer, wherein the oxide hardmask layer is doped with dopant ions to form a doped oxide hardmask layer so as to improve adhesion between the EUV lithographic structure and the oxide hardmask. The EUV lithographic structure is free of a separate adhesion layer.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: February 4, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yongan Xu, Jing Guo, Ekmini A. De Silva, Oleg Gluschenkov
  • Patent number: 10545408
    Abstract: A method of patterning a substrate may include providing a blanket photoresist layer on the substrate; performing an ion implantation procedure of an implant species into the blanket photoresist layer, the implant species comprising an enhanced absorption efficiency at a wavelength in the extreme ultraviolet (EUV) range; and subsequent to the performing the ion implantation procedure, performing a patterned exposure to expose the blanket photoresist layer to EUV radiation.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: January 28, 2020
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Tristan Y. Ma, Huixiong Dai, Anthony Renau, John Hautala, Joseph Olson
  • Patent number: 10539878
    Abstract: A lithography developing composition is disclosed. In an exemplary aspect, the composition comprises an alkaline aqueous solution having a first organic base and a second organic base, wherein the first organic base is a quaternary ammonium hydroxide with pendant groups on its side chains and the second organic base is another quaternary ammonium hydroxide with electron withdrawing groups on its side chains. In another exemplary aspect, the composition comprises an alkaline aqueous solution having an organic base that is a quaternary ammonium hydroxide with at least one electron withdrawing group on its side chains and the organic base has basicity weaker than Tetramethylammonium hydroxide (TMAH). In yet another exemplary aspect, the composition comprises an alkaline aqueous solution having an organic base that is Trimethylphenylammonium hydroxide or Benzyldimethyltetradecylammonium hydroxide.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: January 21, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lilin Chang, Ching-Yu Chang
  • Patent number: 10539875
    Abstract: Photoreduction of graphene oxide, by UV-generated ketyl radicals, to graphene. The photoreduction is versatile and can be carried out in solution, solid-state, and even in polymer composites. Reduction of graphene oxide can take place in various polymer matrixes. Methods for producing graphene-supported metal nanoparticles by photoreduction. Graphene oxide and a metal nanoparticle precursor are simultaneously reduced by the action of photogenerated ketyl radicals. Photoreduction is performed on polymer composite films in one embodiment.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: January 21, 2020
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: Joey D. Mangadlao, Rigoberto Advincula
  • Patent number: 10520817
    Abstract: In a method for producing a wired circuit board includes a step (1), in which the insulating layer having an inclination face is provided; a step (2), in which a metal thin film is provided on the surface of the insulating layer including the inclination face; a step (3), in which a photoresist is provided on the surface of the metal thin film; a step (4), in which a photomask is disposed so that a first light exposure portion and a second light exposure portion in the photoresist are exposed to light, and the photoresist is exposed to light; a step (5), in which the first light exposure portion and the second light exposure portion are removed; and a step (6), in which the first wire and the second wire are provided on the surface of the metal thin film.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: December 31, 2019
    Assignee: NITTO DENKO CORPORATION
    Inventors: Yuu Sugimoto, Hiroyuki Tanabe, Yoshito Fujimura
  • Patent number: 10520821
    Abstract: The present disclosure provides a method for lithography patterning. The method includes coating a bottom layer on a substrate, wherein the bottom layer includes a carbon-rich material; forming a middle layer on the bottom layer, wherein the middle layer has a composition such that its silicon concentration is enhanced to be greater than 42% in weight; coating a photosensitive layer on the middle layer; performing an exposing process to the photosensitive layer; and developing the photosensitive layer to form a patterned photosensitive layer.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: December 31, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yu Liu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10520822
    Abstract: The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 31, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui Weng, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10503065
    Abstract: A method of patterning a device is disclosed using a resist precursor structure having at least two fluoropolymer layers. A first fluoropolymer layer includes a first fluoropolymer material having a fluorine content of at least 50% by weight and is substantially soluble in a first hydrofluoroether solvent or in a first perfluorinated solvent, but substantially less soluble in a second hydrofluoroether solvent relative to both the first hydrofluoroether and the first perfluorinated solvent. The second fluoropolymer layer includes a second fluoropolymer material having a fluorine content less than that of the first fluoropolymer material and is substantially soluble in the first or second hydrofluoroether solvents, but substantially less soluble in the first perfluorinated solvent relative to both the first and second hydrofluoroether solvents.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: December 10, 2019
    Assignee: Orthogonal, Inc.
    Inventors: Terrence Robert O'Toole, John Andrew DeFranco, Frank Xavier Byrne
  • Patent number: 10503074
    Abstract: A method of making a device includes providing a fluorinated material layer over the device substrate having one or more target areas for patterning. One or more lift-off structures are formed at least in part by developing a first pattern of one or more open areas in the fluorinated material layer in alignment with the one or more target areas by contact with a developing agent including a fluorinated solvent which dissolves the fluorinated material at a first rate. After patterning, the lift-off structures are removed by contact with a lift-off agent including a fluorinated solvent wherein the lift-off agent dissolves the fluorinated material at a second rate that is at least 150 nm/sec and higher than the first rate.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: December 10, 2019
    Assignee: Orthogonal, Inc.
    Inventors: John Andrew Defranco, Charles Warren Wright, Douglas Robert Robello, Frank Xavier Byrne, Diane Carol Freeman, Terrence Robert O'Toole
  • Patent number: 10503070
    Abstract: Methods and materials directed to a photosensitive material and a method of performing a lithography process using the photosensitive material are described. A semiconductor substrate is provided. A layer including an additive component is formed over the semiconductor substrate. The additive component includes a metal cation. One or more bonds are formed to bond the metal cation and one or more anions. Each of the one or more anions is one of a protecting group and a polymer chain bonding component. The polymer chain bonding component is bonded to a polymer chain of the layer. The layer is exposed to a radiation beam.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: December 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang, Chien-Wei Wang
  • Patent number: 10481496
    Abstract: The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: November 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gerald Bartley, Matthew Doyle, Darryl Becker, Mark Jeanson
  • Patent number: 10459332
    Abstract: A method of fabricating a photomask includes providing a mask blank; removing a portion of the resist layer to form a patterned resist layer exposing a portion of the cooling layer; patterning the cooling layer by using the patterned resist layer as an etching mask; patterning the opaque layer; and removing the patterned resist layer and the patterned cooling layer. The mask blank includes a light-transmitting substrate and an opaque layer, a cooling layer, and a resist layer sequentially stacked thereon, wherein the cooling layer has a thermal conductivity ranging between 160 and 5000 and an effective atomic number ranging between 5 and 14.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hao-Ming Chang, Chih-Ming Chen, Cheng-Ming Lin, Sheng-Chang Hsu, Shao-Chi Wei, Hsao Shih, Li-Chih Lu
  • Patent number: 10416557
    Abstract: A method for manufacturing a semiconductor apparatus, including preparing a first substrate provided with a pad optionally having a plug and a second substrate or device provided with a plug, forming a solder ball on at least one of the pad or plug of first substrate and the plug of second substrate or device, covering at least one of a pad-forming surface of first substrate and a plug-forming surface of second substrate or device with a photosensitive insulating layer, forming an opening on the pad or plug of the substrate or device that has been covered with photosensitive insulating layer by lithography, pressure-bonding the second substrate or device's plug to the pad or plug of first substrate with the solder ball through the opening, electrically connecting pad or plug of first substrate to second substrate or device's plug by baking, and curing photosensitive insulating layer by baking.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: September 17, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Kyoko Soga, Satoshi Asai
  • Patent number: 10394123
    Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a material layer over a substrate, wherein the material layer is soluble in a solvent; forming a blocking layer on the material layer; and forming a photoresist layer on the blocking layer, wherein the photoresist layer includes a photosensitive material dissolved in the solvent. The method further includes exposing the photoresist layer; and developing the photoresist layer in a developer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: August 27, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Siao-Shan Wang, Chen-Yu Liu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10386723
    Abstract: A method for lithography patterning includes forming a first layer over a substrate, the first layer being radiation-sensitive. The method further includes exposing the first layer to a radiation. The method further includes applying a developer to the exposed first layer, resulting in a pattern over the substrate, wherein the developer includes a developing chemical whose concentration in the developer is a function of time during the applying of the developer.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: August 20, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Chung-Cheng Wang
  • Patent number: 10386721
    Abstract: Provided are: a pattern-forming method by which a laminate that has excellent interlayer adhesion of a resist film, yields a high-definition pattern and exhibits excellent gas barrier properties and high solvent resistance is obtained; and an electronic device produced by the same. The pattern-forming method includes: the step (1) of forming a film using a composition on a support; the exposure step (2) of irradiating a prescribed part of the thus formed film with an active energy ray to modify the developability of the prescribed part; and the development step (3) of developing the film to obtain a pattern, wherein, a plurality of compositions that differ in solubility to a developing solution are used as the composition, and the resulting pattern has a multilayer structure.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: August 20, 2019
    Assignee: ADEKA CORPORATION
    Inventors: Toshihiko Murai, Kenji Hara, Masatomi Irisawa