Patents Examined by Kaushikkumar M Patel
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Patent number: 11360891Abstract: A method of dynamic cache configuration includes determining, for a first clustering configuration, whether a current cache miss rate exceeds a miss rate threshold. The first clustering configuration includes a plurality of graphics processing unit (GPU) compute units clustered into a first plurality of compute unit clusters. The method further includes clustering, based on the current cache miss rate exceeding the miss rate threshold, the plurality of GPU compute units into a second clustering configuration having a second plurality of compute unit clusters fewer than the first plurality of compute unit clusters.Type: GrantFiled: March 15, 2019Date of Patent: June 14, 2022Assignee: Advanced Micro Devices, Inc.Inventors: Mohamed Assem Ibrahim, Onur Kayiran, Yasuko Eckert, Gabriel H. Loh
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Patent number: 11354251Abstract: A method of offloading a computing kernel from a host central processing unit (CPU) to a co-processor includes obtaining, by an application running on the host CPU, a virtual address of a packet in a user level queue of a general packet processing unit (GPPU) and initializing, by the application, the packet referenced by the virtual address using an application programming interface of a user level device driver (ULDD). The packet includes a plurality of handles corresponding to the computing kernel. The method further includes finalizing, by the ULDD, the packet by including a list of bootstrap translation addresses comprising a physical address and a virtual address for each of the plurality of handles and output by a kernel level device driver (KLDD) of an operating system running on the host CPU, and accessing, by the application using the virtual address, results obtained from the co-processor processing the computing kernel.Type: GrantFiled: April 1, 2021Date of Patent: June 7, 2022Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, TECHNOLOGICAL EDUCATIONAL INSTITUTE OF CRETEInventors: Antonio-Marcello Coppola, Georgios Kornaros, Miltos Grammatikakis
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Patent number: 11347651Abstract: The disclosed computer-implemented method includes receiving an indication that cache data is to be copied from an originating cluster having a specified number of replica nodes to a destination cluster having an arbitrary number of replica nodes. The method further includes copying the cache data to a cache dump and creating a log that identifies where the cache data is stored in the cache dump. The method further includes copying the cache data from the cache dump to the replica nodes of the destination cluster. The copying includes writing the copied data in a distributed manner, such that at least a portion of the copied data is distributed over each of the replica nodes in the destination cluster. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: January 4, 2021Date of Patent: May 31, 2022Assignee: Netflix, Inc.Inventors: Deva Jayaraman, Shashi Madappa, Sridhar Enugula, Ioannis Papapanagiotou
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Patent number: 11347655Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.Type: GrantFiled: December 23, 2019Date of Patent: May 31, 2022Assignee: Kioxia CorporationInventors: Hideki Yoshida, Shinichi Kanno
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Patent number: 11340789Abstract: A storage array includes a scalable drive cluster and non-scaling drive clusters on which RAID (D+P) protection groups are implemented using partition as protection group members. The scalable drive cluster is scaled by adding one or more new drives and moving protection group members onto the new drives. Reserve capacity is calculated based on scaling of the scalable drive cluster by converting unused partitions to reserve capacity when the cluster is scaled. When W=(D+P) new drives are added to the storage array the reserve capacity is replenished, if any was used, by moving protection groups from the scalable drive cluster to a non-scaling drive cluster created with the W new drives. Maintaining the reserve capacity on the scaling drive cluster improves function of the storage array because unutilized reserve capacity can be relocated during scaling without moving data.Type: GrantFiled: October 13, 2020Date of Patent: May 24, 2022Assignee: Dell Products L.P.Inventors: Kuolin Hua, Kunxiu Gao
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Patent number: 11340795Abstract: A snapshot lookup table (SLT) and snapshot pointer structure(s) (SPSs) may be provided for a logical data unit (LSU), each SPS entry corresponding to an LSU data portion and a physical storage location at which data is stored for the data portion for a particular snapshot. A current lookup table (CLT) for a current time may be provided for an LSU, including an entry for each LSU data that points to a respective entry of an SPS. Each time a first write following the creation of a snapshot is made to an LSU data portion, the corresponding CLT entry may be updated to point to the SPS entry that was updated to point to an LSU track table entry. To create a snapshot, a snapshot lookup table (SLT) is created for each snapshot, and the contents of the CLT are copied to the newly created SLT.Type: GrantFiled: May 28, 2020Date of Patent: May 24, 2022Assignee: EMC IP Holding Company LLCInventors: Jeffrey Wilson, Michael Ferrari, Mark J. Halstead, Sandeep Chandrashekara
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Patent number: 11334485Abstract: A computer system for dynamic enforcement of store atomicity includes multiple processor cores, local cache memory for each processor core, a shared memory, a separate store buffer for each processor core for executed stores that are not yet performed and a coherence mechanism. A first processor core load on a first processor core receives a value at a first time from a first processor core store in the store buffer and prevents any other first processor core load younger than the first processor core load in program order from committing until a second time when the first processor core store is performed. Between the first time and the second time any load younger in program load than the first processor core load and having an address matched by coherence invalidation or an address matched by an eviction is squashed.Type: GrantFiled: December 16, 2019Date of Patent: May 17, 2022Assignee: ETA SCALE ABInventors: Stefanos Kaxiras, Alberto Ros
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Patent number: 11321233Abstract: A multi-chip system and a cache processing method are provided. The multi-chip system includes multiple chips. Each chip includes multiple clusters, a crossbar interface, and a snoop system. Each cluster corresponds to a local cache. The crossbar interface is coupled to the clusters and a crossbar interface of another chip. The snoop system is coupled to the crossbar interface and performs unidirectional transmission with the crossbar interface. The snoop system includes a snoop table module and multiple trackers. The snoop table module includes a shared cache, which records a snoop table. Multiple trackers are coupled to the snoop table module, query the snoop table in the shared cache according to a memory access request initiated by one of clusters, and update the snoop table according to a query result. The snoop table corresponds to a storage structure of the local cache corresponding to the clusters in all chips.Type: GrantFiled: April 22, 2020Date of Patent: May 3, 2022Assignee: Shanghai Zhaoxin Semiconductor Co., Ltd.Inventors: Yang Shi, Chen Chen, Weilin Wang, Jiin Lai
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Patent number: 11314451Abstract: A method and apparatus for storing data are provided. A specific implementation of the method for storing data includes: receiving a storage request including to-be-stored data; acquiring, for a to-be-written node in a to-be-written node group, a memory performance information set corresponding to at least one memory included in the to-be-written node, and generating a weight value of the to-be-written node based on the acquired memory performance information set; determining, based on a generated weight value set, a target to-be-written node from the to-be-written node group; and storing the to-be-stored data to the target to-be-written node.Type: GrantFiled: September 9, 2019Date of Patent: April 26, 2022Assignee: Beijing Baidu Netcom Science and Technology Co., Ltd.Inventors: Ping Yang, Wen Zhao
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Patent number: 11314443Abstract: In a method for managing an image of a container in a host device, a first image of a first container is received, wherein the first image includes a first set of image layers for implementing a first set of services of the first container respectively. The first image is loaded to deploy the first container at the host device. Based on an attribute of an image layer in the first set of image layers, an expiration time is set for the image layer. In response to determining that the expiration time is reached, the image layer is deleted from the host device. Stored image layers can be reused to reduce the transmission bandwidth for remotely downloading the image layers. A corresponding device and a corresponding computer program product are provided.Type: GrantFiled: August 3, 2020Date of Patent: April 26, 2022Assignee: EMC IP Holding Company LLCInventors: Si Chen, Pengfei Wu, Zhenzhen Lin, Ruixue Zhang
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Patent number: 11307994Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.Type: GrantFiled: December 23, 2019Date of Patent: April 19, 2022Assignee: Kioxia CorporationInventors: Hideki Yoshida, Shinichi Kanno
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Patent number: 11301385Abstract: A cache managing method and system based on session type are provided. The cache memory includes several cache blocks. A cache manager has a trace table recording a priority of each cache block. The cache managing method includes the following steps. A request for a first data block is received from a first session, wherein the first session includes a first session type corresponding to a first priority. A cache block whose priority is lower than the first priority is assigned to the first session according to the trace table. The first data block is loaded to the assigned cache block. The priority of the assigned cache block of the trace table is updated to the first priority.Type: GrantFiled: December 23, 2020Date of Patent: April 12, 2022Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventor: Chih-Kuang Chang
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Patent number: 11301161Abstract: One example method includes generating a policy recommendation that can be implemented in data protection systems. The generation of the policy is based on information garnered from multiple distinct users. Initially, the users are clustered based on their user profiles. The virtual machines operated by these users are then clustered based on virtual machine profiles. This allows, for each resulting cluster, policy recommendations to be made based on a policy distribution of the corresponding cluster.Type: GrantFiled: September 17, 2020Date of Patent: April 12, 2022Assignee: EMC IP HOLDING COMPANY LLCInventors: Arik Sapojnik, Amihai Savir, Anat Parush Tzur
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Patent number: 11294808Abstract: Described apparatuses and methods form adaptive cache lines having a configurable capacity from hardware cache lines having a fixed capacity. The adaptive cache lines can be formed in accordance with a programmable cache-line parameter. The programmable cache-line parameter can specify a capacity for the adaptive cache lines. The adaptive cache lines may be formed by combining respective groups of fixed-capacity hardware cache lines. The quantity of fixed-capacity hardware cache lines included in respective adaptive cache lines may be based on the programmable cache-line parameter. The programmable cache-line parameter can be selected in accordance with characteristics of the cache workload.Type: GrantFiled: May 21, 2020Date of Patent: April 5, 2022Assignee: Micron Technology, Inc.Inventors: David Andrew Roberts, Joseph Thomas Pawlowski
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Patent number: 11288131Abstract: Extending snapshot retention for a storage system includes creating a plurality of entries, each of the entries corresponding to snapshot data on the storage system and containing data that was written in connection with the snapshot and containing a map indicating which portions of the storage system were modified and includes transferring the entries to an external storage that is separate from the storage system. The map may be an SDDF map that indicates tracks of data that were modified. The external storage may be a cloud storage. Each of the entries may be created prior to deleting data for a corresponding snapshot on the storage system. The entries may be transferred directly from the storage system to the external storage. Extending snapshot retention for a storage system may also include periodically writing a full version of data from the storage device to the external storage.Type: GrantFiled: February 27, 2020Date of Patent: March 29, 2022Assignee: EMC IP Holding Company LLCInventors: Douglas E. LeCrone, Brett A. Quinn
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Patent number: 11281581Abstract: A memory system includes: a first cache; a second cache; and a control unit configured to access the first cache as a first level cache in a first cache mode of operation of the memory system and access the second cache as the first level cache in a second cache mode of operation of the memory system.Type: GrantFiled: September 2, 2020Date of Patent: March 22, 2022Assignee: SK hynix Inc.Inventor: Kyung Soo Lee
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Patent number: 11275513Abstract: A method, computer program product, and computing system for receiving telemetry data associated with a plurality of storage devices. A storage device reliability level may be defined for each storage device based upon, at least in part, the telemetry data associated with the plurality of storage devices. Each storage device may be partitioned into a plurality of storage device segments. A storage device segment reliability level may be defined for the plurality of storage device segments based upon, at least in part, the storage device reliability level of the plurality of storage devices. A subset of the plurality of storage device segments may be combined, thus defining a storage device segment extent. A RAID level for the storage device segment extent may be selected based upon, at least in part, the storage device segment reliability level of each storage device segment of the storage device segment extent.Type: GrantFiled: May 22, 2020Date of Patent: March 15, 2022Assignee: EMC IP HOLDING COMPANY, LLCInventors: Nickolay Dalmatov, Mikhail Danilov
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Patent number: 11269562Abstract: A method, computer program product, and computer system for identifying, by a computing device, information associated with a relationship between a physical layer block and a virtual logic block for RAID storage. The information associated with the relationship between the physical layer block and the virtual logic block may be written within the RAID storage.Type: GrantFiled: January 28, 2020Date of Patent: March 8, 2022Assignee: EMC IP HOLDING COMPANY, LLCInventors: Nickolay Alexandrovich Dalmatov, Mikhail Viktorovich Danilov
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Patent number: 11269530Abstract: Techniques for storage management involve determining an independent redundant disk array RAID associated with a first set of storage disks, a first portion of storage blocks corresponding to the RAID being located in the first set of storage disks; determining, from the first set of storage disks, a plurality of storage disks corresponding to the RAID; and updating a set of association degrees of the first set of storage disks to indicate data coupling between storage disk pairs in the plurality of storage disks. Accordingly, the data coupling degree between storage disks can be determined more accurately.Type: GrantFiled: July 23, 2020Date of Patent: March 8, 2022Assignee: EMC IP Holding Company LLCInventors: Jian Gao, Jibing Dong, Geng Han, Jianbin Kang, Lifeng Yang
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Patent number: 11263154Abstract: Embodiments are provided for protecting boot block space in a memory device. Such a memory device may include a memory array having a protected portion and a serial interface controller. The memory device may have a register that enables or disables access to the portion when data indicating whether to enable or disable access to the portion is written into the register via a serial data in (SI) input.Type: GrantFiled: December 19, 2016Date of Patent: March 1, 2022Assignee: Micron Technology, Inc.Inventor: Theodore T. Pekny